[Openchrome-devel] xf86-video-openchrome: 5 commits - configure.ac src/via_display.c
Kevin Brace
kevinbrace at kemper.freedesktop.org
Thu Jun 2 15:36:11 UTC 2016
configure.ac | 2
src/via_display.c | 118 ++++++++++++++++++++++++++++--------------------------
2 files changed, 63 insertions(+), 57 deletions(-)
New commits:
commit 049442c4b22edbf14b7b9c5bce18ac0abc3adb15
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Thu Jun 2 08:35:39 2016 -0700
Version bumped to 0.4.162
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/configure.ac b/configure.ac
index c7dbad9..3e2dce5 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
# Initialize Autoconf
AC_PREREQ(2.57)
AC_INIT([xf86-video-openchrome],
- [0.4.161],
+ [0.4.162],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/openchrome],
[xf86-video-openchrome])
commit 56cdf3507f0fddd5328208a0a1d6ca5688ebe8e4
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Thu Jun 2 08:33:34 2016 -0700
Removing compilation warnings inside viaIGA2SetFBStartingAddress
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/src/via_display.c b/src/via_display.c
index 6a34f21..abf9549 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -1744,11 +1744,11 @@ viaIGA2SetFBStartingAddress(xf86CrtcPtr crtc, int x, int y)
Base = (y * pScrn->displayWidth + x) * (pScrn->bitsPerPixel / 8);
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Base Address: 0x%x\n",
+ "Base Address: 0x%lx\n",
Base));
Base = (Base + drmmode->front_bo->offset) >> 3;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "DRI Base Address: 0x%x\n",
+ "DRI Base Address: 0x%lx\n",
Base);
tmp = hwp->readCrtc(hwp, 0x62) & 0x01;
commit 6e6d0ce69a822146e30d738e30172e54a7d8b337
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Thu Jun 2 08:27:09 2016 -0700
Removing compilation warnings inside viaIGA1SetFBStartingAddress
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/src/via_display.c b/src/via_display.c
index 4fad6f9..6a34f21 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -631,11 +631,11 @@ viaIGA1SetFBStartingAddress(xf86CrtcPtr crtc, int x, int y)
Base = (y * pScrn->displayWidth + x) * (pScrn->bitsPerPixel / 8);
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Base Address: 0x%x\n",
+ "Base Address: 0x%lx\n",
Base));
Base = (Base + drmmode->front_bo->offset) >> 1;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "DRI Base Address: 0x%x\n",
+ "DRI Base Address: 0x%lx\n",
Base);
hwp->writeCrtc(hwp, 0x0D, Base & 0xFF);
commit ebf0d16a0ca4174578ece1f75789b19eb7b9c58a
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Thu Jun 2 08:00:54 2016 -0700
Added debug code for CR32 (3X5.32) and CR33 (3X5.33)
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/src/via_display.c b/src/via_display.c
index 50b9a8f..4fad6f9 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -518,6 +518,12 @@ viaIGA1Init(ScrnInfoPtr pScrn)
temp = hwp->readSeq(hwp, 0x2D);
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"SR2D: 0x%02X\n", temp));
+ temp = hwp->readCrtc(hwp, 0x32);
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "CR32: 0x%02X\n", temp));
+ temp = hwp->readCrtc(hwp, 0x33);
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "CR33: 0x%02X\n", temp));
#endif
/* 3C5.1B[7:6] - Secondary Display Engine (Gated Clock <LCK>)
commit ec7e0e48ad8ef25512772cf286d47c4d3f9d06c4
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Thu Jun 2 07:40:18 2016 -0700
Moving the location of viaIGA1SetFBStartingAddress
This function is located inside via_display.c.
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/src/via_display.c b/src/via_display.c
index c0e5cb1..50b9a8f 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -610,6 +610,60 @@ viaIGA1Init(ScrnInfoPtr pScrn)
}
void
+viaIGA1SetFBStartingAddress(xf86CrtcPtr crtc, int x, int y)
+{
+ ScrnInfoPtr pScrn = crtc->scrn;
+ VIAPtr pVia = VIAPTR(pScrn);
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
+ drmmode_ptr drmmode = drmmode_crtc->drmmode;
+ CARD32 Base;
+ CARD8 cr0c, cr0d, cr34, cr48;
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Entered viaIGA1SetFBStartingAddress.\n"));
+
+ Base = (y * pScrn->displayWidth + x) * (pScrn->bitsPerPixel / 8);
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Base Address: 0x%x\n",
+ Base));
+ Base = (Base + drmmode->front_bo->offset) >> 1;
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "DRI Base Address: 0x%x\n",
+ Base);
+
+ hwp->writeCrtc(hwp, 0x0D, Base & 0xFF);
+ hwp->writeCrtc(hwp, 0x0C, (Base & 0xFF00) >> 8);
+
+ /* FIXME The proper starting address for CR48 is 0x1F - Bits[28:24] */
+ if (!(pVia->Chipset == VIA_CLE266 && CLE266_REV_IS_AX(pVia->ChipRev))) {
+ ViaCrtcMask(hwp, 0x48, Base >> 24, 0x0F);
+ }
+
+ /* CR34 are fire bits. Must be written after CR0C, CR0D, and CR48. */
+ hwp->writeCrtc(hwp, 0x34, (Base & 0xFF0000) >> 16);
+
+#ifdef HAVE_DEBUG
+ cr0d = hwp->readCrtc(hwp, 0x0D);
+ cr0c = hwp->readCrtc(hwp, 0x0C);
+ cr34 = hwp->readCrtc(hwp, 0x34);
+ cr48 = hwp->readCrtc(hwp, 0x48);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "CR0D: 0x%02x\n", cr0d));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "CR0C: 0x%02x\n", cr0c));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "CR34: 0x%02x\n", cr34));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "CR48: 0x%02x\n", cr48));
+#endif
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Exiting viaIGA1SetFBStartingAddress.\n"));
+}
+
+void
viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
{
vgaHWPtr hwp = VGAHWPTR(pScrn);
@@ -1006,60 +1060,6 @@ viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
"Exiting viaIGA1SetDisplayRegister.\n"));
}
-void
-viaIGA1SetFBStartingAddress(xf86CrtcPtr crtc, int x, int y)
-{
- ScrnInfoPtr pScrn = crtc->scrn;
- VIAPtr pVia = VIAPTR(pScrn);
- vgaHWPtr hwp = VGAHWPTR(pScrn);
- drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
- drmmode_ptr drmmode = drmmode_crtc->drmmode;
- CARD32 Base;
- CARD8 cr0c, cr0d, cr34, cr48;
-
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Entered viaIGA1SetFBStartingAddress.\n"));
-
- Base = (y * pScrn->displayWidth + x) * (pScrn->bitsPerPixel / 8);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Base Address: 0x%x\n",
- Base));
- Base = (Base + drmmode->front_bo->offset) >> 1;
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "DRI Base Address: 0x%x\n",
- Base);
-
- hwp->writeCrtc(hwp, 0x0D, Base & 0xFF);
- hwp->writeCrtc(hwp, 0x0C, (Base & 0xFF00) >> 8);
-
- /* FIXME The proper starting address for CR48 is 0x1F - Bits[28:24] */
- if (!(pVia->Chipset == VIA_CLE266 && CLE266_REV_IS_AX(pVia->ChipRev))) {
- ViaCrtcMask(hwp, 0x48, Base >> 24, 0x0F);
- }
-
- /* CR34 are fire bits. Must be written after CR0C, CR0D, and CR48. */
- hwp->writeCrtc(hwp, 0x34, (Base & 0xFF0000) >> 16);
-
-#ifdef HAVE_DEBUG
- cr0d = hwp->readCrtc(hwp, 0x0D);
- cr0c = hwp->readCrtc(hwp, 0x0C);
- cr34 = hwp->readCrtc(hwp, 0x34);
- cr48 = hwp->readCrtc(hwp, 0x48);
-
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "CR0D: 0x%02x\n", cr0d));
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "CR0C: 0x%02x\n", cr0c));
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "CR34: 0x%02x\n", cr34));
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "CR48: 0x%02x\n", cr48));
-#endif
-
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Exiting viaIGA1SetFBStartingAddress.\n"));
-}
-
/*
* Checks for limitations imposed by the available VGA timing registers.
*/
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