[Openchrome-devel] xf86-video-openchrome: 2 commits - configure.ac src/via_vt1632.c
Kevin Brace
kevinbrace at kemper.freedesktop.org
Sun Jun 12 04:23:30 UTC 2016
configure.ac | 2 +-
src/via_vt1632.c | 31 ++++++++++++++++++++++++++++---
2 files changed, 29 insertions(+), 4 deletions(-)
New commits:
commit b57d2f95275f6ef0db098773a48b1cfbb442acac
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sat Jun 11 23:16:52 2016 -0500
Version bumped to 0.4.179
Initial support for VT1632A based DVI attached to VX855 chipset's
DVP1 (Digital Video Port 1). It is possible that the code might also
work with CX700, VX700, VX800, and VX900 chipsets.
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/configure.ac b/configure.ac
index 851f0ce..339da33 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
# Initialize Autoconf
AC_PREREQ(2.57)
AC_INIT([xf86-video-openchrome],
- [0.4.178],
+ [0.4.179],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/openchrome],
[xf86-video-openchrome])
commit 7cb19d9843dcb4cd5107c1a0851403c48b6db6be
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sat Jun 11 23:15:06 2016 -0500
VT1632A is finally working with VX855 chipset!
The VT1632A register settings might be too specific to Wyse C00X
thin client, but with this commit, DVI is now working with that unit.
VT1632A is connected to DVP1 (Digital Video Port 1), and the device
driver is (somehow) using IGA2 for DVI. It is possible that one might
be able to do use 2 monitors (VGA and DVI) simultaneously in a
non-clone mode. This also means that the current code might also work
with CX700, VX700, VX800, and VX900 chipsets.
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/src/via_vt1632.c b/src/via_vt1632.c
index b3ed6ba..c82d3a8 100644
--- a/src/via_vt1632.c
+++ b/src/via_vt1632.c
@@ -165,10 +165,35 @@ via_vt1632_mode_set(xf86OutputPtr output, DisplayModePtr mode,
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"VT1632A: Enabling DVI.\n");
- xf86I2CWriteByte(Private->VT1632I2CDev, 0x0C, 0x89);
+
+ via_vt1632_dump_registers(pScrn, Private->VT1632I2CDev);
+
+ /* For Wyse C00X VX855 chipset DVP1 (Digital Video Port 1), use
+ * 12-bit mode with dual edge transfer, along with rising edge
+ * data capture first mode. This is likely true for CX700, VX700,
+ * VX800, and VX900 chipsets as well. */
xf86I2CWriteByte(Private->VT1632I2CDev, 0x08,
- VIA_VT1632_VEN | VIA_VT1632_HEN | VIA_VT1632_EDGE |
- VIA_VT1632_PDB);
+ VIA_VT1632_VEN | VIA_VT1632_HEN |
+ VIA_VT1632_DSEL |
+ VIA_VT1632_EDGE | VIA_VT1632_PDB);
+
+ /* Route receiver detect bit (Offset 0x09[2]) as the output of
+ * MSEN pin. */
+ xf86I2CWriteByte(Private->VT1632I2CDev, 0x09, 0x20);
+
+ /* Turning on deskew feature caused screen display issues.
+ * This was observed with Wyse C00X. */
+ xf86I2CWriteByte(Private->VT1632I2CDev, 0x0A, 0x00);
+
+ /* While VIA Technologies VT1632A datasheet insists on setting this
+ * register to 0x89 as the recommended setting, in practice, this
+ * leads to a blank screen on the display with Wyse C00X. According to
+ * Silicon Image SiI 164 datasheet (VT1632A is a pin and mostly
+ * register compatible chip), offset 0x0C is for PLL filter enable,
+ * PLL filter setting, and continuous SYNC enable bits. All of these are
+ * turned off for proper operation. */
+ xf86I2CWriteByte(Private->VT1632I2CDev, 0x0C, 0x00);
+
via_vt1632_dump_registers(pScrn, Private->VT1632I2CDev);
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
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