[Openchrome-devel] xf86-video-openchrome: 6 commits - configure.ac src/via_display.c
Kevin Brace
kevinbrace at kemper.freedesktop.org
Wed Jun 15 08:48:01 UTC 2016
configure.ac | 2
src/via_display.c | 172 ++++++++++++++++++++++++++++--------------------------
2 files changed, 91 insertions(+), 83 deletions(-)
New commits:
commit d9fed7a810bf03d2576e3e452c7a680cbfdb29c5
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Wed Jun 15 03:47:29 2016 -0500
Version bumped to 0.4.188
Version bumped to 0.4.18
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/configure.ac b/configure.ac
index 5dd0f8d..de2bb89 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
# Initialize Autoconf
AC_PREREQ(2.57)
AC_INIT([xf86-video-openchrome],
- [0.4.187],
+ [0.4.188],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/openchrome],
[xf86-video-openchrome])
commit 3083b8126a6aaed8abd9f888e746c6c260fade55
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Wed Jun 15 03:38:52 2016 -0500
Tweaking comments within viaIGA2SetDisplayRegister function
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/src/via_display.c b/src/via_display.c
index 0ffeb11..696bb31 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -2044,6 +2044,7 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Entered viaIGA2SetDisplayRegister.\n"));
+
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Requested Screen Mode: %s\n", mode->name);
@@ -2104,10 +2105,10 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
"IGA2 CrtcHTotal: %d\n", mode->CrtcHTotal));
temp = mode->CrtcHTotal - 1;
- /* 3X5.50[7:0]: Horizontal Total Period Bits[7:0] */
+ /* 3X5.50[7:0] - Horizontal Total Period Bits [7:0] */
hwp->writeCrtc(hwp, 0x50, temp & 0xFF);
- /* 3X5.55[3:0]: Horizontal Total Period Bits[11:8] */
+ /* 3X5.55[3:0] - Horizontal Total Period Bits [11:8] */
ViaCrtcMask(hwp, 0x55, temp >> 8, 0x0F);
@@ -2117,10 +2118,10 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
"IGA2 CrtcHDisplay: %d\n", mode->CrtcHDisplay));
temp = mode->CrtcHDisplay - 1;
- /* 3X5.51[7:0]: Horizontal Active Data Period Bits[7:0] */
+ /* 3X5.51[7:0] - Horizontal Active Data Period Bits [7:0] */
hwp->writeCrtc(hwp, 0x51, temp & 0xFF);
- /* 3X5.55[6:4]: Horizontal Active Data Period Bits[10:8] */
+ /* 3X5.55[6:4] - Horizontal Active Data Period Bits [10:8] */
ViaCrtcMask(hwp, 0x55, temp >> 4, 0x70);
@@ -2130,10 +2131,10 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
"IGA2 CrtcHBlankStart: %d\n", mode->CrtcHBlankStart));
temp = mode->CrtcHBlankStart;
- /* 3X5.52[7:0]: Horizontal Blanking Start Bits[7:0] */
+ /* 3X5.52[7:0] - Horizontal Blanking Start Bits [7:0] */
hwp->writeCrtc(hwp, 0x52, temp & 0xFF);
- /* 3X5.54[2:0]: Horizontal Blanking Start Bits[10:8] */
+ /* 3X5.54[2:0] - Horizontal Blanking Start Bits [10:8] */
ViaCrtcMask(hwp, 0x54, temp >> 8, 0x07);
@@ -2143,13 +2144,13 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
"IGA2 CrtcHBlankEnd: %d\n", mode->CrtcHBlankEnd));
temp = mode->CrtcHBlankEnd - 1;
- /* 3X5.53[7:0]: Horizontal Blanking End Bits[7:0] */
+ /* 3X5.53[7:0] - Horizontal Blanking End Bits [7:0] */
hwp->writeCrtc(hwp, 0x53, temp & 0xFF);
- /* 3X5.54[5:3]: Horizontal Blanking End Bits[10:8] */
+ /* 3X5.54[5:3] - Horizontal Blanking End Bits [10:8] */
ViaCrtcMask(hwp, 0x54, temp >> 5, 0x38);
- /* 3X5.5D[6]: Horizontal Blanking End Bits[11] */
+ /* 3X5.5D[6] - Horizontal Blanking End Bit [11] */
ViaCrtcMask(hwp, 0x5D, temp >> 5, 0x40);
@@ -2160,20 +2161,20 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
"IGA2 CrtcHSyncStart: %d\n", mode->CrtcHSyncStart));
temp = mode->CrtcHSyncStart;
- /* 3X5.56[7:0]: Horizontal Retrace Start Bits[7:0] */
+ /* 3X5.56[7:0] - Horizontal Retrace Start Bits [7:0] */
hwp->writeCrtc(hwp, 0x56, temp & 0xFF);
- /* 3X5.54[7:6]: Horizontal Retrace Start Bits[9:8] */
+ /* 3X5.54[7:6] - Horizontal Retrace Start Bits [9:8] */
ViaCrtcMask(hwp, 0x54, temp >> 2, 0xC0);
- /* 3X5.5C[7]: Horizontal Retrace Start Bits[10] */
+ /* 3X5.5C[7] - Horizontal Retrace Start Bit [10] */
ViaCrtcMask(hwp, 0x5C, temp >> 3, 0x80);
/* For UniChrome Pro and Chrome9. */
if ((pVia->Chipset != VIA_CLE266)
&& (pVia->Chipset != VIA_KM400)) {
- /* 3X5.5D[7]: Horizontal Retrace Start Bits[11] */
+ /* 3X5.5D[7] - Horizontal Retrace Start Bit [11] */
ViaCrtcMask(hwp, 0x5D, temp >> 4, 0x80);
}
@@ -2184,10 +2185,10 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
"IGA2 CrtcHSyncEnd: %d\n", mode->CrtcHSyncEnd));
temp = mode->CrtcHSyncEnd - 1;
- /* 3X5.57[7:0]: Horizontal Retrace End Bits[7:0] */
+ /* 3X5.57[7:0] - Horizontal Retrace End Bits [7:0] */
hwp->writeCrtc(hwp, 0x57, temp & 0xFF);
- /* 3X5.5C[6]: Horizontal Retrace End Bits[8] */
+ /* 3X5.5C[6] - Horizontal Retrace End Bit [8] */
ViaCrtcMask(hwp, 0x5C, temp >> 2, 0x40);
@@ -2197,10 +2198,10 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
"IGA2 CrtcVTotal: %d\n", mode->CrtcVTotal));
temp = mode->CrtcVTotal - 1;
- /* 3X5.58[7:0]: Vertical Total Period Bits[7:0] */
+ /* 3X5.58[7:0] - Vertical Total Period Bits [7:0] */
hwp->writeCrtc(hwp, 0x58, temp & 0xFF);
- /* 3X5.5D[2:0]: Vertical Total Period Bits[10:8] */
+ /* 3X5.5D[2:0] - Vertical Total Period Bits [10:8] */
ViaCrtcMask(hwp, 0x5D, temp >> 8, 0x07);
@@ -2210,10 +2211,10 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
"IGA2 CrtcVDisplay: %d\n", mode->CrtcVDisplay));
temp = mode->CrtcVDisplay - 1;
- /* 3X5.59[7:0]: Vertical Active Data Period Bits[7:0] */
+ /* 3X5.59[7:0] - Vertical Active Data Period Bits [7:0] */
hwp->writeCrtc(hwp, 0x59, temp & 0xFF);
- /* 3X5.5D[5:3]: Vertical Active Data Period Bits[10:8] */
+ /* 3X5.5D[5:3] - Vertical Active Data Period Bits [10:8] */
ViaCrtcMask(hwp, 0x5D, temp >> 5, 0x38);
@@ -2223,10 +2224,10 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
"IGA2 CrtcVBlankStart: %d\n", mode->CrtcVBlankStart));
temp = mode->CrtcVBlankStart;
- /* 3X5.5A[7:0]: Vertical Blanking Start Bits[7:0] */
+ /* 3X5.5A[7:0] - Vertical Blanking Start Bits [7:0] */
hwp->writeCrtc(hwp, 0x5A, temp & 0xFF);
- /* 3X5.5C[2:0]: Vertical Blanking Start Bits[10:8] */
+ /* 3X5.5C[2:0] - Vertical Blanking Start Bits [10:8] */
ViaCrtcMask(hwp, 0x5C, temp >> 8, 0x07);
@@ -2236,10 +2237,10 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
"IGA2 CrtcVBlankEnd: %d\n", mode->CrtcVBlankEnd));
temp = mode->CrtcVBlankEnd - 1;
- /* 3X5.5B[7:0]: Vertical Blanking End Bits[7:0] */
+ /* 3X5.5B[7:0] - Vertical Blanking End Bits [7:0] */
hwp->writeCrtc(hwp, 0x5B, temp & 0xFF);
- /* 3X5.5C[5:3]: Vertical Blanking End Bits[10:8] */
+ /* 3X5.5C[5:3] - Vertical Blanking End Bits [10:8] */
ViaCrtcMask(hwp, 0x5C, temp >> 5, 0x38);
@@ -2249,10 +2250,10 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
"IGA2 CrtcVSyncStart: %d\n", mode->CrtcVSyncStart));
temp = mode->CrtcVSyncStart;
- /* 3X5.5E[7:0]: Vertical Retrace Start Bits[7:0] */
+ /* 3X5.5E[7:0] - Vertical Retrace Start Bits [7:0] */
hwp->writeCrtc(hwp, 0x5E, temp & 0xFF);
- /* 3X5.5F[7:5]: Vertical Retrace Start Bits[10:8] */
+ /* 3X5.5F[7:5] - Vertical Retrace Start Bits [10:8] */
ViaCrtcMask(hwp, 0x5F, temp >> 3, 0xE0);
@@ -2262,7 +2263,7 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
"IGA2 CrtcVSyncEnd: %d\n", mode->CrtcVSyncEnd));
temp = mode->CrtcVSyncEnd - 1;
- /*3X5.5F[4:0]: Vertical Retrace End[4:0] */
+ /*3X5.5F[4:0] - Vertical Retrace End Bits [4:0] */
ViaCrtcMask(hwp, 0x5F, temp & 0x1F, 0x1F);
@@ -2275,10 +2276,10 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
temp &= ~0x03;
}
- /* 3X5.66[7:0]: Second Display Horizontal Offset Bits[7:0] */
+ /* 3X5.66[7:0] - Second Display Horizontal Offset Bits [7:0] */
hwp->writeCrtc(hwp, 0x66, temp & 0xFF);
- /* 3X5.67[1:0]: Second Display Horizontal Offset Bits[9:8] */
+ /* 3X5.67[1:0] - Second Display Horizontal Offset Bits [9:8] */
ViaCrtcMask(hwp, 0x67, temp >> 8, 0x03);
@@ -2291,15 +2292,14 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
temp &= ~0x03;
}
- /* 3X5.65[7:0]: Second Display Horizontal
- * 2-Quadword Count Data Bits[7:0] */
+ /* 3X5.65[7:0] - Second Display Horizontal
+ * 2-Quadword Count Data Bits [7:0] */
hwp->writeCrtc(hwp, 0x65, (temp >> 1) & 0xFF);
- /* 3X5.67[3:2]: Second Display Horizontal
- * 2-Quadword Count Data Bits[9:8] */
+ /* 3X5.67[3:2] - Second Display Horizontal
+ * 2-Quadword Count Data Bits [9:8] */
ViaCrtcMask(hwp, 0x67, temp >> 7, 0x0C);
-
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Exiting viaIGA2SetDisplayRegister.\n"));
}
commit 7a7c5005e4512b9178a2cb8524773a4f6274cd1c
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Wed Jun 15 03:29:49 2016 -0500
Removing unnecessary ANDing when calling ViaCrtcMask
This was occurring within viaIGA2SetDisplayRegister function.
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/src/via_display.c b/src/via_display.c
index 1fbd3c5..0ffeb11 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -2108,7 +2108,7 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
hwp->writeCrtc(hwp, 0x50, temp & 0xFF);
/* 3X5.55[3:0]: Horizontal Total Period Bits[11:8] */
- ViaCrtcMask(hwp, 0x55, (temp >> 8) & 0x0F, 0x0F);
+ ViaCrtcMask(hwp, 0x55, temp >> 8, 0x0F);
/* Set IGA2 horizontal display end position. */
@@ -2121,7 +2121,7 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
hwp->writeCrtc(hwp, 0x51, temp & 0xFF);
/* 3X5.55[6:4]: Horizontal Active Data Period Bits[10:8] */
- ViaCrtcMask(hwp, 0x55, (temp >> 4) & 0x70, 0x70);
+ ViaCrtcMask(hwp, 0x55, temp >> 4, 0x70);
/* Set IGA2 horizontal blank start. */
@@ -2134,7 +2134,7 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
hwp->writeCrtc(hwp, 0x52, temp & 0xFF);
/* 3X5.54[2:0]: Horizontal Blanking Start Bits[10:8] */
- ViaCrtcMask(hwp, 0x54, (temp >> 8) & 0x07, 0x07);
+ ViaCrtcMask(hwp, 0x54, temp >> 8, 0x07);
/* Set IGA2 horizontal blank end. */
@@ -2147,10 +2147,10 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
hwp->writeCrtc(hwp, 0x53, temp & 0xFF);
/* 3X5.54[5:3]: Horizontal Blanking End Bits[10:8] */
- ViaCrtcMask(hwp, 0x54, (temp >> 5) & 0x38, 0x38);
+ ViaCrtcMask(hwp, 0x54, temp >> 5, 0x38);
/* 3X5.5D[6]: Horizontal Blanking End Bits[11] */
- ViaCrtcMask(hwp, 0x5D, (temp >> 5) & 0x40, 0x40);
+ ViaCrtcMask(hwp, 0x5D, temp >> 5, 0x40);
/* Set IGA2 horizontal synchronization start. */
@@ -2164,17 +2164,17 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
hwp->writeCrtc(hwp, 0x56, temp & 0xFF);
/* 3X5.54[7:6]: Horizontal Retrace Start Bits[9:8] */
- ViaCrtcMask(hwp, 0x54, (temp >> 2) & 0xC0, 0xC0);
+ ViaCrtcMask(hwp, 0x54, temp >> 2, 0xC0);
/* 3X5.5C[7]: Horizontal Retrace Start Bits[10] */
- ViaCrtcMask(hwp, 0x5C, (temp >> 3) & 0x80, 0x80);
+ ViaCrtcMask(hwp, 0x5C, temp >> 3, 0x80);
/* For UniChrome Pro and Chrome9. */
if ((pVia->Chipset != VIA_CLE266)
&& (pVia->Chipset != VIA_KM400)) {
/* 3X5.5D[7]: Horizontal Retrace Start Bits[11] */
- ViaCrtcMask(hwp, 0x5D, (temp >> 4) & 0x80, 0x80);
+ ViaCrtcMask(hwp, 0x5D, temp >> 4, 0x80);
}
@@ -2188,7 +2188,7 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
hwp->writeCrtc(hwp, 0x57, temp & 0xFF);
/* 3X5.5C[6]: Horizontal Retrace End Bits[8] */
- ViaCrtcMask(hwp, 0x5C, (temp >> 2) & 0x40, 0x40);
+ ViaCrtcMask(hwp, 0x5C, temp >> 2, 0x40);
/* Set IGA2 vertical total pixels. */
@@ -2201,7 +2201,7 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
hwp->writeCrtc(hwp, 0x58, temp & 0xFF);
/* 3X5.5D[2:0]: Vertical Total Period Bits[10:8] */
- ViaCrtcMask(hwp, 0x5D, (temp >> 8) & 0x07, 0x07);
+ ViaCrtcMask(hwp, 0x5D, temp >> 8, 0x07);
/* Set IGA2 vertical display end position. */
@@ -2214,7 +2214,7 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
hwp->writeCrtc(hwp, 0x59, temp & 0xFF);
/* 3X5.5D[5:3]: Vertical Active Data Period Bits[10:8] */
- ViaCrtcMask(hwp, 0x5D, (temp >> 5) & 0x38, 0x38);
+ ViaCrtcMask(hwp, 0x5D, temp >> 5, 0x38);
/* Set IGA2 vertical blank start. */
@@ -2227,7 +2227,7 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
hwp->writeCrtc(hwp, 0x5A, temp & 0xFF);
/* 3X5.5C[2:0]: Vertical Blanking Start Bits[10:8] */
- ViaCrtcMask(hwp, 0x5C, (temp >> 8) & 0x07, 0x07);
+ ViaCrtcMask(hwp, 0x5C, temp >> 8, 0x07);
/* Set IGA2 vertical blank end. */
@@ -2240,7 +2240,7 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
hwp->writeCrtc(hwp, 0x5B, temp & 0xFF);
/* 3X5.5C[5:3]: Vertical Blanking End Bits[10:8] */
- ViaCrtcMask(hwp, 0x5C, (temp >> 5) & 0x38, 0x38);
+ ViaCrtcMask(hwp, 0x5C, temp >> 5, 0x38);
/* Set IGA2 vertical synchronization start. */
@@ -2253,7 +2253,7 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
hwp->writeCrtc(hwp, 0x5E, temp & 0xFF);
/* 3X5.5F[7:5]: Vertical Retrace Start Bits[10:8] */
- ViaCrtcMask(hwp, 0x5F, (temp >> 3) & 0xE0, 0xE0);
+ ViaCrtcMask(hwp, 0x5F, temp >> 3, 0xE0);
/* Set IGA2 vertical synchronization end. */
@@ -2279,7 +2279,7 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
hwp->writeCrtc(hwp, 0x66, temp & 0xFF);
/* 3X5.67[1:0]: Second Display Horizontal Offset Bits[9:8] */
- ViaCrtcMask(hwp, 0x67, (temp >> 8) & 0x03, 0x03);
+ ViaCrtcMask(hwp, 0x67, temp >> 8, 0x03);
/* Set IGA2 alignment. */
commit da08fb04d2dfd23b080073be08e65f95c9f0130d
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Wed Jun 15 03:21:13 2016 -0500
Shifting code that sets certain IGA1 registers
Trying to make the code more consistent.
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/src/via_display.c b/src/via_display.c
index 08d0b53..1fbd3c5 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -856,12 +856,54 @@ viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
hwp->writeSeq(hwp, 0x03, 0x00);
hwp->writeSeq(hwp, 0x04, 0x0E);
+
+ /* Setting maximum scan line to 0. */
+ /* 3X5.09[4:0] - Maximum Scan Line */
+ ViaCrtcMask(hwp, 0x09, 0x00, 0x1F);
+
+
+ /* 3X5.14[6] - Double Word Mode
+ * Allows normal addressing or double-word addressing.
+ * 0: Normal word addressing
+ * 1: Double word addressing
+ * 3X5.14[4:0] - Underline Location */
+ ViaCrtcMask(hwp, 0x14, 0x00, 0x5F);
+
+
+ /* We are not using the split screen feature so line compare register
+ * should be set to 0x7FF. */
+ temp = 0x7FF;
+
+ /* 3X5.18[7:0] - Line Compare Bits [7:0] */
+ hwp->writeCrtc(hwp, 0x18, temp & 0xFF);
+
+ /* 3X5.07[4] - Line Compare Bit [8] */
+ ViaCrtcMask(hwp, 0x07, temp >> 4, 0x10);
+
+ /* 3X5.09[6] - Line Compare Bit [9] */
+ ViaCrtcMask(hwp, 0x09, temp >> 3, 0x40);
+
+ /* 3X5.35[4] - Line Compare Bit [10] */
+ ViaCrtcMask(hwp, 0x35, temp >> 6, 0x10);
+
+
/* Set the color depth for IGA1. */
switch (pScrn->bitsPerPixel) {
case 8:
/* Only CLE266.AX uses 6-bit LUT. */
if (pVia->Chipset == VIA_CLE266 && pVia->ChipRev < 15) {
/* 6-bit LUT */
+ /* 3C5.15[7] - 8/6 Bits LUT
+ * 0: 6-bit
+ * 1: 8-bit
+ * 3C5.15[4] - Hi Color Mode Select
+ * 0: 555
+ * 1: 565
+ * 3C5.15[3:2] - Display Color Depth Select
+ * 00: 8bpp
+ * 01: 16bpp
+ * 10: 30bpp
+ * 11: 32bpp */
ViaSeqMask(hwp, 0x15, 0x00, 0x9C);
} else {
/* 8-bit LUT */
@@ -870,17 +912,6 @@ viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
break;
case 16:
- /* 3C5.15[7] - 8/6 Bits LUT
- * 0: 6-bit
- * 1: 8-bit
- * 3C5.15[4] - Hi Color Mode Select
- * 0: 555
- * 1: 565
- * 3C5.15[3:2] - Display Color Depth Select
- * 00: 8bpp
- * 01: 16bpp
- * 10: 30bpp
- * 11: 32bpp */
ViaSeqMask(hwp, 0x15, 0x94, 0x9C);
break;
case 24:
@@ -1200,36 +1231,6 @@ viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
ViaSeqMask(hwp, 0x1D, temp >> 8, 0x03);
- /* We are not using the split screen feature so line compare register
- * should be set to 0x7FF. */
- temp = 0x7FF;
-
- /* 3X5.18[7:0] - Line Compare Bits [7:0] */
- hwp->writeCrtc(hwp, 0x18, temp & 0xFF);
-
- /* 3X5.07[4] - Line Compare Bit [8] */
- ViaCrtcMask(hwp, 0x07, temp >> 4, 0x10);
-
- /* 3X5.09[6] - Line Compare Bit [9] */
- ViaCrtcMask(hwp, 0x09, temp >> 3, 0x40);
-
- /* 3X5.35[4] - Line Compare Bit [10] */
- ViaCrtcMask(hwp, 0x35, temp >> 6, 0x10);
-
-
- /* Setting maximum scan line to 0. */
- /* 3X5.09[4:0] - Maximum Scan Line */
- ViaCrtcMask(hwp, 0x09, 0x00, 0x1F);
-
-
- /* 3X5.14[6] - Double Word Mode
- * Allows normal addressing or double-word addressing.
- * 0: Normal word addressing
- * 1: Double word addressing
- * 3X5.14[4:0] - Underline Location */
- ViaCrtcMask(hwp, 0x14, 0x00, 0x5F);
-
-
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Exiting viaIGA1SetDisplayRegister.\n"));
}
commit 7764ca3a66a313d473ef69bfdbe1e4dd2c35140e
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Tue Jun 14 23:52:35 2016 -0500
Cleaning up IGA1 code that sets Maximum Scan Line and Underline Location
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/src/via_display.c b/src/via_display.c
index ff870ed..08d0b53 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -1217,9 +1217,18 @@ viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
ViaCrtcMask(hwp, 0x35, temp >> 6, 0x10);
- /* zero Maximum scan line */
+ /* Setting maximum scan line to 0. */
+ /* 3X5.09[4:0] - Maximum Scan Line */
ViaCrtcMask(hwp, 0x09, 0x00, 0x1F);
- hwp->writeCrtc(hwp, 0x14, 0x00);
+
+
+ /* 3X5.14[6] - Double Word Mode
+ * Allows normal addressing or double-word addressing.
+ * 0: Normal word addressing
+ * 1: Double word addressing
+ * 3X5.14[4:0] - Underline Location */
+ ViaCrtcMask(hwp, 0x14, 0x00, 0x5F);
+
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Exiting viaIGA1SetDisplayRegister.\n"));
commit a0a82cf6ad8f1a95a723789c1594ba489c7d166f
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Tue Jun 14 23:11:42 2016 -0500
Getting rid of an unnecessary write to CR33
CR33 (3X5.33) is already set to the proper value somewhere else, so
there is no need to tinker near the end of viaIGA1SetDisplayRegister
function.
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/src/via_display.c b/src/via_display.c
index ecc1093..ff870ed 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -1217,8 +1217,6 @@ viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
ViaCrtcMask(hwp, 0x35, temp >> 6, 0x10);
- ViaCrtcMask(hwp, 0x33, 0x06, 0x07);
-
/* zero Maximum scan line */
ViaCrtcMask(hwp, 0x09, 0x00, 0x1F);
hwp->writeCrtc(hwp, 0x14, 0x00);
More information about the Openchrome-devel
mailing list