[Openchrome-devel] xf86-video-openchrome: 5 commits - configure.ac src/via_display.c src/via_outputs.c

Kevin Brace kevinbrace at kemper.freedesktop.org
Sun Jun 26 21:34:42 UTC 2016


 configure.ac      |    2 +-
 src/via_display.c |   40 ++++++++++++++--------------------------
 src/via_outputs.c |   22 +++++++++++-----------
 3 files changed, 26 insertions(+), 38 deletions(-)

New commits:
commit bbdceda662fcb245b33806514d4a3c7b565c9786
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Sun Jun 26 16:20:36 2016 -0500

    Version bumped to 0.4.903 (Version 0.5 RC4)
    
    Various minor issues were taken cared of in this fourth release
    candidate.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/configure.ac b/configure.ac
index 9d4dc32..4963fa9 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
 # Initialize Autoconf
 AC_PREREQ(2.57)
 AC_INIT([xf86-video-openchrome],
-        [0.4.902],
+        [0.4.903],
         [https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/openchrome],
         [xf86-video-openchrome])
 
commit cec30ecef8115a43474f2dc7946be130237e9436
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Sun Jun 26 15:51:47 2016 -0500

    Removal of questionable lines of code from viaIGA1SetDisplayRegister
    
    It was access to SR1A (3C5.1A) that was key to this portion of
    the code. Removing this line led CLE266 and KM400 to freeze right
    after X.Org Server booted. It appears that setting SR1A bit 6 to 0
    resolves the bug. This bit performs reset of VIA IGP from software.
    It is likely that this bit was set to 1 in CLE266 and KM400 chipsets
    for some reason. Now viaIGAInitCommon function handles the zero
    clearing of this bit.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/src/via_display.c b/src/via_display.c
index 1f18285..0eda809 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -403,7 +403,7 @@ viaIGAInitCommon(ScrnInfoPtr pScrn)
      *                Primary Display’s LUT
      *             1: 3C6/3C7/3C8/3C9 addresses map to
      *                Secondary Display’s LUT */
-    ViaSeqMask(hwp, 0x1A, 0x88, 0x88);
+    ViaSeqMask(hwp, 0x1A, 0x88, 0xC8);
 
     /* Set DVP0 data drive strength to 0b11 (highest). */
     /* 3C5.1B[1]   - DVP0 Data Drive Strength Bit [0]
@@ -925,22 +925,6 @@ viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
         break;
     }
 
-    switch (pVia->Chipset) {
-        case VIA_CX700:
-        case VIA_K8M890:
-        case VIA_P4M900:
-        case VIA_VX800:
-        case VIA_VX855:
-        case VIA_VX900:
-            break;
-        default:
-            ViaSeqMask(hwp, 0x16, 0x08, 0xBF);
-            ViaSeqMask(hwp, 0x17, 0x1F, 0xFF);
-            ViaSeqMask(hwp, 0x18, 0x4E, 0xFF);
-            ViaSeqMask(hwp, 0x1A, 0x08, 0xF9);
-            break;
-    }
-
 
     /* 3X5.32[7:5] - HSYNC Delay Number by VCLK
      *               000: No delay
commit 11f03eb040eb4c98342f9e034b0dd10858930fd4
Author: Xavier Bachelot <xavier at bachelot.org>
Date:   Sun Jun 26 15:40:00 2016 -0500

    Properly use bitwise operators in viaProbePinStrapping
    
    Signed-off-by: Xavier Bachelot <xavier at bachelot.org>
    Suggested-by: Mario J. Rugiero <mrugiero at gmail.com>
    Acked-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/src/via_outputs.c b/src/via_outputs.c
index fc6ddb5..30602dd 100644
--- a/src/via_outputs.c
+++ b/src/via_outputs.c
@@ -1045,7 +1045,7 @@ viaProbePinStrapping(ScrnInfoPtr pScrn)
         /* 3C5.12[4] - FPD17 pin strapping
          *             0: TMDS transmitter (DVI) / capture device
          *             1: Flat panel */
-        if (sr12 && 0x10) {
+        if (sr12 & 0x10) {
             xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                         "A flat panel is connected to "
                         "flat panel interface.\n");
@@ -1065,7 +1065,7 @@ viaProbePinStrapping(ScrnInfoPtr pScrn)
         /* 3C5.12[5] - FPD18 pin strapping
          *             0: TMDS transmitter (DVI)
          *             1: TV encoder */
-        if (sr12 && 0x20) {
+        if (sr12 & 0x20) {
             xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                         "A TMDS transmitter (DVI) is connected to "
                         "DVI port.\n");
@@ -1079,17 +1079,17 @@ viaProbePinStrapping(ScrnInfoPtr pScrn)
              *               01: NTSC
              *               10: PAL-N
              *               11: PAL-NC */
-            if (sr13 && 0x04) {
+            if (sr13 & 0x04) {
                 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                             "NTSC for the TV encoder.\n");
             } else {
-                if (!(sr13 && 0x08)) {
+                if (!(sr13 & 0x08)) {
                     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                                 "PAL for the TV encoder.\n");
                 } else {
                     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                                 "PAL%s for the TV encoder.\n",
-                                sr13 && 0x04 ? "-NC" : "-N");
+                                sr13 & 0x04 ? "-NC" : "-N");
                 }
             }
 
@@ -1098,7 +1098,7 @@ viaProbePinStrapping(ScrnInfoPtr pScrn)
              *             1: 625 lines (PAL) */
             xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                         "%s lines for the TV encoder.\n",
-                        sr12 && 0x40 ? "625" : "525");
+                        sr12 & 0x40 ? "625" : "525");
         }
 
         break;
@@ -1112,12 +1112,12 @@ viaProbePinStrapping(ScrnInfoPtr pScrn)
          *                DVI or TV out use
          *             1: Enable DVP0 (Digital Video Port 0) for
          *                DVI or TV out use */
-        if (sr12 && 0x40) {
+        if (sr12 & 0x40) {
 
             /* 3C5.12[5] - DVP0D5 pin strapping
              *             0: TMDS transmitter (DVI)
              *             1: TV encoder */
-            if (sr12 && 0x20) {
+            if (sr12 & 0x20) {
                 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                             "A TV encoder is detected on "
                             "DVP0 (Digital Video Port 0).\n");
@@ -1133,12 +1133,12 @@ viaProbePinStrapping(ScrnInfoPtr pScrn)
          *             0: AGP pins are used for AGP
          *             1: AGP pins are used by FPDP
          *             (Flat Panel Display Port) */
-        if (sr13 && 0x08) {
+        if (sr13 & 0x08) {
 
             /* 3C5.12[4] - DVP0D4 pin strapping
              *             0: Dual 12-bit FPDP (Flat Panel Display Port)
              *             1: 24-bit FPDP  (Flat Panel Display Port) */
-            if (sr12 && 0x10) {
+            if (sr12 & 0x10) {
                 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                             "24-bit FPDP (Flat Panel Display Port) "
                             "detected.\n");
@@ -1159,7 +1159,7 @@ viaProbePinStrapping(ScrnInfoPtr pScrn)
                  * 3C5.12[5] - DVP0D5 pin strapping
                  *             0: TMDS transmitter (DVI)
                  *             1: TV encoder */
-                if ((!(sr12 && 0x40)) && (!(sr12 && 0x20))) {
+                if ((!(sr12 & 0x40)) && (!(sr12 & 0x20))) {
                     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                                 "A TV encoder is connected to "
                                 "FPDP (Flat Panel Display Port).\n");
commit 51a8eb647a52c14bf5a1c53745561b4108d0da7f
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Sun Jun 26 15:21:17 2016 -0500

    Updated code comments within viaIGA1Save and viaIGA1Restore
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/src/via_display.c b/src/via_display.c
index 18e85f7..1f18285 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -1404,10 +1404,12 @@ viaIGA1Save(ScrnInfoPtr pScrn)
         Regs->SR4C = hwp->readSeq(hwp, 0x4C);
 
     /* Save register 3C5.4D.
-     * According to CX700 (UniChrome Pro II) documentation, this register
-     * is called Dual Channel Memory Control.
-     * According to VX800 / VX855 / VX900 (Chrome 9 HC3 / HCM / HD)
-     * documentations, this register is called Preemptive Arbiter Control.
+     * According to CX700 / VX700 (UniChrome Pro II) Open Graphics
+     * Programming Manual Part I: Graphics Core / 2D,
+     * this register is called Dual Channel Memory Control.
+     * According to VX800 / VX855 / VX900 (Chrome9 HC3 / HCM / HD)
+     * Open Graphics Programming Manual Part I: Graphics Core / 2D,
+     * this register is called Preemptive Arbiter Control.
      * It is likely that this register is also supported in UniChrome Pro. */
         Regs->SR4D = hwp->readSeq(hwp, 0x4D);
 
@@ -1695,10 +1697,12 @@ viaIGA1Restore(ScrnInfoPtr pScrn)
     case VIA_VX900:
 
     /* Restore register 3C5.4D.
-     * According to CX700 (UniChrome Pro II) documentation, this register
-     * is called Dual Channel Memory Control.
-     * According to VX800 / VX855 / VX900 (Chrome 9 HC3 / HCM / HD)
-     * documentations, this register is called Preemptive Arbiter Control.
+     * According to CX700 / VX700 (UniChrome Pro II) Open Graphics
+     * Programming Manual Part I: Graphics Core / 2D,
+     * this register is called Dual Channel Memory Control.
+     * According to VX800 / VX855 / VX900 (Chrome9 HC3 / HCM / HD)
+     * Open Graphics Programming Manual Part I: Graphics Core / 2D,
+     * this register is called Preemptive Arbiter Control.
      * It is likely that this register is also supported in UniChrome Pro. */
         hwp->writeSeq(hwp, 0x4D, Regs->SR4D);
 
commit 0791acd804f040666cff99217aa57b0aecc8233f
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Fri Jun 24 02:25:37 2016 -0500

    Turning off LCD Simultaneous Mode Backdoor Register
    
    Since this device driver does not use LCD simultaneous
    mode, it should be turned off permanently.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/src/via_display.c b/src/via_display.c
index 696bb31..18e85f7 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -725,7 +725,7 @@ viaIGA1Init(ScrnInfoPtr pScrn)
          *             Clock Select and CRTC Register Protect
          *
          */
-        ViaCrtcMask(hwp, 0x47, 0x02, 0xEF);
+        ViaCrtcMask(hwp, 0x47, 0x00, 0xEF);
 
     }
 


More information about the Openchrome-devel mailing list