[Openchrome-devel] xf86-video-openchrome: 2 commits - src/via_display.c

[Kevin Brace]

 src/via_display.c |   25 ++++++++++++++++++++++---
 1 file changed, 22 insertions(+), 3 deletions(-)

New commits:
commit 525a42a00ca9aa9b43f3e3e87197636b12c59061
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Sun May 22 07:34:21 2016 -0700

    Cleanup of the code that sets IGA1 horizontal synchronization end
    
    viaIGA1SetDisplayRegister function contains the code in question.
    This function is located inside via_display.c.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/src/via_display.c b/src/via_display.c
index fe6272f..ce1c621 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -514,10 +514,19 @@ viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
     ViaCrtcMask(hwp, 0x33, temp >> 4, 0x10);
 
 
-    /* horizontal sync end : start + 256 */
-    temp = mode->CrtcHSyncEnd >> 3;
+    /* Set IGA1 horizontal synchronization end. */
+    /* After shifting horizontal synchronization end by 3 bit positions
+     * to the right, the 5 least significant bits are actually used.
+     * In addition to that, this particular register requires the
+     * value to be 1 less than the actual value being written. */
+    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                        "IGA1 CrtcHSyncEnd: %d\n", mode->CrtcHSyncEnd));
+    temp = (mode->CrtcHSyncEnd >> 3) - 1;
+
+    /* 3X5.05[4:0] - Horizontal Retrace End Bits [4:0] */
     ViaCrtcMask(hwp, 0x05, temp, 0x1F);
 
+
     /* vertical total : 2049 */
     temp = mode->CrtcVTotal - 2;
     hwp->writeCrtc(hwp, 0x06, temp & 0xFF);
commit 0543c1b5c9280e2611679376b4441cb495ba104b
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Sun May 22 07:09:00 2016 -0700

    Cleanup of the code that sets IGA1 horizontal synchronization start
    
    viaIGA1SetDisplayRegister function contains the code in question.
    This function is located inside via_display.c.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/src/via_display.c b/src/via_display.c
index 9a0e65e..fe6272f 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -499,11 +499,21 @@ viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
     ViaCrtcMask(hwp, 0x33, temp >> 1, 0x20);
 
 
-    /* horizontal sync start : 4095 */
+    /* Set IGA1 horizontal synchronization start. */
+    /* Due to IGA1 horizontal synchronization start being only 9 bits wide,
+     * the adjusted horizontal synchronization start needs to be shifted by
+     * 3 bit positions to the right. */
+    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                        "IGA1 CrtcHSyncStart: %d\n", mode->CrtcHSyncStart));
     temp = mode->CrtcHSyncStart >> 3;
+
+    /* 3X5.04[7:0] - Horizontal Retrace Start Bits [7:0] */
     hwp->writeCrtc(hwp, 0x04, temp & 0xFF);
+
+    /* 3X5.33[4] - Horizontal Retrace Start Bit [8] */
     ViaCrtcMask(hwp, 0x33, temp >> 4, 0x10);
 
+
     /* horizontal sync end : start + 256 */
     temp = mode->CrtcHSyncEnd >> 3;
     ViaCrtcMask(hwp, 0x05, temp, 0x1F);