[Openchrome-devel] xf86-video-openchrome: src/via_display.c src/via_driver.h
Kevin Brace
kevinbrace at kemper.freedesktop.org
Fri Jan 6 10:18:24 UTC 2017
src/via_display.c | 244 ++++++++++++++++++++++++++++++++++++++++++++----------
src/via_driver.h | 3
2 files changed, 203 insertions(+), 44 deletions(-)
New commits:
commit f8551e0e07366a70cf6aa8c3801d2965a86e170f
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Fri Jan 6 04:17:32 2017 -0600
Preparation for the partial fix of save / restore functions
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/src/via_display.c b/src/via_display.c
index a405ce2..9f3920a 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -3342,41 +3342,111 @@ viaIGA2Save(ScrnInfoPtr pScrn)
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Saving IGA2 registers.\n"));
-/* Unlock and save extended registers. */
+ /* Unlock extended registers. */
hwp->writeSeq(hwp, 0x10, 0x01);
- /* Save LCD control registers (from CR 0x50 to 0x93). */
- for (i = 0; i < 68; i++)
- Regs->CRTCRegs[i] = hwp->readCrtc(hwp, i + 0x50);
-
- if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400) {
- /* LVDS Channel 2 Function Select 0 / DVI Function Select */
- Regs->CR97 = hwp->readCrtc(hwp, 0x97);
- /* LVDS Channel 1 Function Select 0 */
- Regs->CR99 = hwp->readCrtc(hwp, 0x99);
- /* Digital Video Port 1 Function Select 0 */
- Regs->CR9B = hwp->readCrtc(hwp, 0x9B);
- /* Power Now Control 4 */
- Regs->CR9F = hwp->readCrtc(hwp, 0x9F);
-
- /* Horizontal Scaling Initial Value */
- Regs->CRA0 = hwp->readCrtc(hwp, 0xA0);
- /* Vertical Scaling Initial Value */
- Regs->CRA1 = hwp->readCrtc(hwp, 0xA1);
- /* Scaling Enable Bit */
- Regs->CRA2 = hwp->readCrtc(hwp, 0xA2);
+ for (i = 0; i < (0x88 - 0x50 + 1); i++) {
+ Regs->CR[i + 0x50] = hwp->readCrtc(hwp, i + 0x50);
+ }
+
+ for (i = 0; i < (0x92 - 0x8A + 1); i++) {
+ Regs->CR[i + 0x8A] = hwp->readCrtc(hwp, i + 0x8A);
+ }
+
+ for (i = 0; i < (0xA3 - 0x94 + 1); i++) {
+ Regs->CR[i + 0x94] = hwp->readCrtc(hwp, i + 0x94);
}
- /* Save TMDS status */
+ Regs->CR[0xA4] = hwp->readCrtc(hwp, 0xA4);
+
+ for (i = 0; i < (0xAC - 0xA5 + 1); i++) {
+ Regs->CR[i + 0xA5] = hwp->readCrtc(hwp, i + 0xA5);
+ }
+
+ /* Chrome 9 */
switch (pVia->Chipset) {
+ case VIA_K8M890:
+ case VIA_P4M900:
+ case VIA_VX800:
+ case VIA_VX855:
+ case VIA_VX900:
+ Regs->CR[0xAF] = hwp->readCrtc(hwp, 0xAF);
+ break;
+ default:
+ break;
+ }
+
+ /* Chrome 9, Chrome 9 HC, and Chrome 9 HC3 */
+ switch (pVia->Chipset) {
+ case VIA_K8M890:
+ case VIA_P4M900:
+ case VIA_VX800:
+ for (i = 0; i < (0xCD - 0xB0 + 1); i++) {
+ Regs->CR[i + 0xB0] = hwp->readCrtc(hwp, i + 0xB0);
+ }
+
+ break;
+ default:
+ break;
+ }
+
+ switch (pVia->Chipset) {
+
+ /* UniChrome Pro and UniChrome Pro II */
+ case VIA_PM800:
+ case VIA_K8M800:
+ case VIA_P4M800PRO:
case VIA_CX700:
+ case VIA_P4M890:
+ for (i = 0; i < (0xD7 - 0xD0 + 1); i++) {
+ Regs->CR[i + 0xD0] = hwp->readCrtc(hwp, i + 0xD0);
+ }
+
+ break;
+
+ /* Chrome 9 */
+ case VIA_K8M890:
+ case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
case VIA_VX900:
- Regs->CRD2 = hwp->readCrtc(hwp, 0xD2);
+ for (i = 0; i < (0xEC - 0xD0 + 1); i++) {
+ Regs->CR[i + 0xD0] = hwp->readCrtc(hwp, i + 0xD0);
+ }
+
+ break;
+ default:
break;
}
+ /* Chrome 9 */
+ switch (pVia->Chipset) {
+ case VIA_K8M890:
+ case VIA_P4M900:
+ case VIA_VX800:
+ case VIA_VX855:
+ case VIA_VX900:
+ for (i = 0; i < (0xF5 - 0xF0 + 1); i++) {
+ Regs->CR[i + 0xF0] = hwp->readCrtc(hwp, i + 0xF0);
+ }
+
+ break;
+ default:
+ break;
+ }
+
+ /* Chrome 9 HCM and Chrome 9 HD */
+ if ((pVia->Chipset == VIA_VX855) || (pVia->Chipset == VIA_VX900)) {
+ for (i = 0; i < (0xFC - 0xF6 + 1); i++) {
+ Regs->CR[i + 0xF6] = hwp->readCrtc(hwp, i + 0xF6);
+ }
+ }
+
+ /* Chrome 9 HD */
+ if (pVia->Chipset == VIA_VX900) {
+ Regs->CR[0xFD] = hwp->readCrtc(hwp, 0xFD);
+ }
+
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Finished saving IGA2 registers.\n"));
@@ -3405,32 +3475,124 @@ viaIGA2Restore(ScrnInfoPtr pScrn)
/* Unlock extended registers. */
hwp->writeSeq(hwp, 0x10, 0x01);
- /* Restore LCD control registers. */
- for (i = 0; i < 68; i++)
- hwp->writeCrtc(hwp, i + 0x50, Regs->CRTCRegs[i]);
-
- if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400) {
- /* Scaling Initial values */
- hwp->writeCrtc(hwp, 0xA0, Regs->CRA0);
- hwp->writeCrtc(hwp, 0xA1, Regs->CRA1);
- hwp->writeCrtc(hwp, 0xA2, Regs->CRA2);
-
- /* LVDS Channels Functions Selection */
- hwp->writeCrtc(hwp, 0x97, Regs->CR97);
- hwp->writeCrtc(hwp, 0x99, Regs->CR99);
- hwp->writeCrtc(hwp, 0x9B, Regs->CR9B);
- hwp->writeCrtc(hwp, 0x9F, Regs->CR9F);
+ for (i = 0; i < (0x5F - 0x50 + 1); i++) {
+ hwp->writeCrtc(hwp, i + 0x50, Regs->CR[i + 0x50]);
+ }
+
+ for (i = 0; i < (0x69 - 0x62 + 1); i++) {
+ hwp->writeCrtc(hwp, i + 0x62, Regs->CR[i + 0x62]);
+ }
+
+ for (i = 0; i < (0x88 - 0x6D + 1); i++) {
+ hwp->writeCrtc(hwp, i + 0x6D, Regs->CR[i + 0x6D]);
+ }
+
+ for (i = 0; i < (0x92 - 0x8A + 1); i++) {
+ hwp->writeCrtc(hwp, i + 0x8A, Regs->CR[i + 0x8A]);
+ }
+
+ for (i = 0; i < (0xA3 - 0x94 + 1); i++) {
+ hwp->writeCrtc(hwp, i + 0x94, Regs->CR[i + 0x94]);
+ }
+
+ /* UniChrome Pro and UniChrome Pro II */
+ switch (pVia->Chipset) {
+ case VIA_PM800:
+ case VIA_K8M800:
+ case VIA_P4M800PRO:
+ case VIA_CX700:
+ case VIA_P4M890:
+ hwp->writeCrtc(hwp, 0xA4, Regs->CR[0xA4]);
+ break;
+ default:
+ break;
+ }
+
+ for (i = 0; i < (0xAC - 0xA5 + 1); i++) {
+ hwp->writeCrtc(hwp, i + 0xA5, Regs->CR[i + 0xA5]);
+ }
+
+ /* Chrome 9 */
+ switch (pVia->Chipset) {
+ case VIA_K8M890:
+ case VIA_P4M900:
+ case VIA_VX800:
+ case VIA_VX855:
+ case VIA_VX900:
+ hwp->writeCrtc(hwp, 0xAF, Regs->CR[0xAF]);
+ break;
+ default:
+ break;
+ }
+
+ /* Chrome 9, Chrome 9 HC, and Chrome 9 HC3 */
+ switch (pVia->Chipset) {
+ case VIA_K8M890:
+ case VIA_P4M900:
+ case VIA_VX800:
+ for (i = 0; i < (0xCD - 0xB0 + 1); i++) {
+ hwp->writeCrtc(hwp, i + 0xB0, Regs->CR[i + 0xB0]);
+ }
+
+ break;
+ default:
+ break;
}
- /* Restore TMDS status */
switch (pVia->Chipset) {
+ /* UniChrome Pro and UniChrome Pro II */
+ case VIA_PM800:
+ case VIA_K8M800:
+ case VIA_P4M800PRO:
case VIA_CX700:
+ case VIA_P4M890:
+ for (i = 0; i < (0xD7 - 0xD0 + 1); i++) {
+ hwp->writeCrtc(hwp, i + 0xD0, Regs->CR[i + 0xD0]);
+ }
+
+ break;
+
+ /* Chrome 9 */
+ case VIA_K8M890:
+ case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
case VIA_VX900:
- /* LVDS Control Register */
- hwp->writeCrtc(hwp, 0xD2, Regs->CRD2);
+ for (i = 0; i < (0xEC - 0xD0 + 1); i++) {
+ hwp->writeCrtc(hwp, i + 0xD0, Regs->CR[i + 0xD0]);
+ }
+
break;
+ default:
+ break;
+ }
+
+ /* Chrome 9 */
+ switch (pVia->Chipset) {
+ case VIA_K8M890:
+ case VIA_P4M900:
+ case VIA_VX800:
+ case VIA_VX855:
+ case VIA_VX900:
+ for (i = 0; i < (0xF5 - 0xF0 + 1); i++) {
+ hwp->writeCrtc(hwp, i + 0xF0, Regs->CR[i + 0xF0]);
+ }
+
+ break;
+ default:
+ break;
+ }
+
+ /* Chrome 9 HCM and Chrome 9 HD */
+ if ((pVia->Chipset == VIA_VX855) || (pVia->Chipset == VIA_VX900)) {
+ for (i = 0; i < (0xFC - 0xF6 + 1); i++) {
+ hwp->writeCrtc(hwp, i + 0xF6, Regs->CR[i + 0xF6]);
+ }
+ }
+
+ /* Chrome 9 HD */
+ if (pVia->Chipset == VIA_VX900) {
+ hwp->writeCrtc(hwp, 0xFD, Regs->CR[0xFD]);
}
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
diff --git a/src/via_driver.h b/src/via_driver.h
index d3065a0..d566187 100644
--- a/src/via_driver.h
+++ b/src/via_driver.h
@@ -127,9 +127,6 @@
static int gVIAEntityIndex = -1;
typedef struct {
- CARD8 CRTCRegs[68];
- CARD8 CR97, CR99, CR9B, CR9F, CRA0, CRA1, CRA2, CRD2;
-
CARD8 SR[256];
CARD8 CR[256];
} VIARegRec, *VIARegPtr;
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