[Openchrome-devel] drm-openchrome: 4 commits - drivers/gpu/drm

Kevin Brace kevinbrace at kemper.freedesktop.org
Tue Jun 13 18:30:59 UTC 2017


 drivers/gpu/drm/via/crtc_hw.h    |  133 +++++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/via/via_analog.c |   10 ++
 drivers/gpu/drm/via/via_drv.h    |    4 -
 3 files changed, 142 insertions(+), 5 deletions(-)

New commits:
commit cf624e7f02b8c8d7d7f65a3c20bdac424ce6f5b8
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Tue Jun 13 11:24:33 2017 -0700

    Version bumped to 3.0.32
    
    This version fixes a regression involving analog (VGA) display control.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/via/via_drv.h b/drivers/gpu/drm/via/via_drv.h
index b5adab14dd6..0ae718490a6 100644
--- a/drivers/gpu/drm/via/via_drv.h
+++ b/drivers/gpu/drm/via/via_drv.h
@@ -30,11 +30,11 @@
 #define DRIVER_AUTHOR       "The OpenChrome Project"
 #define DRIVER_NAME         "via"
 #define DRIVER_DESC         "OpenChrome DRM for VIA Technologies Chrome IGP"
-#define DRIVER_DATE         "20170415"
+#define DRIVER_DATE         "20170613"
 
 #define DRIVER_MAJOR		3
 #define DRIVER_MINOR		0
-#define DRIVER_PATCHLEVEL	31
+#define DRIVER_PATCHLEVEL	32
 
 #include <linux/module.h>
 
commit 8b3554bfbf4f3c4cde9ebd19dbe20a2ce3d29839
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Tue Jun 13 11:17:40 2017 -0700

    Fix for analog (VGA) display control regression
    
    Commit 1bd4f13 appears to have broken analog (VGA). This commit fixes
    the regression.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/via/via_analog.c b/drivers/gpu/drm/via/via_analog.c
index e9b39eee266..c0003283339 100644
--- a/drivers/gpu/drm/via/via_analog.c
+++ b/drivers/gpu/drm/via/via_analog.c
@@ -104,12 +104,16 @@ via_analog_dpms(struct drm_encoder *encoder, int mode)
 
 	switch (mode) {
 	case DRM_MODE_DPMS_ON:
-		viaAnalogOutput(dev_priv, true);
+		via_analog_set_dpms_control(VGABASE, 0x00);
 		break;
-	case DRM_MODE_DPMS_SUSPEND:
 	case DRM_MODE_DPMS_STANDBY:
+		via_analog_set_dpms_control(VGABASE, 0x01);
+		break;
+	case DRM_MODE_DPMS_SUSPEND:
+		via_analog_set_dpms_control(VGABASE, 0x02);
+		break;
 	case DRM_MODE_DPMS_OFF:
-		viaAnalogOutput(dev_priv, false);
+		via_analog_set_dpms_control(VGABASE, 0x03);
 		break;
 	default:
 		DRM_ERROR("Bad DPMS mode.");
commit 4dc5767e8cfcbd2ba8880a4599422af462433ddd
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Mon Jun 12 23:32:17 2017 -0700

    Added via_analog_set_dpms_control inline function
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/via/crtc_hw.h b/drivers/gpu/drm/via/crtc_hw.h
index 42b465d4c1d..dfc15a4338d 100644
--- a/drivers/gpu/drm/via/crtc_hw.h
+++ b/drivers/gpu/drm/via/crtc_hw.h
@@ -140,6 +140,25 @@ viaAnalogSetDACOutput(void __iomem *regs, bool outputState)
 }
 
 /*
+ * Sets analog (VGA) DPMS state.
+ */
+static inline void
+via_analog_set_dpms_control(void __iomem *regs, u8 dpmsControl)
+{
+	/* 3X5.36[5:4] - DPMS Control
+	 *               00: On
+	 *               01: Stand-by
+	 *               10: Suspend
+	 *               11: Off */
+	svga_wcrt_mask(regs, 0x36, dpmsControl << 4, BIT(5) | BIT(4));
+	DRM_DEBUG_KMS("Analog (VGA) DPMS: %s\n",
+			((dpmsControl & (BIT(1) | BIT(0))) == 0x03) ? "Off" :
+			((dpmsControl & (BIT(1) | BIT(0))) == 0x02) ? "Suspend" :
+			((dpmsControl & (BIT(1) | BIT(0))) == 0x01) ? "Standby" :
+								      "On");
+}
+
+/*
  * Sets analog (VGA) sync polarity.
  */
 static inline void
commit 8da7b546847d553c486dc706ab6e0869db6c9cb6
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Mon Jun 12 14:02:52 2017 -0700

    Added DVP, FPDP, and LVDS I/O pad control inline functions
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/via/crtc_hw.h b/drivers/gpu/drm/via/crtc_hw.h
index 4e8c8bd70e0..42b465d4c1d 100644
--- a/drivers/gpu/drm/via/crtc_hw.h
+++ b/drivers/gpu/drm/via/crtc_hw.h
@@ -87,6 +87,44 @@ static inline void svga_wcrt_mask(void __iomem *regbase, u8 index, u8 data, u8 m
 ***********************************************************************/
 
 /*
+ * Sets DVP0 (Digital Video Port 0) I/O pad state.
+ */
+static inline void
+via_dvp0_set_io_pad_state(void __iomem *regs, u8 io_pad_state)
+{
+	/* 3C5.1E[7:6] - DVP0 Power Control
+	 *               0x: Pad always off
+	 *               10: Depend on the other control signal
+	 *               11: Pad on/off according to the
+	 *                   Power Management Status (PMS) */
+	svga_wseq_mask(regs, 0x1E, io_pad_state << 6, BIT(7) | BIT(6));
+	DRM_DEBUG_KMS("DVP0 I/O Pad State: %s\n",
+			((io_pad_state & (BIT(1) | BIT(0))) == 0x03) ? "On" :
+			((io_pad_state & (BIT(1) | BIT(0))) == 0x02) ? "Conditional" :
+			((io_pad_state & (BIT(1) | BIT(0))) == 0x01) ? "Off" :
+								       "Off");
+}
+
+/*
+ * Sets DVP1 (Digital Video Port 1) I/O pad state.
+ */
+static inline void
+via_dvp1_set_io_pad_state(void __iomem *regs, u8 io_pad_state)
+{
+	/* 3C5.1E[5:4] - DVP1 Power Control
+	 *               0x: Pad always off
+	 *               10: Depend on the other control signal
+	 *               11: Pad on/off according to the
+	 *                   Power Management Status (PMS) */
+	svga_wseq_mask(regs, 0x1E, io_pad_state << 4, BIT(5) | BIT(4));
+	DRM_DEBUG_KMS("DVP1 I/O Pad State: %s\n",
+			((io_pad_state & (BIT(1) | BIT(0))) == 0x03) ? "On" :
+			((io_pad_state & (BIT(1) | BIT(0))) == 0x02) ? "Conditional" :
+			((io_pad_state & (BIT(1) | BIT(0))) == 0x01) ? "Off" :
+								       "Off");
+}
+
+/*
  * Sets analog (VGA) DAC output state.
  */
 static inline void
@@ -137,6 +175,44 @@ viaAnalogSetDisplaySource(void __iomem *regs, u8 displaySource)
 }
 
 /*
+ * Sets FPDP (Flat Panel Display Port) Low I/O pad state.
+ */
+static inline void
+via_fpdp_low_set_io_pad_state(void __iomem *regs, u8 io_pad_state)
+{
+	/* 3C5.2A[1:0] - FPDP Low I/O Pad Control
+	*               0x: Pad always off
+	*               10: Depend on the other control signal
+	*               11: Pad on/off according to the
+	*                   Power Management Status (PMS) */
+	svga_wcrt_mask(regs, 0x2A, io_pad_state, BIT(1) | BIT(0));
+	DRM_DEBUG_KMS("FPDP Low I/O Pad State: %s\n",
+			((io_pad_state & (BIT(1) | BIT(0))) == 0x03) ? "On" :
+			((io_pad_state & (BIT(1) | BIT(0))) == 0x02) ? "Conditional" :
+			((io_pad_state & (BIT(1) | BIT(0))) == 0x01) ? "Off" :
+								       "Off");
+}
+
+/*
+ * Sets FPDP (Flat Panel Display Port) High I/O pad state
+ */
+static inline void
+via_fpdp_high_set_io_pad_state(void __iomem *regs, u8 io_pad_state)
+{
+	/* 3C5.2A[3:2] - FPDP High I/O Pad Control
+	 *               0x: Pad always off
+	 *               10: Depend on the other control signal
+	 *               11: Pad on/off according to the
+	 *                   Power Management Status (PMS) */
+	svga_wcrt_mask(regs, 0x2A, io_pad_state << 2, BIT(3) | BIT(2));
+	DRM_DEBUG_KMS("FPDP High I/O Pad State: %s\n",
+			((io_pad_state & (BIT(1) | BIT(0))) == 0x03) ? "On" :
+			((io_pad_state & (BIT(1) | BIT(0))) == 0x02) ? "Conditional" :
+			((io_pad_state & (BIT(1) | BIT(0))) == 0x01) ? "Off" :
+								       "Off");
+}
+
+/*
  * Sets CX700 or later single chipset's LVDS1 power sequence type.
  */
 static inline void
@@ -200,6 +276,44 @@ viaLVDS1SetSoftDisplayPeriod(void __iomem *regs, bool softOn)
 }
 
 /*
+ * Sets LVDS1 I/O pad state.
+ */
+static inline void
+via_lvds1_set_io_pad_setting(void __iomem *regs, u8 io_pad_state)
+{
+	/* 3C5.2A[1:0] - LVDS1 I/O Pad Control
+	 *               0x: Pad always off
+	 *               10: Depend on the other control signal
+	 *               11: Pad on/off according to the
+	 *                   Power Management Status (PMS) */
+	svga_wcrt_mask(regs, 0x2A, io_pad_state, BIT(1) | BIT(0));
+	DRM_DEBUG_KMS("LVDS1 I/O Pad State: %s\n",
+			((io_pad_state & (BIT(1) | BIT(0))) == 0x03) ? "On" :
+			((io_pad_state & (BIT(1) | BIT(0))) == 0x02) ? "Conditional" :
+			((io_pad_state & (BIT(1) | BIT(0))) == 0x01) ? "Off" :
+								       "Off");
+}
+
+/*
+ * Sets LVDS2 I/O pad state.
+ */
+static inline void
+via_lvds2_set_io_pad_setting(void __iomem *regs, u8 io_pad_state)
+{
+	/* 3C5.2A[3:2] - LVDS2 I/O Pad Control
+	 *               0x: Pad always off
+	 *               10: Depend on the other control signal
+	 *               11: Pad on/off according to the
+	 *                   Power Management Status (PMS) */
+	svga_wcrt_mask(regs, 0x2A, io_pad_state << 2, BIT(3) | BIT(2));
+	DRM_DEBUG_KMS("LVDS2 I/O Pad State: %s\n",
+			((io_pad_state & (BIT(1) | BIT(0))) == 0x03) ? "On" :
+			((io_pad_state & (BIT(1) | BIT(0))) == 0x02) ? "Conditional" :
+			((io_pad_state & (BIT(1) | BIT(0))) == 0x01) ? "Off" :
+								       "Off");
+}
+
+/*
  * Sets CX700 / VX700 and VX800 chipsets' TMDS (DVI) power state.
  */
 static inline void


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