[Openchrome-devel] drm-openchrome: 10 commits - drivers/gpu/drm

Kevin Brace kevinbrace at kemper.freedesktop.org
Thu Jun 29 23:15:55 UTC 2017


 drivers/gpu/drm/via/crtc_hw.h     |  102 ++++++++++++++++++++++++++++++++++----
 drivers/gpu/drm/via/via_analog.c  |    2 
 drivers/gpu/drm/via/via_display.c |    6 +-
 drivers/gpu/drm/via/via_display.h |    6 +-
 drivers/gpu/drm/via/via_drv.h     |    4 -
 drivers/gpu/drm/via/via_fp.c      |   79 ++++++++++++++++++++++++-----
 drivers/gpu/drm/via/via_hdmi.c    |    8 +-
 drivers/gpu/drm/via/via_tmds.c    |    2 
 8 files changed, 173 insertions(+), 36 deletions(-)

New commits:
commit 4a781fcaac1f0d253abb161a97f96256bae00bd1
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Thu Jun 29 18:15:17 2017 -0500

    Version bumped to 3.0.36
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/via/via_drv.h b/drivers/gpu/drm/via/via_drv.h
index c37c47df813..9c7cbd85e0c 100644
--- a/drivers/gpu/drm/via/via_drv.h
+++ b/drivers/gpu/drm/via/via_drv.h
@@ -30,11 +30,11 @@
 #define DRIVER_AUTHOR       "The OpenChrome Project"
 #define DRIVER_NAME         "via"
 #define DRIVER_DESC         "OpenChrome DRM for VIA Technologies Chrome IGP"
-#define DRIVER_DATE         "20170617"
+#define DRIVER_DATE         "20170629"
 
 #define DRIVER_MAJOR		3
 #define DRIVER_MINOR		0
-#define DRIVER_PATCHLEVEL	35
+#define DRIVER_PATCHLEVEL	36
 
 #include <linux/module.h>
 
commit dbddf7319cac60027582ca50ec545a6d5aef8500
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Thu Jun 29 15:26:00 2017 -0500

    Rename diport variable as di_port
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/via/via_analog.c b/drivers/gpu/drm/via/via_analog.c
index 730541c81a3..1c513bdfe6f 100644
--- a/drivers/gpu/drm/via/via_analog.c
+++ b/drivers/gpu/drm/via/via_analog.c
@@ -275,7 +275,7 @@ via_analog_init(struct drm_device *dev)
 
 	enc->base.possible_crtcs = BIT(0);
 	enc->base.possible_clones = 0;
-	enc->diPort = VIA_DI_PORT_NONE;
+	enc->di_port = VIA_DI_PORT_NONE;
 
 	drm_mode_connector_attach_encoder(&con->base, &enc->base);
 }
diff --git a/drivers/gpu/drm/via/via_display.c b/drivers/gpu/drm/via/via_display.c
index 898c1adc1e2..324d47d23e6 100644
--- a/drivers/gpu/drm/via/via_display.c
+++ b/drivers/gpu/drm/via/via_display.c
@@ -49,7 +49,7 @@ via_encoder_commit(struct drm_encoder *encoder)
 		value = BIT(4);
 
 	/* Set IGA source and turn on DI port clock */
-	switch (enc->diPort) {
+	switch (enc->di_port) {
 	case VIA_DI_PORT_DVP0:
 		/* DVP0 Data Source Selection. */
 		svga_wcrt_mask(VGABASE, 0x96, value, BIT(4));
@@ -158,7 +158,7 @@ via_encoder_disable(struct drm_encoder *encoder)
 	/* First turn off the display */
 	encoder_funcs->dpms(encoder, DRM_MODE_DPMS_OFF);
 
-	switch (enc->diPort) {
+	switch (enc->di_port) {
 	case VIA_DI_PORT_DVP0:
 		svga_wseq_mask(VGABASE, 0x1E, 0x00, BIT(7) | BIT(6));
 		break;
@@ -212,7 +212,7 @@ via_set_sync_polarity(struct drm_encoder *encoder, struct drm_display_mode *mode
 	if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
 		syncreg |= BIT(5);
 
-	switch (enc->diPort) {
+	switch (enc->di_port) {
 	case VIA_DI_PORT_DVP0:
 		svga_wcrt_mask(VGABASE, 0x96, syncreg, BIT(6) | BIT(5));
 		break;
diff --git a/drivers/gpu/drm/via/via_display.h b/drivers/gpu/drm/via/via_display.h
index b178dfe2274..802d7100ac1 100644
--- a/drivers/gpu/drm/via/via_display.h
+++ b/drivers/gpu/drm/via/via_display.h
@@ -95,7 +95,7 @@ struct via_connector {
 struct via_encoder {
 	struct drm_encoder base;
 	uint32_t flags;
-	int diPort;
+	u32 di_port;
 	struct via_connector cons[];
 };
 
@@ -170,7 +170,7 @@ extern int via_connector_mode_valid(struct drm_connector *connector,
 extern void via_connector_destroy(struct drm_connector *connector);
 extern int via_get_edid_modes(struct drm_connector *connector);
 
-extern void via_hdmi_init(struct drm_device *dev, int diPort);
+extern void via_hdmi_init(struct drm_device *dev, u32 di_port);
 extern void via_analog_init(struct drm_device *dev);
 extern void via_lvds_init(struct drm_device *dev);
 extern int via_tmds_init(struct drm_device *dev);
diff --git a/drivers/gpu/drm/via/via_fp.c b/drivers/gpu/drm/via/via_fp.c
index 07fd48cd750..be8d621fd4a 100644
--- a/drivers/gpu/drm/via/via_fp.c
+++ b/drivers/gpu/drm/via/via_fp.c
@@ -73,7 +73,7 @@ via_enable_internal_lvds(struct drm_encoder *encoder)
 	struct drm_device *dev = encoder->dev;
 
 	/* Turn on LCD panel */
-	if ((enc->diPort & VIA_DI_PORT_DFPL) || (enc->diPort == VIA_DI_PORT_DVP1)) {
+	if ((enc->di_port & VIA_DI_PORT_DFPL) || (enc->di_port == VIA_DI_PORT_DVP1)) {
 		if ((dev->pdev->device == PCI_DEVICE_ID_VIA_VT1122) ||
 		    (dev->pdev->device == PCI_DEVICE_ID_VIA_CLE266)) {
 			/* Software control power sequence ON */
@@ -104,7 +104,7 @@ via_enable_internal_lvds(struct drm_encoder *encoder)
 		}
 	}
 
-	if (enc->diPort & VIA_DI_PORT_DFPH) {
+	if (enc->di_port & VIA_DI_PORT_DFPH) {
 		if ((dev->pdev->device == PCI_DEVICE_ID_VIA_VT1122) ||
 		    (dev->pdev->device == PCI_DEVICE_ID_VIA_CLE266)) {
 			/* Software control power sequence ON */
@@ -144,9 +144,9 @@ via_enable_internal_lvds(struct drm_encoder *encoder)
 		 * power on both LVDS0 and LVDS1 */
 		svga_wcrt_mask(VGABASE, 0xD2, 0x00, BIT(7) | BIT(6));
 	} else {
-		if (enc->diPort & VIA_DI_PORT_DFPL)
+		if (enc->di_port & VIA_DI_PORT_DFPL)
 			svga_wcrt_mask(VGABASE, 0xD2, 0x00, BIT(7));
-		else if (enc->diPort & VIA_DI_PORT_DFPH)
+		else if (enc->di_port & VIA_DI_PORT_DFPH)
 			svga_wcrt_mask(VGABASE, 0xD2, 0x00, BIT(6));
 	}
 }
@@ -159,7 +159,7 @@ via_disable_internal_lvds(struct drm_encoder *encoder)
 	struct drm_device *dev = encoder->dev;
 
 	/* Turn off LCD panel */
-	if ((enc->diPort & VIA_DI_PORT_DFPL) || (enc->diPort == VIA_DI_PORT_DVP1)) {
+	if ((enc->di_port & VIA_DI_PORT_DFPL) || (enc->di_port == VIA_DI_PORT_DVP1)) {
 		/* Set LCD software power sequence off */
 		if ((dev->pdev->device == PCI_DEVICE_ID_VIA_VT1122) ||
 		    (dev->pdev->device == PCI_DEVICE_ID_VIA_CLE266)) {
@@ -185,7 +185,7 @@ via_disable_internal_lvds(struct drm_encoder *encoder)
 		}
 	}
 
-	if (enc->diPort & VIA_DI_PORT_DFPH) {
+	if (enc->di_port & VIA_DI_PORT_DFPH) {
 		/* Set LCD software power sequence off */
 		if ((dev->pdev->device == PCI_DEVICE_ID_VIA_VT1122) ||
 		    (dev->pdev->device == PCI_DEVICE_ID_VIA_CLE266)) {
@@ -220,9 +220,9 @@ via_disable_internal_lvds(struct drm_encoder *encoder)
 		 * power off both LVDS0 and LVDS1 */
 		svga_wcrt_mask(VGABASE, 0xD2, 0xC0, BIT(7) | BIT(6));
 	} else {
-		if (enc->diPort & VIA_DI_PORT_DFPL)
+		if (enc->di_port & VIA_DI_PORT_DFPL)
 			svga_wcrt_mask(VGABASE, 0xD2, BIT(7), BIT(7));
-		else if (enc->diPort & VIA_DI_PORT_DFPH)
+		else if (enc->di_port & VIA_DI_PORT_DFPH)
 			svga_wcrt_mask(VGABASE, 0xD2, BIT(6), BIT(6));
 	}
 }
@@ -231,7 +231,7 @@ via_disable_internal_lvds(struct drm_encoder *encoder)
  * Sets flat panel display source.
  */
 static void
-via_fp_display_source(struct via_device *dev_priv, int di_port, int index)
+via_fp_display_source(struct via_device *dev_priv, u32 di_port, int index)
 {
 	u8 display_source = index & 0x01;
 
@@ -816,30 +816,30 @@ via_lvds_init(struct drm_device *dev)
 
 	switch (dev->pdev->device) {
 	case PCI_DEVICE_ID_VIA_CLE266:
-		enc->diPort = VIA_DI_PORT_DVP1;
+		enc->di_port = VIA_DI_PORT_DVP1;
 		break;
 
 	case PCI_DEVICE_ID_VIA_VX875:
 	case PCI_DEVICE_ID_VIA_VX900_VGA:
-		enc->diPort = VIA_DI_PORT_DFPL;
+		enc->di_port = VIA_DI_PORT_DFPL;
 		break;
 
 	default:
-		enc->diPort = VIA_DI_PORT_DFPH;
+		enc->di_port = VIA_DI_PORT_DFPH;
 		break;
 	}
 
 	/* There has to be a way to detect TTL LVDS
 	 * For now we use the DMI to handle this */
 	if (dmi_check_system(via_ttl_lvds))
-		enc->diPort = VIA_DI_PORT_DFPL | VIA_DI_PORT_DVP1;
+		enc->di_port = VIA_DI_PORT_DFPL | VIA_DI_PORT_DVP1;
 
 	reg_value = 0x00;
-	if (enc->diPort == VIA_DI_PORT_DFPH) {
+	if (enc->di_port == VIA_DI_PORT_DFPH) {
 		if (!is_msb)
 			reg_value = BIT(0);
 		svga_wcrt_mask(VGABASE, 0xD2, reg_value, BIT(0));
-	} else if (enc->diPort == VIA_DI_PORT_DFPL) {
+	} else if (enc->di_port == VIA_DI_PORT_DFPL) {
 		if (!is_msb)
 			reg_value = BIT(1);
 		svga_wcrt_mask(VGABASE, 0xD2, reg_value, BIT(1));
diff --git a/drivers/gpu/drm/via/via_hdmi.c b/drivers/gpu/drm/via/via_hdmi.c
index 1ef194dd328..bde11475a7c 100644
--- a/drivers/gpu/drm/via/via_hdmi.c
+++ b/drivers/gpu/drm/via/via_hdmi.c
@@ -254,7 +254,7 @@ via_hdmi_enc_mode_set(struct drm_encoder *encoder,
 		struct via_connector *con = container_of(connector, struct via_connector, base);
 		bool audio_off = (con->flags & HDMI_AUDIO_ENABLED);
 
-		if (enc->diPort == VIA_DI_PORT_NONE)
+		if (enc->di_port == VIA_DI_PORT_NONE)
 			via_hdmi_native_mode_set(iga, adjusted_mode, audio_off);
 
 		if (!iga->index)
@@ -344,7 +344,7 @@ via_hdmi_enc_mode_set(struct drm_encoder *encoder,
 	}
 
 	/* Patch for clock skew */
-	if (enc->diPort == VIA_DI_PORT_DVP1) {
+	if (enc->di_port == VIA_DI_PORT_DVP1) {
 		switch (dev->pdev->device) {
 		case PCI_DEVICE_ID_VIA_VT3157:	/* CX700 */
 			svga_wcrt_mask(VGABASE, 0x65, 0x0B, 0x0F);
@@ -645,7 +645,7 @@ static const struct drm_connector_helper_funcs via_hdmi_connector_helper_funcs =
 };
 
 void
-via_hdmi_init(struct drm_device *dev, int diport)
+via_hdmi_init(struct drm_device *dev, u32 di_port)
 {
 	struct via_connector *dvi, *hdmi;
 	struct via_encoder *enc;
@@ -664,7 +664,7 @@ via_hdmi_init(struct drm_device *dev, int diport)
 
 	enc->base.possible_crtcs = BIT(1) | BIT(0);
 	enc->base.possible_clones = 0;
-	enc->diPort = diport;
+	enc->di_port = di_port;
 
 	/* Setup the HDMI connector */
 	drm_connector_init(dev, &hdmi->base, &via_hdmi_connector_funcs,
diff --git a/drivers/gpu/drm/via/via_tmds.c b/drivers/gpu/drm/via/via_tmds.c
index e66d9935b23..7fbf9275e76 100644
--- a/drivers/gpu/drm/via/via_tmds.c
+++ b/drivers/gpu/drm/via/via_tmds.c
@@ -234,7 +234,7 @@ via_tmds_init(struct drm_device *dev)
 
 	enc->base.possible_crtcs = BIT(1) | BIT(0);
 	enc->base.possible_clones = 0;
-	enc->diPort = VIA_DI_PORT_DFPL;
+	enc->di_port = VIA_DI_PORT_DFPL;
 
 	/* Piece together our DVI-D connector */
 	con = &enc->cons[0];
commit ea501f87141838d00fac153b5234c99036f9f9a3
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Thu Jun 29 15:12:02 2017 -0500

    Added via_fp_display_source
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/via/via_display.h b/drivers/gpu/drm/via/via_display.h
index 12154bbbd18..b178dfe2274 100644
--- a/drivers/gpu/drm/via/via_display.h
+++ b/drivers/gpu/drm/via/via_display.h
@@ -85,7 +85,9 @@ struct via_connector {
 #define VIA_DI_PORT_DVP0		BIT(2)
 #define VIA_DI_PORT_DVP1		BIT(3)
 #define VIA_DI_PORT_DFPL		BIT(4)
+#define VIA_DI_PORT_FPDPLOW		BIT(4)
 #define VIA_DI_PORT_DFPH		BIT(5)
+#define VIA_DI_PORT_FPDPHIGH		BIT(5)
 #define VIA_DI_PORT_DFP			BIT(6)
 #define VIA_DI_PORT_LVDS1		BIT(7)
 #define VIA_DI_PORT_LVDS2		BIT(8)
diff --git a/drivers/gpu/drm/via/via_fp.c b/drivers/gpu/drm/via/via_fp.c
index a7c6d451e61..07fd48cd750 100644
--- a/drivers/gpu/drm/via/via_fp.c
+++ b/drivers/gpu/drm/via/via_fp.c
@@ -227,6 +227,57 @@ via_disable_internal_lvds(struct drm_encoder *encoder)
 	}
 }
 
+/*
+ * Sets flat panel display source.
+ */
+static void
+via_fp_display_source(struct via_device *dev_priv, int di_port, int index)
+{
+	u8 display_source = index & 0x01;
+
+	DRM_DEBUG_KMS("Entered via_fp_display_source.\n");
+
+	switch(di_port) {
+	case VIA_DI_PORT_DVP0:
+		via_dvp0_set_display_source(VGABASE, display_source);
+		break;
+	case VIA_DI_PORT_DVP1:
+		via_dvp1_set_display_source(VGABASE, display_source);
+		break;
+	case VIA_DI_PORT_FPDPLOW:
+		via_fpdp_low_set_display_source(VGABASE, display_source);
+		via_dvp1_set_display_source(VGABASE, display_source);
+		break;
+	case VIA_DI_PORT_FPDPHIGH:
+		via_fpdp_high_set_display_source(VGABASE, display_source);
+		via_dvp0_set_display_source(VGABASE, display_source);
+		break;
+	case (VIA_DI_PORT_FPDPLOW |
+		VIA_DI_PORT_FPDPHIGH):
+		via_fpdp_low_set_display_source(VGABASE, display_source);
+		via_fpdp_high_set_display_source(VGABASE, display_source);
+		break;
+	case VIA_DI_PORT_LVDS1:
+		via_lvds1_set_display_source(VGABASE, display_source);
+		break;
+	case VIA_DI_PORT_LVDS2:
+		via_lvds2_set_display_source(VGABASE, display_source);
+		break;
+	case (VIA_DI_PORT_LVDS1 |
+		VIA_DI_PORT_LVDS2):
+		via_lvds1_set_display_source(VGABASE, display_source);
+		via_lvds2_set_display_source(VGABASE, display_source);
+		break;
+	default:
+		break;
+	}
+
+	DRM_DEBUG_KMS("FP Display Source: IGA%d\n",
+			display_source + 1);
+
+	DRM_DEBUG_KMS("Exiting via_fp_display_source.\n");
+}
+
 static void
 via_lvds_dpms(struct drm_encoder *encoder, int mode)
 {
commit c6174e3d1254d7985d75ad899fe6c0320ef7f9e5
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Thu Jun 29 14:37:10 2017 -0500

    Fixing indentation inside crtc_hw.h
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/via/crtc_hw.h b/drivers/gpu/drm/via/crtc_hw.h
index 6c3436c04f2..9885f5ce523 100644
--- a/drivers/gpu/drm/via/crtc_hw.h
+++ b/drivers/gpu/drm/via/crtc_hw.h
@@ -119,8 +119,8 @@ static inline void
 via_dvp0_set_display_source(void __iomem *regs, u8 display_source)
 {
 	/* 3X5.96[4] - DVP0 Data Source Selection
-	*             0: Primary Display
-	*             1: Secondary Display */
+	 *             0: Primary Display
+	 *             1: Secondary Display */
 	svga_wcrt_mask(regs, 0x96, display_source << 4, BIT(4));
 	DRM_DEBUG_KMS("DVP0 Display Source: IGA%d\n",
 			(display_source & 0x01) + 1);
@@ -152,8 +152,8 @@ static inline void
 via_dvp1_set_display_source(void __iomem *regs, u8 display_source)
 {
 	/* 3X5.9B[4] - DVP1 Data Source Selection
-	*             0: Primary Display
-	*             1: Secondary Display */
+	 *             0: Primary Display
+	 *             1: Secondary Display */
 	svga_wcrt_mask(regs, 0x9B, display_source << 4, BIT(4));
 	DRM_DEBUG_KMS("DVP1 Display Source: IGA%d\n",
 			(display_source & 0x01) + 1);
@@ -235,10 +235,10 @@ static inline void
 via_fpdp_low_set_io_pad_state(void __iomem *regs, u8 io_pad_state)
 {
 	/* 3C5.2A[1:0] - FPDP Low I/O Pad Control
-	*               0x: Pad always off
-	*               10: Depend on the other control signal
-	*               11: Pad on/off according to the
-	*                   Power Management Status (PMS) */
+	 *               0x: Pad always off
+	 *               10: Depend on the other control signal
+	 *               11: Pad on/off according to the
+	 *                   Power Management Status (PMS) */
 	svga_wcrt_mask(regs, 0x2A, io_pad_state, BIT(1) | BIT(0));
 	DRM_DEBUG_KMS("FPDP Low I/O Pad State: %s\n",
 			((io_pad_state & (BIT(1) | BIT(0))) == 0x03) ? "On" :
@@ -254,8 +254,8 @@ static inline void
 via_fpdp_low_set_display_source(void __iomem *regs, u8 display_source)
 {
 	/* 3X5.99[4] - FPDP Low Data Source Selection
-	*             0: Primary Display
-	*             1: Secondary Display */
+	 *             0: Primary Display
+	 *             1: Secondary Display */
 	svga_wcrt_mask(regs, 0x99, display_source << 4, BIT(4));
 	DRM_DEBUG_KMS("FPDP Low Display Source: IGA%d\n",
 			(display_source & 0x01) + 1);
@@ -287,8 +287,8 @@ static inline void
 via_fpdp_high_set_display_source(void __iomem *regs, u8 display_source)
 {
 	/* 3X5.97[4] - FPDP High Data Source Selection
-	*             0: Primary Display
-	*             1: Secondary Display */
+	 *             0: Primary Display
+	 *             1: Secondary Display */
 	svga_wcrt_mask(regs, 0x97, display_source << 4, BIT(4));
 	DRM_DEBUG_KMS("FPDP High Display Source: IGA%d\n",
 			(display_source & 0x01) + 1);
@@ -446,11 +446,11 @@ via_tmds_set_sync_polarity(void __iomem *regs, u8 syncPolarity)
 {
 	/* Set TMDS (DVI) sync polarity. */
 	/* 3X5.97[6] - DVI (TMDS) VSYNC Polarity
-	*              0: Positive
-	*              1: Negative
-	* 3X5.97[5] - DVI (TMDS) HSYNC Polarity
-	*              0: Positive
-	*              1: Negative */
+	 *              0: Positive
+	 *              1: Negative
+	 * 3X5.97[5] - DVI (TMDS) HSYNC Polarity
+	 *              0: Positive
+	 *              1: Negative */
 	svga_wcrt_mask(regs, 0x97, syncPolarity << 5, BIT(6) | BIT(5));
 	DRM_DEBUG_KMS("TMDS (DVI) Horizontal Sync Polarity: %s\n",
 			(syncPolarity & BIT(0)) ? "-" : "+");
commit 7e45f432b80f9f989b5359aa4451a8d2a3c54a2e
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Thu Jun 29 14:33:21 2017 -0500

    via_lvds2_set_display_source
    
    Added via_lvds2_set_display_source
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/via/crtc_hw.h b/drivers/gpu/drm/via/crtc_hw.h
index 3afb01b033f..6c3436c04f2 100644
--- a/drivers/gpu/drm/via/crtc_hw.h
+++ b/drivers/gpu/drm/via/crtc_hw.h
@@ -410,6 +410,20 @@ via_lvds2_set_io_pad_setting(void __iomem *regs, u8 io_pad_state)
 }
 
 /*
+ * Sets CX700 or later single chipset's LVDS2 display source.
+ */
+static inline void
+via_lvds2_set_display_source(void __iomem *regs, u8 display_source)
+{
+	/* 3X5.97[4] - LVDS Channel 2 Data Source Selection
+	 *             0: Primary Display
+	 *             1: Secondary Display */
+	svga_wcrt_mask(regs, 0x97, display_source << 4, BIT(4));
+	DRM_DEBUG_KMS("LVDS2 Display Source: IGA%d\n",
+			(display_source & 0x01) + 1);
+}
+
+/*
  * Sets CX700 / VX700 and VX800 chipsets' TMDS (DVI) power state.
  */
 static inline void
commit aa1e2cbcb428a19993262e912c7b963c76db15b1
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Thu Jun 29 14:32:25 2017 -0500

    Added via_lvds1_set_display_source
    
    This is an inline function.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/via/crtc_hw.h b/drivers/gpu/drm/via/crtc_hw.h
index a1d3e58a6b1..3afb01b033f 100644
--- a/drivers/gpu/drm/via/crtc_hw.h
+++ b/drivers/gpu/drm/via/crtc_hw.h
@@ -377,6 +377,20 @@ via_lvds1_set_io_pad_setting(void __iomem *regs, u8 io_pad_state)
 }
 
 /*
+ * Sets CX700 or later single chipset's LVDS1 display source.
+ */
+static inline void
+via_lvds1_set_display_source(void __iomem *regs, u8 display_source)
+{
+	/* 3X5.99[4] - LVDS Channel 1 Data Source Selection
+	 *             0: Primary Display
+	 *             1: Secondary Display */
+	svga_wcrt_mask(regs, 0x99, display_source << 4, BIT(4));
+	DRM_DEBUG_KMS("LVDS1 Display Source: IGA%d\n",
+			(display_source & 0x01) + 1);
+}
+
+/*
  * Sets LVDS2 I/O pad state.
  */
 static inline void
commit b393f19f006e3d4466f0f14165ee9b4409218609
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Thu Jun 29 14:14:43 2017 -0500

    Added via_fpdp_high_set_display_source
    
    This is an inline function.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/via/crtc_hw.h b/drivers/gpu/drm/via/crtc_hw.h
index 92dac654e5e..a1d3e58a6b1 100644
--- a/drivers/gpu/drm/via/crtc_hw.h
+++ b/drivers/gpu/drm/via/crtc_hw.h
@@ -281,6 +281,20 @@ via_fpdp_high_set_io_pad_state(void __iomem *regs, u8 io_pad_state)
 }
 
 /*
+ * Sets FPDP (Flat Panel Display Port) High interface display source.
+ */
+static inline void
+via_fpdp_high_set_display_source(void __iomem *regs, u8 display_source)
+{
+	/* 3X5.97[4] - FPDP High Data Source Selection
+	*             0: Primary Display
+	*             1: Secondary Display */
+	svga_wcrt_mask(regs, 0x97, display_source << 4, BIT(4));
+	DRM_DEBUG_KMS("FPDP High Display Source: IGA%d\n",
+			(display_source & 0x01) + 1);
+}
+
+/*
  * Sets CX700 or later single chipset's LVDS1 power sequence type.
  */
 static inline void
commit 805e1ef732634b3aacd8095f5c4f7148403c7351
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Thu Jun 29 13:48:08 2017 -0500

    Added via_fpdp_low_set_display_source
    
    This is an inline function.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/via/crtc_hw.h b/drivers/gpu/drm/via/crtc_hw.h
index 23f0e0999c4..92dac654e5e 100644
--- a/drivers/gpu/drm/via/crtc_hw.h
+++ b/drivers/gpu/drm/via/crtc_hw.h
@@ -248,6 +248,20 @@ via_fpdp_low_set_io_pad_state(void __iomem *regs, u8 io_pad_state)
 }
 
 /*
+ * Sets FPDP (Flat Panel Display Port) Low interface display source.
+ */
+static inline void
+via_fpdp_low_set_display_source(void __iomem *regs, u8 display_source)
+{
+	/* 3X5.99[4] - FPDP Low Data Source Selection
+	*             0: Primary Display
+	*             1: Secondary Display */
+	svga_wcrt_mask(regs, 0x99, display_source << 4, BIT(4));
+	DRM_DEBUG_KMS("FPDP Low Display Source: IGA%d\n",
+			(display_source & 0x01) + 1);
+}
+
+/*
  * Sets FPDP (Flat Panel Display Port) High I/O pad state
  */
 static inline void
commit 9ebf2e9c03be56eb3f55e479e49e21a6c4684e00
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Wed Jun 28 23:51:44 2017 -0500

    Added via_dvp1_set_display_source
    
    This is an inline function.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/via/crtc_hw.h b/drivers/gpu/drm/via/crtc_hw.h
index da666e38740..23f0e0999c4 100644
--- a/drivers/gpu/drm/via/crtc_hw.h
+++ b/drivers/gpu/drm/via/crtc_hw.h
@@ -146,6 +146,20 @@ via_dvp1_set_io_pad_state(void __iomem *regs, u8 io_pad_state)
 }
 
 /*
+ * Sets the display source of DVP1 (Digital Video Port 1) interface.
+ */
+static inline void
+via_dvp1_set_display_source(void __iomem *regs, u8 display_source)
+{
+	/* 3X5.9B[4] - DVP1 Data Source Selection
+	*             0: Primary Display
+	*             1: Secondary Display */
+	svga_wcrt_mask(regs, 0x9B, display_source << 4, BIT(4));
+	DRM_DEBUG_KMS("DVP1 Display Source: IGA%d\n",
+			(display_source & 0x01) + 1);
+}
+
+/*
  * Sets analog (VGA) DAC output state.
  */
 static inline void
commit 3fa6dc3d27049eac0dc40769ff9f0e287af622fa
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Wed Jun 28 23:30:23 2017 -0500

    Added via_dvp0_set_display_source
    
    This is an inline function.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/via/crtc_hw.h b/drivers/gpu/drm/via/crtc_hw.h
index 388fd3fb3ec..da666e38740 100644
--- a/drivers/gpu/drm/via/crtc_hw.h
+++ b/drivers/gpu/drm/via/crtc_hw.h
@@ -113,6 +113,20 @@ via_dvp0_set_io_pad_state(void __iomem *regs, u8 io_pad_state)
 }
 
 /*
+ * Sets the display source of DVP0 (Digital Video Port 0) interface.
+ */
+static inline void
+via_dvp0_set_display_source(void __iomem *regs, u8 display_source)
+{
+	/* 3X5.96[4] - DVP0 Data Source Selection
+	*             0: Primary Display
+	*             1: Secondary Display */
+	svga_wcrt_mask(regs, 0x96, display_source << 4, BIT(4));
+	DRM_DEBUG_KMS("DVP0 Display Source: IGA%d\n",
+			(display_source & 0x01) + 1);
+}
+
+/*
  * Sets DVP1 (Digital Video Port 1) I/O pad state.
  */
 static inline void


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