[Openchrome-devel] drm-openchrome: Branch 'drm-next-3.19' - 2 commits - drivers/gpu/drm

[Kevin Brace]

 drivers/gpu/drm/openchrome/via_crtc.c |    4 ++--
 drivers/gpu/drm/openchrome/via_drv.h  |    4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

New commits:
commit c23a2c32e1afee2b9860222d6b6e27566da787f3
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Mon Nov 6 15:51:40 2017 -0800

    drm/openchrome: Version bumped to 3.0.57
    
    A fix for KM400(A) family's FP distortion bug discovered recently.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/openchrome/via_drv.h b/drivers/gpu/drm/openchrome/via_drv.h
index e6f63d4a985f..36630636efe9 100644
--- a/drivers/gpu/drm/openchrome/via_drv.h
+++ b/drivers/gpu/drm/openchrome/via_drv.h
@@ -30,11 +30,11 @@
 #define DRIVER_AUTHOR       "OpenChrome Project"
 #define DRIVER_NAME         "openchrome"
 #define DRIVER_DESC         "OpenChrome DRM for VIA Technologies Chrome IGP"
-#define DRIVER_DATE         "20171103"
+#define DRIVER_DATE         "20171106"
 
 #define DRIVER_MAJOR		3
 #define DRIVER_MINOR		0
-#define DRIVER_PATCHLEVEL	56
+#define DRIVER_PATCHLEVEL	57
 
 #include <linux/module.h>
 
commit f9308d2a40bb08316de84baf080242326f2b7c65
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Mon Nov 6 15:40:07 2017 -0800

    drm/openchrome: Not increment horizontal display fetch count by 1
    
    This does not appear to affect newer devices, but it causes KM400(A)
    chipset family's FP to display a slanted picture. The problem was
    observed on Averatec 3250HX laptop likely with KN400(A) chipset (not
    sure it is KN400 or KN400A).
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index 2f4a2644f572..02a7f4d2c426 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -1332,7 +1332,7 @@ via_iga1_mode_set_base_atomic(struct drm_crtc *crtc,
 
     /* Load fetch count registers */
     pitch = ALIGN(crtc->mode.hdisplay * fb->bits_per_pixel >> 3, 16);
-    load_value_to_registers(VGABASE, &iga->fetch, (pitch >> 4) + 1);
+    load_value_to_registers(VGABASE, &iga->fetch, pitch >> 4);
 
     /* Set the primary pitch */
     pitch = ALIGN(fb->pitches[0], 16);
@@ -1652,7 +1652,7 @@ via_iga2_mode_set_base_atomic(struct drm_crtc *crtc,
 
     /* Load fetch count registers */
     pitch = ALIGN(crtc->mode.hdisplay * fb->bits_per_pixel >> 3, 16);
-    load_value_to_registers(VGABASE, &iga->fetch, (pitch >> 4) + 1);
+    load_value_to_registers(VGABASE, &iga->fetch, pitch >> 4);
 
     /* Set secondary pitch */
     pitch = ALIGN(fb->pitches[0], 16);