[Openchrome-devel] drm-openchrome: Branch 'drm-next-3.19' - 2 commits - drivers/gpu/drm

[Kevin Brace]

 drivers/gpu/drm/openchrome/via_drv.c |   18 ++++++++++++++++++
 drivers/gpu/drm/openchrome/via_drv.h |    2 +-
 2 files changed, 19 insertions(+), 1 deletion(-)

New commits:
commit b57cffff82216a6aafaed5a773d6a6d608853f77
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Mon Oct 30 20:54:39 2017 -0700

    Version bumped to 3.0.53
    
    This version improves non-I2C bus FP standby resume behavior.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/openchrome/via_drv.h b/drivers/gpu/drm/openchrome/via_drv.h
index 56d577ed6613..4c08bba0267c 100644
--- a/drivers/gpu/drm/openchrome/via_drv.h
+++ b/drivers/gpu/drm/openchrome/via_drv.h
@@ -34,7 +34,7 @@
 
 #define DRIVER_MAJOR		3
 #define DRIVER_MINOR		0
-#define DRIVER_PATCHLEVEL	52
+#define DRIVER_PATCHLEVEL	53
 
 #include <linux/module.h>
 
commit 1a4ec94c4e40b4f93cd9647338e8e2910d7aa42b
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Mon Oct 30 20:50:08 2017 -0700

    Unlock VIA Chrome IGP registers when resuming
    
    Not doing this in the resume callback causes scratch pad registers
    to be locked when trying to restore them, and this eventually causes
    non-I2C bus FP to disappear after standby resume.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/openchrome/via_drv.c b/drivers/gpu/drm/openchrome/via_drv.c
index 9904f8c73ac3..5fc26da8d179 100644
--- a/drivers/gpu/drm/openchrome/via_drv.c
+++ b/drivers/gpu/drm/openchrome/via_drv.c
@@ -572,11 +572,29 @@ static int via_pm_ops_resume(struct device *dev)
 	struct pci_dev *pdev = to_pci_dev(dev);
 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
 	struct via_device *dev_priv = drm_dev->dev_private;
+	void __iomem *regs = ioport_map(0x3c0, 100);
+	u8 val;
 
 	DRM_DEBUG_KMS("Entered %s.", __func__);
 
 	console_lock();
 
+	val = ioread8(regs + 0x03);
+	iowrite8(val | 0x1, regs + 0x03);
+	val = ioread8(regs + 0x0C);
+	iowrite8(val | 0x1, regs + 0x02);
+
+	/* Unlock Extended IO Space. */
+	iowrite8(0x10, regs + 0x04);
+	iowrite8(0x01, regs + 0x05);
+	/* Unlock CRTC register protect. */
+	iowrite8(0x47, regs + 0x14);
+
+	/* Enable MMIO. */
+	iowrite8(0x1a, regs + 0x04);
+	val = ioread8(regs + 0x05);
+	iowrite8(val | 0x38, regs + 0x05);
+
 	/* 3X5.3B through 3X5.3F are scratch pad registers.
 	 * They are important for FP detection.
 	 * Their values need to be restored because they are undefined