[Openchrome-devel] drm-openchrome: Branch 'drm-next-4.15' - 3 commits - drivers/gpu/drm
Kevin Brace
kevinbrace at kemper.freedesktop.org
Sun Jan 28 20:28:42 UTC 2018
drivers/gpu/drm/openchrome/via_crtc.c | 154 ----------------------------------
drivers/gpu/drm/openchrome/via_drv.h | 2
2 files changed, 4 insertions(+), 152 deletions(-)
New commits:
commit b5a076fe6c34fe009af9da383634dc09f5bda5cf
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sun Jan 28 12:27:13 2018 -0800
drm/openchrome: Version bumped to 3.0.63
A fix for CLE266 chipset regression and reduction of duplicated code.
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_drv.h b/drivers/gpu/drm/openchrome/via_drv.h
index 69f6269b1e95..df658fd986f4 100644
--- a/drivers/gpu/drm/openchrome/via_drv.h
+++ b/drivers/gpu/drm/openchrome/via_drv.h
@@ -34,7 +34,7 @@
#define DRIVER_MAJOR 3
#define DRIVER_MINOR 0
-#define DRIVER_PATCHLEVEL 62
+#define DRIVER_PATCHLEVEL 63
#include <linux/module.h>
commit 94c2ec4296145c91d6304922d0a893812b0f3336
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sun Jan 28 12:25:07 2018 -0800
drm/openchrome: Set display FIFO parameters only when mode setting
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index 79b5197a6895..c6491f472234 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -2191,86 +2191,6 @@ via_crtc_init(struct drm_device *dev, int index)
/* Older hardware only uses 12 bits */
iga->offset.count = ARRAY_SIZE(iga2_offset) - 1;
iga->offset.regs = iga2_offset;
-
- switch (dev->pdev->device) {
- case PCI_DEVICE_ID_VIA_K8M800:
- iga->display_queue_expire_num = 0;
- iga->fifo_high_threshold = 296;
- iga->fifo_threshold = 328;
- iga->fifo_max_depth = 384;
- break;
-
- case PCI_DEVICE_ID_VIA_PM800:
- iga->display_queue_expire_num = 0;
- iga->fifo_high_threshold = 64;
- iga->fifo_threshold = 128;
- iga->fifo_max_depth = 192;
- break;
-
- case PCI_DEVICE_ID_VIA_CN700:
- iga->display_queue_expire_num = 128;
- iga->fifo_high_threshold = 32;
- iga->fifo_threshold = 80;
- iga->fifo_max_depth = 96;
- break;
-
- /* CX700 */
- case PCI_DEVICE_ID_VIA_VT3157:
- iga->display_queue_expire_num = 128;
- iga->fifo_high_threshold = 32;
- iga->fifo_threshold = 64;
- iga->fifo_max_depth = 96;
- break;
-
- /* K8M890 */
- case PCI_DEVICE_ID_VIA_K8M890:
- iga->display_queue_expire_num = 124;
- iga->fifo_high_threshold = 296;
- iga->fifo_threshold = 328;
- iga->fifo_max_depth = 360;
- break;
-
- /* P4M890 */
- case PCI_DEVICE_ID_VIA_VT3343:
- iga->display_queue_expire_num = 32;
- iga->fifo_high_threshold = 64;
- iga->fifo_threshold = 76;
- iga->fifo_max_depth = 96;
- break;
-
- /* P4M900 */
- case PCI_DEVICE_ID_VIA_P4M900:
- iga->fifo_high_threshold = iga->fifo_threshold = 76;
- iga->display_queue_expire_num = 32;
- iga->fifo_max_depth = 96;
- break;
-
- /* VX800 */
- case PCI_DEVICE_ID_VIA_VT1122:
- iga->display_queue_expire_num = 128;
- iga->fifo_high_threshold = 32;
- iga->fifo_threshold = 64;
- iga->fifo_max_depth = 96;
- iga->offset.count++;
- break;
-
- /* VX855 */
- case PCI_DEVICE_ID_VIA_VX875:
- iga->fifo_high_threshold = iga->fifo_threshold = 160;
- iga->display_queue_expire_num = 320;
- iga->fifo_max_depth = 200;
- iga->offset.count++;
- break;
-
- /* VX900 */
- case PCI_DEVICE_ID_VIA_VX900_VGA:
- iga->fifo_high_threshold = iga->fifo_threshold = 160;
- iga->display_queue_expire_num = 320;
- iga->fifo_max_depth = 192;
- iga->offset.count++;
- default:
- break;
- }
} else {
drm_crtc_init(dev, crtc, &via_iga1_funcs);
drm_crtc_helper_add(crtc, &via_iga1_helper_funcs);
@@ -2348,77 +2268,8 @@ via_crtc_init(struct drm_device *dev, int index)
iga->offset.count = ARRAY_SIZE(iga1_offset);
iga->offset.regs = iga1_offset;
-
- switch (dev->pdev->device) {
- case PCI_DEVICE_ID_VIA_K8M800:
- iga->display_queue_expire_num = 128;
- iga->fifo_high_threshold = 296;
- iga->fifo_threshold = 328;
- iga->fifo_max_depth = 384;
- break;
-
- case PCI_DEVICE_ID_VIA_PM800:
- iga->display_queue_expire_num = 128;
- iga->fifo_high_threshold = 32;
- iga->fifo_threshold = 64;
- iga->fifo_max_depth = 96;
- break;
-
- case PCI_DEVICE_ID_VIA_CN700:
- iga->display_queue_expire_num = 0;
- iga->fifo_high_threshold = 64;
- iga->fifo_threshold = 80;
- iga->fifo_max_depth = 96;
- break;
-
- /* CX700 */
- case PCI_DEVICE_ID_VIA_VT3157:
- iga->fifo_high_threshold = iga->fifo_threshold = 128;
- iga->display_queue_expire_num = 124;
- iga->fifo_max_depth = 192;
- break;
-
- /* K8M890 */
- case PCI_DEVICE_ID_VIA_K8M890:
- iga->display_queue_expire_num = 124;
- iga->fifo_high_threshold = 296;
- iga->fifo_threshold = 328;
- iga->fifo_max_depth = 360;
- break;
-
- /* P4M890 */
- case PCI_DEVICE_ID_VIA_VT3343:
- iga->display_queue_expire_num = 32;
- iga->fifo_high_threshold = 64;
- iga->fifo_threshold = 76;
- iga->fifo_max_depth = 96;
- break;
-
- /* P4M900 */
- case PCI_DEVICE_ID_VIA_P4M900:
- iga->fifo_high_threshold = iga->fifo_threshold = 76;
- iga->display_queue_expire_num = 32;
- iga->fifo_max_depth = 96;
- break;
-
- /* VX800 */
- case PCI_DEVICE_ID_VIA_VT1122:
- iga->fifo_high_threshold = iga->fifo_threshold = 152;
- iga->display_queue_expire_num = 64;
- iga->fifo_max_depth = 192;
- break;
-
- /* VX855 */
- case PCI_DEVICE_ID_VIA_VX875:
- /* VX900 */
- case PCI_DEVICE_ID_VIA_VX900_VGA:
- iga->fifo_high_threshold = iga->fifo_threshold = 320;
- iga->display_queue_expire_num = 160;
- iga->fifo_max_depth = 400;
- default:
- break;
- }
}
+
drm_mode_crtc_set_gamma_size(crtc, 256);
gamma = crtc->gamma_store;
commit c93e2d912861e1f4026066ec1a0d68514143c724
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sun Jan 28 12:23:26 2018 -0800
drm/openchrome: Added missing CLE266 IGA2 display FIFO initialization
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index 4ebd6504bbc8..79b5197a6895 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -2164,7 +2164,8 @@ via_crtc_init(struct drm_device *dev, int index)
iga->timings.vsync_end.regs = iga2_ver_sync_end;
/* Secondary FIFO setup */
- if (dev->pdev->device == PCI_DEVICE_ID_VIA_KM400) {
+ if ((dev->pdev->device == PCI_DEVICE_ID_VIA_CLE266) ||
+ (dev->pdev->device == PCI_DEVICE_ID_VIA_KM400)) {
iga->fifo_depth.count = ARRAY_SIZE(iga2_cle266_fifo_depth_select);
iga->fifo_depth.regs = iga2_cle266_fifo_depth_select;
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