[openchrome-devel] drm-openchrome: Branch 'drm-next-6.3' - 3 commits - drivers/gpu/drm

Kevin Brace kevinbrace at kemper.freedesktop.org
Sat Apr 8 01:22:57 UTC 2023


 drivers/gpu/drm/via/via_crtc.c |   97 +++++++++++++++++++----------------------
 drivers/gpu/drm/via/via_drv.h  |    4 -
 2 files changed, 48 insertions(+), 53 deletions(-)

New commits:
commit c5310698f976f4761302669adbf427c35c9141cb
Author: Kevin Brace <kevinbrace at bracecomputerlab.com>
Date:   Fri Apr 7 18:21:27 2023 -0700

    drm/via: Version bumped to 3.6.5
    
    Signed-off-by: Kevin Brace <kevinbrace at bracecomputerlab.com>

diff --git a/drivers/gpu/drm/via/via_drv.h b/drivers/gpu/drm/via/via_drv.h
index bcc0a75a0002..83f2d05c7fe8 100644
--- a/drivers/gpu/drm/via/via_drv.h
+++ b/drivers/gpu/drm/via/via_drv.h
@@ -44,10 +44,10 @@
 
 #define DRIVER_MAJOR		3
 #define DRIVER_MINOR		6
-#define DRIVER_PATCHLEVEL	4
+#define DRIVER_PATCHLEVEL	5
 #define DRIVER_NAME		"via"
 #define DRIVER_DESC		"OpenChrome DRM for VIA Technologies Chrome"
-#define DRIVER_DATE		"20230224"
+#define DRIVER_DATE		"20230407"
 #define DRIVER_AUTHOR		"OpenChrome Project"
 
 
commit 98f321e117ea57d62d031b64364df8e39645c37b
Author: Kevin Brace <kevinbrace at bracecomputerlab.com>
Date:   Fri Apr 7 18:21:25 2023 -0700

    drm/via: Adjust CRTC pitch calculation and indentation
    
    Signed-off-by: Kevin Brace <kevinbrace at bracecomputerlab.com>

diff --git a/drivers/gpu/drm/via/via_crtc.c b/drivers/gpu/drm/via/via_crtc.c
index 0db78cf0ea98..e5d1fa742a6a 100644
--- a/drivers/gpu/drm/via/via_crtc.c
+++ b/drivers/gpu/drm/via/via_crtc.c
@@ -1929,8 +1929,7 @@ void via_primary_atomic_update(struct drm_plane *plane,
 		vga_wcrt(VGABASE, 0x34, (addr >> 16) & 0xFF);
 
 		/* Load fetch count registers */
-		pitch = ALIGN(crtc->mode.hdisplay * fb->format->cpp[0],
-				16);
+		pitch = ALIGN(crtc->mode.hdisplay * fb->format->cpp[0],	16);
 		load_value_to_registers(VGABASE, &iga->fetch, pitch >> 4);
 
 		/* Set the primary pitch */
@@ -1956,7 +1955,7 @@ void via_primary_atomic_update(struct drm_plane *plane,
 		svga_wcrt_mask(VGABASE, 0xA3, ((addr >> 26) & 0x07), 0x07);
 
 		/* Load fetch count registers */
-		pitch = ALIGN(crtc->mode.hdisplay * (fb->format->cpp[0] * 8) >> 3, 16);
+		pitch = ALIGN(crtc->mode.hdisplay * fb->format->cpp[0], 16);
 		load_value_to_registers(VGABASE, &iga->fetch, pitch >> 4);
 
 		/* Set secondary pitch */
commit 063554e3edc04b77a33210d9b4c5feb9ebe1c7aa
Author: Kevin Brace <kevinbrace at bracecomputerlab.com>
Date:   Fri Apr 7 18:18:21 2023 -0700

    drm/via: Modify via_iga*_set_color_depth() input parameters
    
    Signed-off-by: Kevin Brace <kevinbrace at bracecomputerlab.com>

diff --git a/drivers/gpu/drm/via/via_crtc.c b/drivers/gpu/drm/via/via_crtc.c
index 8a4db7ef585a..0db78cf0ea98 100644
--- a/drivers/gpu/drm/via/via_crtc.c
+++ b/drivers/gpu/drm/via/via_crtc.c
@@ -106,86 +106,78 @@ static void via_iga_common_init(struct drm_device *dev)
 }
 
 static void via_iga1_set_color_depth(struct drm_device *dev,
-					u8 depth)
+					u8 cpp, u8 depth)
 {
 	struct via_drm_priv *dev_priv = to_via_drm_priv(dev);
-	u8 value;
+	u8 data;
 
 	DRM_DEBUG_KMS("Entered %s.\n", __func__);
 
-	value = 0x00;
+	data = 0x00;
 
 	/* Set the color depth for IGA1. */
-	switch (depth) {
-	case 8:
+	switch (cpp) {
+	case 1:
+		data |= BIT(4);
 		break;
-	case 16:
-		/* Bit 4 is for 555 (15-bit) / 565 (16-bit) color selection. */
-		value |= BIT(4) | BIT(2);
+	case 2:
+		data = (depth == 15) ? BIT(2) : BIT(4) | BIT(2);
 		break;
-	case 24:
-		value |= BIT(3) | BIT(2);
+	case 4:
+		data = (depth == 30) ? BIT(3) : BIT(3) | BIT(2);
+		data |= BIT(4);
 		break;
 	default:
 		break;
 	}
 
-	if ((depth == 8) || (depth == 16) || (depth == 24)) {
-		/* 3C5.15[4]   - Hi Color Mode Select
-		 *               0: 555
-		 *               1: 565
-		 * 3C5.15[3:2] - Display Color Depth Select
-		 *               00: 8bpp
-		 *               01: 16bpp
-		 *               10: 30bpp
-		 *               11: 32bpp */
-		svga_wseq_mask(VGABASE, 0x15, value,
-				BIT(4) | BIT(3) | BIT(2));
-		DRM_INFO("IGA1 Color Depth: %d bit\n", depth);
-	} else {
-		DRM_ERROR("Unsupported IGA1 Color Depth: %d bit\n",
-				depth);
-	}
+	/*
+	 * 3C5.15[4]   - Hi Color Mode Select
+	 *               0: 555
+	 *               1: 565
+	 * 3C5.15[3:2] - Display Color Depth Select
+	 *               00: 8bpp
+	 *               01: 16bpp
+	 *               10: 30bpp
+	 *               11: 32bpp
+	 */
+	svga_wseq_mask(VGABASE, 0x15, data, BIT(4) | BIT(3) | BIT(2));
 
 	DRM_DEBUG_KMS("Exiting %s.\n", __func__);
 }
 
 static void via_iga2_set_color_depth(struct drm_device *dev,
-					u8 depth)
+					u8 cpp, u8 depth)
 {
 	struct via_drm_priv *dev_priv = to_via_drm_priv(dev);
-	u8 value;
+	u8 data;
 
 	DRM_DEBUG_KMS("Entered %s.\n", __func__);
 
-	value = 0x00;
+	data = 0x00;
 
 	/* Set the color depth for IGA2. */
 	switch (depth) {
-	case 8:
+	case 1:
 		break;
-	case 16:
-		value = BIT(6);
+	case 2:
+		data = BIT(6);
 		break;
-	case 24:
-		value = BIT(7) | BIT(6);
+	case 4:
+		data = (depth == 30) ? BIT(7) : BIT(7) | BIT(6);
 		break;
 	default:
 		break;
 	}
 
-	if ((depth == 8) || (depth == 16) || (depth == 24)) {
-		/* 3X5.67[7:6] - Display Color Depth Select
-		 *               00: 8bpp
-		 *               01: 16bpp
-		 *               10: 30bpp
-		 *               11: 32bpp */
-		svga_wcrt_mask(VGABASE, 0x67, value, 0xC0);
-		DRM_INFO("IGA2 Color Depth: %d bit\n", depth);
-	} else {
-		DRM_ERROR("Unsupported IGA2 Color Depth: %d bit\n",
-				depth);
-	}
+	/*
+	 * 3X5.67[7:6] - Display Color Depth Select
+	 *               00: 8bpp
+	 *               01: 16bpp
+	 *               10: 30bpp
+	 *               11: 32bpp
+	 */
+	svga_wcrt_mask(VGABASE, 0x67, data, BIT(7) | BIT(6));
 
 	DRM_DEBUG_KMS("Exiting %s.\n", __func__);
 }
@@ -1922,7 +1914,9 @@ void via_primary_atomic_update(struct drm_plane *plane,
 	bo = to_ttm_bo(ttm_bo);
 
 	if (!iga->index) {
-		via_iga1_set_color_depth(dev, fb->format->depth);
+		via_iga1_set_color_depth(dev,
+						fb->format->cpp[0],
+						fb->format->depth);
 
 		/* Set the framebuffer offset */
 		addr = round_up((ttm_bo->resource->start << PAGE_SHIFT) +
@@ -1946,7 +1940,9 @@ void via_primary_atomic_update(struct drm_plane *plane,
 		 * second adapter */
 		load_value_to_registers(VGABASE, &iga->offset, pitch >> 3);
 	} else {
-		via_iga2_set_color_depth(dev, fb->format->depth);
+		via_iga2_set_color_depth(dev,
+						fb->format->cpp[0],
+						fb->format->depth);
 
 		/* Set the framebuffer offset */
 		addr = round_up((ttm_bo->resource->start << PAGE_SHIFT) +


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