<html>
<head>
<base href="https://bugs.freedesktop.org/">
</head>
<body>
<p>
<div>
<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - legacy modesetting removal breaks CLE266"
href="https://bugs.freedesktop.org/show_bug.cgi?id=96397#c21">Comment # 21</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - legacy modesetting removal breaks CLE266"
href="https://bugs.freedesktop.org/show_bug.cgi?id=96397">bug 96397</a>
from <span class="vcard"><a class="email" href="mailto:kevinbrace@gmx.com" title="Kevin Brace <kevinbrace@gmx.com>"> <span class="fn">Kevin Brace</span></a>
</span></b>
<pre>(In reply to Xavier Bachelot from <a href="show_bug.cgi?id=96397#c19">comment #19</a>)
Hi Xavier,
<span class="quote">> The bios was set to CRT+TV. Setting to CRT only gave me a working VGA
> display with unmodified 0.4.169, so the driver depends on BIOS. I guess the
> fix would be to initialize 3x5.6b and 3x5.6c to 0x00 in viaIGAInitCommon
> (rather than viaIGA1Init as you suggested, as it seems to me it is not
> specifically related to IGA1). What do you think ?</span >
Yes, that is what I started to suspect.
3X5.6B[7:6] is not being set by non-TV portion of the code, and that is a
problem.
I think for now, we can possibly put the fixes into viIGAInitCommon,
viaIGA1Init , and viaIGA2Init functions.
This is how I will do it.
viaIGAInitCommon function:
3X5.6B[3] -> 0
viaIGA1Init function:
- 3X5.6B[7:6] -> 00
- 3X5.6C[7:5] -> 000 (VCLK (IGA1) related)
- 3X5.6C[4] -> 0 (VCLK (IGA1) related)
viaIGA2Init function:
- 3X5.6A[7:0] -> 0x00
- 3X5.6B[5:4] -> 00
- 3X5.6B[2] -> 0
- 3X5.6B[1] -> 0
- 3X5.6C[3:1] -> 000 (LCDCK (IGA2) related)
- 3X5.6C[0] -> 0 (LCDCK (IGA2) related)
The way these functions should work is that register bits common to IGA1 and
IGA2 should be initialized inside viaIGAInitCommon function.
Register bits that belong to IGA1 should be initialized inside viaIGA1Init
function and the same thing for IGA2.
When IGA2 mode setting is done, it may alter some of the IGA2 registers within
viaIGA2SetDisplayRegister function to the final value.
What this means is that the final register value may be different from what was
initialized in viaIGA2Init.
An example of this is 3X5.6A[5] (IGA2 6-bit / 8-bit LUT selection).</pre>
</div>
</p>
<hr>
<span>You are receiving this mail because:</span>
<ul>
<li>You are the assignee for the bug.</li>
</ul>
</body>
</html>