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<body><span class="vcard"><a class="email" href="mailto:kevinbrace@gmx.com" title="Kevin Brace <kevinbrace@gmx.com>"> <span class="fn">Kevin Brace</span></a>
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<a class="bz_bug_link
bz_status_NEW "
title="NEW - legacy modesetting removal breaks CLE266"
href="https://bugs.freedesktop.org/show_bug.cgi?id=96397">bug 96397</a>
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<td style="text-align:right;">Attachment #124397 is obsolete</td>
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<td>1
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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - legacy modesetting removal breaks CLE266"
href="https://bugs.freedesktop.org/show_bug.cgi?id=96397#c28">Comment # 28</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - legacy modesetting removal breaks CLE266"
href="https://bugs.freedesktop.org/show_bug.cgi?id=96397">bug 96397</a>
from <span class="vcard"><a class="email" href="mailto:kevinbrace@gmx.com" title="Kevin Brace <kevinbrace@gmx.com>"> <span class="fn">Kevin Brace</span></a>
</span></b>
<pre>Created <span class=""><a href="attachment.cgi?id=124430" name="attach_124430" title="Proposed CLE266 VGA TV out Bug Fix">attachment 124430</a> <a href="attachment.cgi?id=124430&action=edit" title="Proposed CLE266 VGA TV out Bug Fix">[details]</a></span> <a href='page.cgi?id=splinter.html&bug=96397&attachment=124430'>[review]</a>
Proposed CLE266 VGA TV out Bug Fix
Initializing CR6A, CR6B, and CR6C when mode setting is done
Not all the register fields of CR6A (3X5.6A), CR6B (3X5.6B), and
CR6C (3X5.6C) were being initialized, and as a result, specifying
the availability of TV out in the BIOS setup will lead to analog out
(VGA) not working properly. Specifically, CR6B[7:6] and CR6C[0]
were causing problems. CR6C controls DIP0 (Digital Interface Port 0)
and exists at this address only in CLE266 (DIP0 is called DVP0 since
KM400 chipset, and DVP0 control register is located at CR96.).
This bug was observed with VIA Embedded EPIA-M mainboard (CLE266 chipset
with VT1622 TV encoder), and likely only affects CLE266 chipset.
Signed-off-by: Xavier Bachelot <"Xavier's e-mail address">
Signed-off-by: Kevin Brace <"Kevin's e-mail address"></pre>
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