[Piglit] [PATCH] svga: enable instanced arrays for VGPU10

Brian Paul brianp at vmware.com
Wed May 21 15:08:01 PDT 2014


This enables the GL_ARB_instanced_arrays extension (vertex attribute
divisors).  Piglit tests pass.
---
 src/gallium/drivers/svga/svga_pipe_vertex.c |   10 ++++++++--
 src/gallium/drivers/svga/svga_screen.c      |    2 +-
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/svga/svga_pipe_vertex.c b/src/gallium/drivers/svga/svga_pipe_vertex.c
index 5915e89..6813e44 100644
--- a/src/gallium/drivers/svga/svga_pipe_vertex.c
+++ b/src/gallium/drivers/svga/svga_pipe_vertex.c
@@ -277,8 +277,14 @@ define_input_element_object(struct svga_context *svga,
       elements[i].inputSlot = elem->vertex_buffer_index;
       elements[i].alignedByteOffset = elem->src_offset;
       elements[i].format = translate_vertex_format_vgpu10(elem->src_format);
-      elements[i].inputSlotClass = SVGA3D_INPUT_PER_VERTEX_DATA;
-      elements[i].instanceDataStepRate = 0;
+      if (elem->instance_divisor) {
+         elements[i].inputSlotClass = SVGA3D_INPUT_PER_INSTANCE_DATA;
+         elements[i].instanceDataStepRate = elem->instance_divisor;
+      }
+      else {
+         elements[i].inputSlotClass = SVGA3D_INPUT_PER_VERTEX_DATA;
+         elements[i].instanceDataStepRate = 0;         
+      }
       elements[i].inputRegister = i;
 
       if (elements[i].format == SVGA3D_FORMAT_INVALID) {
diff --git a/src/gallium/drivers/svga/svga_screen.c b/src/gallium/drivers/svga/svga_screen.c
index 80aaeba..3792c82 100644
--- a/src/gallium/drivers/svga/svga_screen.c
+++ b/src/gallium/drivers/svga/svga_screen.c
@@ -238,6 +238,7 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
       return sws->have_vgpu10;
 
    case PIPE_CAP_TGSI_INSTANCEID:
+   case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
       return sws->have_vgpu10;
 
    /* Unsupported features */
@@ -250,7 +251,6 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_INDEP_BLEND_FUNC:
    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
    case PIPE_CAP_PRIMITIVE_RESTART:
-   case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
    case PIPE_CAP_MIN_TEXEL_OFFSET:
    case PIPE_CAP_MAX_TEXEL_OFFSET:
    case PIPE_CAP_CONDITIONAL_RENDER:
-- 
1.7.10.4



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