[Piglit] [PATCH] shaders: Use 3-source operations as conditions

[Ian Romanick]

From: Ian Romanick <ian.d.romanick at intel.com>

These tests attempt to generate 3-source instructions that will generate
a condition code.  The goal is to have the compiler eliminate the
destination write so that only the condition is generated.  On i965,
this is not valid.  Some versions of Mesa will do this, and a GPU hang
will follow.

NOTE: This bug does *not* require the commit bisected in the bugzilla
entry.

Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Cc: Tapani Pälli <tapani.palli at intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105704
---
 .../execution/vs-fma-as-condition.shader_test      | 42 ++++++++++++++++++++++
 .../execution/vs-mix-as-condition.shader_test      | 39 ++++++++++++++++++++
 2 files changed, 81 insertions(+)
 create mode 100644 tests/spec/arb_gpu_shader5/execution/vs-fma-as-condition.shader_test
 create mode 100644 tests/spec/glsl-1.20/execution/vs-mix-as-condition.shader_test

diff --git a/tests/spec/arb_gpu_shader5/execution/vs-fma-as-condition.shader_test b/tests/spec/arb_gpu_shader5/execution/vs-fma-as-condition.shader_test
new file mode 100644
index 0000000..197ac19
--- /dev/null
+++ b/tests/spec/arb_gpu_shader5/execution/vs-fma-as-condition.shader_test
@@ -0,0 +1,42 @@
+[require]
+GLSL >= 1.50
+GL_ARB_gpu_shader5
+
+[vertex shader]
+#extension GL_ARB_gpu_shader5: require
+
+uniform vec4 red = vec4(1.0, 0.0, 0.0, 1.0);
+uniform vec4 color_delta = vec4(-1.0, 1.0, 0.0, 0.0);
+uniform float a = 2.0;
+uniform float b = 0.25;
+uniform float c = -0.5;
+
+in vec4 piglit_vertex;
+out vec4 color;
+
+void main()
+{
+    gl_Position = piglit_vertex;
+
+    color = red;
+
+    /* This attempts to reproduce a bug in the i965 vec4 backend.  Three-
+     * source instructions, like MAD, cannot write to the null register.
+     * However, when the result is only used in a condition, the write can be
+     * (erroneously) eliminated.
+     */
+    if (fma(a, b, c) == 0.0)
+        color += color_delta;
+}
+
+[fragment shader]
+in vec4 color;
+
+void main()
+{
+    gl_FragColor = color;
+}
+
+[test]
+draw rect -1 -1 2 2
+probe all rgba 0.0 1.0 0.0 1.0
diff --git a/tests/spec/glsl-1.20/execution/vs-mix-as-condition.shader_test b/tests/spec/glsl-1.20/execution/vs-mix-as-condition.shader_test
new file mode 100644
index 0000000..0377611
--- /dev/null
+++ b/tests/spec/glsl-1.20/execution/vs-mix-as-condition.shader_test
@@ -0,0 +1,39 @@
+[require]
+GLSL >= 1.20
+
+[vertex shader]
+uniform vec4 red = vec4(1.0, 0.0, 0.0, 1.0);
+uniform vec4 color_delta = vec4(-1.0, 1.0, 0.0, 0.0);
+uniform float a = -1.0;
+uniform float b = 1.0;
+uniform float c = 0.5;
+
+attribute vec4 piglit_vertex;
+varying vec4 color;
+
+void main()
+{
+    gl_Position = piglit_vertex;
+
+    color = red;
+
+    /* This attempts to reproduce a bug in the i965 vec4 backend.  Three-
+     * source instructions, like LRP, cannot write to the null register.
+     * However, when the result is only used in a condition, the write can be
+     * (erroneously) eliminated.
+     */
+    if (mix(a, b, c) == 0)
+        color += color_delta;
+}
+
+[fragment shader]
+varying vec4 color;
+
+void main()
+{
+    gl_FragColor = color;
+}
+
+[test]
+draw rect -1 -1 2 2
+probe all rgba 0.0 1.0 0.0 1.0
-- 
2.9.5