[Pixman] MIPS blt and fill routines.
nlukic at mips.com
Tue Feb 28 04:47:27 PST 2012
Added optimizations for the blt and fill routines.
- Blt routine uses pixman_mips_fast_memcpy if the conditions are met (src_bpp == dst_bpp)
- Fill routine uses pixman_fill_buff16_mips/pixman_fill_buff32_mips (for 16/32 bpp destination)
These optimizations assume (as previous) that cache line size is 32 bytes long (which is true for 74K cores).
Benchmark results (cairo-perf-trace) on Malta board (@1Ghz) are included in the log message.
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