[Pixman] 答复: compatibility problem of Pixman on SOC system(such as ARMv7, or big.LITTLE)

Caoqiuhong caoqiuhong at hisilicon.com
Fri Jul 25 20:02:16 PDT 2014


Hi Lennart,

I just want explain detail for you question, and some findings.

>>Which CPU model are you using?  Does it support using all 8 cores at once, or does it switch between the A15 and A7 clusters?
Not run A7 or A15 cluster separately, but run A7 and A15 cluster at once. truly 8cores, not 4 at A7, or 4 at A15 independently. 

Some test I have done.
2 at A7 and 2 at A15 is ok at once, this issue just happen if the core count more than 4.

In Android source code , I found pixman located in external/pixman, and static library cpufeatures will be linked in it's makefile.
cpufeature is an android ndk module, it will open debug fs node in linux, such as follow,
"/sys/devices/system/cpu/present"
"/sys/devices/system/cpu/possible"

if cpu present return value equal or less than 4, no such issue.
if cpu present return value greater than 4, issue will happen.

Best Regards.
CaoQiuhong


-----邮件原件-----
发件人: Caoqiuhong 
发送时间: 2014年7月26日 10:44
收件人: 'Lennart Sorensen'
抄送: pixman at lists.freedesktop.org
主题: 答复: [Pixman] compatibility problem of Pixman on SOC system(such as ARMv7, or big.LITTLE)

Hi Lennart,

Thank you for your quickly reply.
>>Which CPU model are you using?  Does it support using all 8 cores at once, or does it switch between the A15 and A7 clusters?
The CPU model we use is big.LITTLE(4 at A7, 4 at A15), yes, it support using all 8 cores at once, and application could switch between A15 and A7 cluster.
Now three SOC support 8 cores run at once, Exynos 5422, Kirin920 (these two are big.LITTLE cpu), MT6592 (8 cores A7).

>>If it uses all 8 cores at once, is the cache coherency correctly enabled (The CCI)?
Yes, CCI enabled, in order to ensure the cache coherency between each core in different clusters, only enable CCI could make 8 core run at once.
I don't think the CCI cause the this issue. because MT6592 device is 8 core A7, no CCI feature, also have the same problem.

>>I have a system on my desk with 8 cores but the kernel doesn't support using the A7 cores yet (I should check if that has been fixed yet or not).
You said BSP in you device doesn't support A7. Is that mean only run 4 at A15 core at once?
Could you tell me what 8 cores device you use?  As I know, only few devices support 8 cores now.
Such as Galaxy S5(Exynos 5422), Honor 6(Kirin 920), and some MT6592 devices.

Best Regards.
CaoQiuhong

-----邮件原件-----
发件人: Lennart Sorensen [mailto:lsorense at csclub.uwaterloo.ca]
发送时间: 2014年7月26日 5:18
收件人: Caoqiuhong
抄送: pixman at lists.freedesktop.org
主题: Re: [Pixman] compatibility problem of Pixman on SOC system(such as ARMv7, or big.LITTLE)

On Thu, Jul 24, 2014 at 11:19:15AM +0000, Caoqiuhong wrote:
> Hello all pixman project members,
> 
> From my email address, you can know that I am from silicon company Hisilicon in China, I am working with Android system on SOC platform.
> 
> As we already known that Pixman embedded into Android system(android version is Kitkat, Pixman version is 0.30.0).
> I think Pixman already used by many applications in ARM soc system, 
> Pixman used many optimization code according to different CPU architecture, such as X86, mips, arm. SIMD instruction set including SSE, NEON and so on.
> 
> Now we just talk ARM CPU and NEON.
> A question from me is that have you tested Pixman on ARM big.LITTLE cpu?
> Now I found many games use pixel compositing feature Pixman supported, but the same pixel before compositing with the different output.
> The compositing output is correct on old ARM CPU(cores less than 4), incorrect on newest ARM CPU, such as 8-cores A7 CPU, and big.LITTLE(4 at A7, 4 at A15).
> 
> Do you know this situation before? I found more games with this issue, compatible with qual-core ARM cpu, but pixel flaw with 8-core.

Which CPU model are you using?  Does it support using all 8 cores at once, or does it switch between the A15 and A7 clusters?

If it uses all 8 cores at once, is the cache coherency correctly enabled (The CCI)?  My understanding is that on many of the first designs this wasn't the case.  If the cache coherency isn't working, that could almost certainly cause issues with pixman.

I have a system on my desk with 8 cores but the kernel doesn't support using the A7 cores yet (I should check if that has been fixed yet or not).

--
Len Sorensen


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