[Pixman] [PATCH] Adding infrastructure to permit future AVX2 implementations

[Chris Wilson]

Quoting raghuveer devulapalli (2018-08-22 18:02:02)
>  #ifdef HAVE_GETISAX
> @@ -119,7 +120,7 @@ pixman_cpuid (uint32_t feature,
>      __asm__ volatile (
>          "cpuid"                                "\n\t"
>         : "=a" (*a), "=b" (*b), "=c" (*c), "=d" (*d)
> -       : "a" (feature));
> +       : "a" (feature), "c" (0));
>  #else
>      /* On x86-32 we need to be careful about the handling of %ebx
>       * and %esp. We can't declare either one as clobbered
> @@ -172,6 +173,10 @@ detect_cpu_features (void)
>         features |= X86_SSE2;
>      if (c & (1 << 9))
>         features |= X86_SSSE3;
> +    
> +    pixman_cpuid (0x07, &a, &b, &c, &d);
> +    if (b & (1 << 5))
> +       features |= X86_AVX2;

It's not enough to check for the cpu feature, you need to also check for
os support. Something like:

#define xgetbv(index,eax,edx)                                   \
        __asm__ ("xgetbv" : "=a"(eax), "=d"(edx) : "c" (index))

#define has_YMM 0x1

unsigned cpu_detect(void)
{
        unsigned max = __get_cpuid_max(BASIC_CPUID, NULL);
        unsigned eax, ebx, ecx, edx;
        unsigned features = 0;
        unsigned extra = 0;

        if (max >= 1) {
                __cpuid(1, eax, ebx, ecx, edx);

		/* snip all the usual sse features */

                if (ecx & bit_OSXSAVE) {
                        unsigned int bv_eax, bv_ecx;
                        xgetbv(0, bv_eax, bv_ecx);
                        if ((bv_eax & 6) == 6)
                                extra |= has_YMM;
                }

                if ((extra & has_YMM) && (ecx & bit_AVX))
                        features |= AVX;
        }

        if (max >= 7) {
                __cpuid_count(7, 0, eax, ebx, ecx, edx);

                if ((extra & has_YMM) && (ebx & bit_AVX2))
                        features |= AVX2;
        }

        return features;
}