[pulseaudio-discuss] [PATCH 1/3] WIP sconv: Fix sconv_s16le_from_f32ne_neon

Peter Meerwald pmeerw at pmeerw.net
Fri Oct 26 04:04:45 PDT 2012


From: Peter Meerwald <p.meerwald at bct-electronic.com>

implement lrintf semantic (round toward nearest, even tie breaking)

lrintf() rounds according to the current rounding mode which by default is
round-toward-nearest integer, toward-even for tie breaking)

for example, this means
12.3 -> 12
12.5 -> 12 (!)
12.7 -> 13
13.3 -> 13
13.5 -> 14 (!)
13.7 -> 14

previous code did different tie breaking (toward-zero), hence results were
different for .5 values

Signed-off-by: Peter Meerwald <p.meerwald at bct-electronic.com>
---
 src/pulsecore/sconv_neon.c |   29 +++++++++++++----------------
 1 file changed, 13 insertions(+), 16 deletions(-)

diff --git a/src/pulsecore/sconv_neon.c b/src/pulsecore/sconv_neon.c
index 81dd97e..cbca232 100644
--- a/src/pulsecore/sconv_neon.c
+++ b/src/pulsecore/sconv_neon.c
@@ -36,22 +36,19 @@ static void pa_sconv_s16le_from_f32ne_neon(unsigned n, const float *src, int16_t
         "movs       %[n], %[n], lsr #2      \n\t"
         "beq        2f                      \n\t"
 
-        "vdup.f32   q2, %[plusone]          \n\t"
-        "vneg.f32   q3, q2                  \n\t"
-        "vdup.f32   q4, %[scale]            \n\t"
-        "vdup.u32   q5, %[mask]             \n\t"
-        "vdup.f32   q6, %[half]             \n\t"
+        "vdup.f32   q2, %[two23]            \n\t"
+        "vdup.f32   q3, %[scale]            \n\t"
+        "vdup.u32   q4, %[mask]             \n\t"
 
         "1:                                 \n\t"
-        "vld1.32    {q0}, [%[src]]!         \n\t"
-        "vmin.f32   q0, q0, q2              \n\t" /* clamp */
-        "vmax.f32   q0, q0, q3              \n\t"
-        "vmul.f32   q0, q0, q4              \n\t" /* scale */
-        "vand.u32   q1, q0, q5              \n\t"
-        "vorr.u32   q1, q1, q6              \n\t" /* round */
-        "vadd.f32   q0, q0, q1              \n\t"
-        "vcvt.s32.f32 q0, q0                \n\t" /* narrow */
-        "vmovn.i32  d0, q0                  \n\t"
+        "vld1.32    {q0}, [%[src]]!         \n\t" /* load x */
+        "vmul.f32   q0, q0, q3              \n\t" /* scale */
+        "vand.u32   q1, q0, q4              \n\t" /* get sign bit */
+        "vorr.u32   q1, q1, q2              \n\t" /* put sign on 2^23 */
+        "vadd.f32   q0, q1, q0              \n\t" /* sgn(x)*2^23 + x ... */
+        "vsub.f32   q0, q0, q1              \n\t" /* ... - sgn(x)*2^23 */
+        "vcvt.s32.f32 q0, q0                \n\t" /* convert to int */
+        "vqmovn.s32  d0, q0                 \n\t" /* saturate and narrow */
         "subs       %[n], %[n], #1          \n\t"
         "vst1.16    {d0}, [%[dst]]!         \n\t"
         "bgt        1b                      \n\t"
@@ -59,8 +56,8 @@ static void pa_sconv_s16le_from_f32ne_neon(unsigned n, const float *src, int16_t
         "2:                                 \n\t"
 
         : [dst] "+r" (dst), [src] "+r" (src), [n] "+r" (n) /* output operands (or input operands that get modified) */
-        : [plusone] "r" (1.0f), [scale] "r" (32767.0f), [half] "r" (0.5f), [mask] "r" (0x80000000) /* input operands */
-        : "memory", "cc", "q0", "q1", "q2", "q3", "q4", "q5", "q6" /* clobber list */
+        : [scale] "r" (32767.0f), [two23] "r" (8.3886080000e+06f), [mask] "r" (0x80000000) /* input operands */
+        : "memory", "cc", "q0", "q1", "q2", "q3", "q4" /* clobber list */
     );
 
     /* leftovers */
-- 
1.7.9.5



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