[Spice-commits] 80 commits - block.c block/bochs.c block/cow.c block/curl.c block/dmg.c block/mirror.c block/qapi.c block/qcow.c block/qcow2-cluster.c block/qcow2-refcount.c block/qcow2.c block/raw-posix.c block/raw-win32.c block/sheepdog.c block/vdi.c configure docs/specs hw/arm hw/audio hw/display hw/intc include/block include/exec include/sysemu qemu-img.c target-arm/helper.c target-arm/op_helper.c target-arm/translate-a64.c target-ppc/kvm.c target-s390x/kvm.c tcg/README tcg/aarch64 tcg/i386 tcg/ia64 tcg/optimize.c tcg/ppc64 tcg/s390 tcg/sparc tcg/tcg-op.h tcg/tcg-opc.h tcg/tcg.c tcg/tcg.h tcg/tci tests/Makefile tests/display-vga-test.c tests/qemu-iotests ui/gtk.c ui/sdl2.c
Gerd Hoffmann
kraxel at kemper.freedesktop.org
Mon May 5 04:11:09 PDT 2014
block.c | 108 +++--
block/bochs.c | 23 -
block/cow.c | 2
block/curl.c | 153 ++++---
block/dmg.c | 8
block/mirror.c | 11
block/qapi.c | 3
block/qcow.c | 3
block/qcow2-cluster.c | 33 +
block/qcow2-refcount.c | 12
block/qcow2.c | 12
block/raw-posix.c | 5
block/raw-win32.c | 3
block/sheepdog.c | 6
block/vdi.c | 28 -
configure | 3
docs/specs/standard-vga.txt | 13
hw/arm/virt.c | 93 +++-
hw/audio/hda-codec.c | 3
hw/display/cirrus_vga.c | 4
hw/display/qxl.c | 2
hw/display/vga-isa-mm.c | 2
hw/display/vga-isa.c | 2
hw/display/vga-pci.c | 63 +++
hw/display/vga.c | 8
hw/display/vga_int.h | 2
hw/display/vmware_vga.c | 2
hw/intc/armv7m_nvic.c | 2
hw/intc/openpic_kvm.c | 8
hw/intc/xics_kvm.c | 8
include/block/block.h | 1
include/block/block_int.h | 1
include/exec/def-helper.h | 2
include/sysemu/kvm.h | 30 +
qemu-img.c | 26 +
target-arm/helper.c | 41 +-
target-arm/op_helper.c | 2
target-arm/translate-a64.c | 9
target-ppc/kvm.c | 21 -
target-s390x/kvm.c | 4
tcg/README | 5
tcg/aarch64/tcg-target.h | 1
tcg/i386/tcg-target.h | 1
tcg/ia64/tcg-target.h | 1
tcg/optimize.c | 16
tcg/ppc64/tcg-target.h | 1
tcg/s390/tcg-target.h | 1
tcg/sparc/tcg-target.c | 842 +++++++++++++++++--------------------------
tcg/sparc/tcg-target.h | 17
tcg/tcg-op.h | 54 +-
tcg/tcg-opc.h | 4
tcg/tcg.c | 80 +++-
tcg/tcg.h | 1
tcg/tci/tcg-target.h | 1
tests/Makefile | 5
tests/display-vga-test.c | 52 ++
tests/qemu-iotests/019 | 2
tests/qemu-iotests/086 | 8
tests/qemu-iotests/090 | 61 +++
tests/qemu-iotests/090.out | 12
tests/qemu-iotests/common.rc | 4
tests/qemu-iotests/group | 1
ui/gtk.c | 88 +---
ui/sdl2.c | 51 +-
64 files changed, 1195 insertions(+), 876 deletions(-)
New commits:
commit fdaad4715ae9e998fd0595bedfb16fdaf0c68ccc
Merge: e50bf23 f42c5c8
Author: Peter Maydell <peter.maydell at linaro.org>
Date: Fri May 2 11:32:00 2014 +0100
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140501' into staging
target-arm queue:
* implement XScale cache lockdown cp15 ops
* fix v7M CPUID base register
* implement WFE and YIELD as yields for A64
* fix A64 "BLR LR"
* support Cortex-A57 in virt machine model
* a few other minor AArch64 bugfixes
# gpg: Signature made Thu 01 May 2014 15:42:17 BST using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell at linaro.org>"
* remotes/pmaydell/tags/pull-target-arm-20140501:
hw/arm/virt: Add support for Cortex-A57
hw/arm/virt: Put GIC register banks on 64K boundaries
hw/arm/virt: Create the GIC ourselves rather than (ab)using a15mpcore_priv
target-arm: Correct a comment refering to EL0
target-arm: A64: Fix a typo when declaring TLBI ops
target-arm: A64: Handle blr lr
target-arm: Make vbar_write 64bit friendly on 32bit hosts
target-arm: implement WFE/YIELD as a yield for AArch64
armv7m_nvic: fix CPUID Base Register
target-arm: Implement XScale cache lockdown operations as NOPs
Signed-off-by: Peter Maydell <peter.maydell at linaro.org>
commit e50bf23438f8f35dcf32f9e720b04e0e969a3215
Merge: c090c10 b7079df
Author: Peter Maydell <peter.maydell at linaro.org>
Date: Fri May 2 10:50:58 2014 +0100
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
Block patches
# gpg: Signature made Wed 30 Apr 2014 19:19:32 BST using RSA key ID C88F2FD6
# gpg: Good signature from "Kevin Wolf <kwolf at redhat.com>"
* remotes/kevin/tags/for-upstream: (31 commits)
curl: Fix hang reading from slow connections
curl: Ensure all informationals are checked for completion
curl: Eliminate unnecessary use of curl_multi_socket_all
curl: Remove unnecessary explicit calls to internal event handler
curl: Remove erroneous sleep waiting for curl completion
curl: Fix return from curl_read_cb with invalid state
curl: Remove unnecessary use of goto
curl: Fix long line
block/vdi: Error out immediately in vdi_create()
block/bochs: Fix error handling for seek_to_sector()
qcow2: Check min_size in qcow2_grow_l1_table()
qcow2: Catch bdrv_getlength() error
block: Use correct width in format strings
qcow2: Avoid overflow in alloc_clusters_noref()
block: Use error_abort in bdrv_image_info_specific_dump()
block: Fix open_flags in bdrv_reopen()
Revert "block: another bdrv_append fix"
block: Unlink temporary files in raw-posix/win32
block: Remove BDRV_O_COPY_ON_READ for bs->file
block: Create bdrv_backing_flags()
...
Signed-off-by: Peter Maydell <peter.maydell at linaro.org>
commit c090c10dc4b85a9aa82277994576715ec2af1ed4
Merge: 87f6ede 48add81
Author: Peter Maydell <peter.maydell at linaro.org>
Date: Thu May 1 17:32:25 2014 +0100
Merge remote-tracking branch 'remotes/cohuck/tags/kvm_cap_helpers' into staging
Add helpers for enabling kvm capabilities and convert the existing
s390x and ppc users to use them.
# gpg: Signature made Wed 30 Apr 2014 14:48:45 BST using RSA key ID C6F02FAF
# gpg: Can't check signature: public key not found
* remotes/cohuck/tags/kvm_cap_helpers:
ppc: use kvm_vcpu_enable_cap()
s390x: use kvm_vcpu_enable_cap()
kvm: add kvm_{vm,vcpu}_enable_cap
Signed-off-by: Peter Maydell <peter.maydell at linaro.org>
commit 87f6ede9bbccc03f337220478fb03fa70fbc3659
Merge: 051b998 a889bc2
Author: Peter Maydell <peter.maydell at linaro.org>
Date: Thu May 1 16:02:45 2014 +0100
Merge remote-tracking branch 'remotes/kraxel/tags/pull-vga-2' into staging
vga: add secondary stdvga variant
# gpg: Signature made Mon 28 Apr 2014 10:11:44 BST using RSA key ID D3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel at redhat.com>"
# gpg: aka "Gerd Hoffmann <gerd at kraxel.org>"
# gpg: aka "Gerd Hoffmann (private) <kraxel at gmail.com>"
* remotes/kraxel/tags/pull-vga-2:
add secondary-vga to display-vga test
add display-vga test
vga: add secondary stdvga variant
vga: allow non-global vmstate
Signed-off-by: Peter Maydell <peter.maydell at linaro.org>
commit f42c5c8ec8aa0e15583487ffee62964830751623
Author: Peter Maydell <peter.maydell at linaro.org>
Date: Thu Apr 24 18:54:43 2014 +0100
hw/arm/virt: Add support for Cortex-A57
Support the Cortex-A57 in the virt machine model.
Signed-off-by: Peter Maydell <peter.maydell at linaro.org>
Message-id: 1398362083-17737-4-git-send-email-peter.maydell at linaro.org
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 9c4d337..ea4f02d 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -119,6 +119,11 @@ static VirtBoardInfo machines[] = {
.irqmap = a15irqmap,
},
{
+ .cpu_model = "cortex-a57",
+ .memmap = a15memmap,
+ .irqmap = a15irqmap,
+ },
+ {
.cpu_model = "host",
.memmap = a15memmap,
.irqmap = a15irqmap,
commit 3078e848faed0d6bf03d1ae789975abab9cb7778
Author: Peter Maydell <peter.maydell at linaro.org>
Date: Thu Apr 24 18:54:42 2014 +0100
hw/arm/virt: Put GIC register banks on 64K boundaries
For an AArch64 CPU which supports 64K pages, having the GIC
register banks at 4K offsets is potentially awkward. Move
them out to being at 64K offsets. (This is harmless for
AArch32 CPUs and for AArch64 CPUs with 4K pages, so it is simpler
to use the same offsets everywhere than to try to use 64K offsets
only for AArch64 host CPUs.)
Signed-off-by: Peter Maydell <peter.maydell at linaro.org>
Message-id: 1398362083-17737-3-git-send-email-peter.maydell at linaro.org
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index ecff256..9c4d337 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -96,10 +96,10 @@ typedef struct VirtBoardInfo {
static const MemMapEntry a15memmap[] = {
/* Space up to 0x8000000 is reserved for a boot ROM */
[VIRT_FLASH] = { 0, 0x8000000 },
- [VIRT_CPUPERIPHS] = { 0x8000000, 0x8000 },
+ [VIRT_CPUPERIPHS] = { 0x8000000, 0x20000 },
/* GIC distributor and CPU interfaces sit inside the CPU peripheral space */
- [VIRT_GIC_DIST] = { 0x8001000, 0x1000 },
- [VIRT_GIC_CPU] = { 0x8002000, 0x1000 },
+ [VIRT_GIC_DIST] = { 0x8000000, 0x10000 },
+ [VIRT_GIC_CPU] = { 0x8010000, 0x10000 },
[VIRT_UART] = { 0x9000000, 0x1000 },
[VIRT_MMIO] = { 0xa000000, 0x200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
commit 642047438446246d98d96f7528a5dc9763473112
Author: Peter Maydell <peter.maydell at linaro.org>
Date: Thu May 1 15:24:46 2014 +0100
hw/arm/virt: Create the GIC ourselves rather than (ab)using a15mpcore_priv
Rather than having the virt machine model create an a15mpcore_priv
device regardless of the actual CPU type in order to instantiate the GIC,
move to having the machine model create the GIC directly. This
corresponds to a system which uses a standalone GIC (eg the GIC-400)
rather than the one built in to the CPU core.
The primary motivation for this is to support the Cortex-A57,
which for a KVM configuration will use a GICv2, which is not
built into the CPU.
Signed-off-by: Peter Maydell <peter.maydell at linaro.org>
Message-id: 1398362083-17737-2-git-send-email-peter.maydell at linaro.org
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 2bbc931..ecff256 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -75,8 +75,6 @@ typedef struct MemMapEntry {
typedef struct VirtBoardInfo {
struct arm_boot_info bootinfo;
const char *cpu_model;
- const char *qdevname;
- const char *gic_compatible;
const MemMapEntry *memmap;
const int *irqmap;
int smp_cpus;
@@ -117,16 +115,11 @@ static const int a15irqmap[] = {
static VirtBoardInfo machines[] = {
{
.cpu_model = "cortex-a15",
- .qdevname = "a15mpcore_priv",
- .gic_compatible = "arm,cortex-a15-gic",
.memmap = a15memmap,
.irqmap = a15irqmap,
},
{
.cpu_model = "host",
- /* We use the A15 private peripheral model to get a V2 GIC */
- .qdevname = "a15mpcore_priv",
- .gic_compatible = "arm,cortex-a15-gic",
.memmap = a15memmap,
.irqmap = a15irqmap,
},
@@ -251,8 +244,9 @@ static void fdt_add_gic_node(const VirtBoardInfo *vbi)
qemu_fdt_setprop_cell(vbi->fdt, "/", "interrupt-parent", gic_phandle);
qemu_fdt_add_subnode(vbi->fdt, "/intc");
+ /* 'cortex-a15-gic' means 'GIC v2' */
qemu_fdt_setprop_string(vbi->fdt, "/intc", "compatible",
- vbi->gic_compatible);
+ "arm,cortex-a15-gic");
qemu_fdt_setprop_cell(vbi->fdt, "/intc", "#interrupt-cells", 3);
qemu_fdt_setprop(vbi->fdt, "/intc", "interrupt-controller", NULL, 0);
qemu_fdt_setprop_sized_cells(vbi->fdt, "/intc", "reg",
@@ -263,6 +257,56 @@ static void fdt_add_gic_node(const VirtBoardInfo *vbi)
qemu_fdt_setprop_cell(vbi->fdt, "/intc", "phandle", gic_phandle);
}
+static void create_gic(const VirtBoardInfo *vbi, qemu_irq *pic)
+{
+ /* We create a standalone GIC v2 */
+ DeviceState *gicdev;
+ SysBusDevice *gicbusdev;
+ const char *gictype = "arm_gic";
+ int i;
+
+ if (kvm_irqchip_in_kernel()) {
+ gictype = "kvm-arm-gic";
+ }
+
+ gicdev = qdev_create(NULL, gictype);
+ qdev_prop_set_uint32(gicdev, "revision", 2);
+ qdev_prop_set_uint32(gicdev, "num-cpu", smp_cpus);
+ /* Note that the num-irq property counts both internal and external
+ * interrupts; there are always 32 of the former (mandated by GIC spec).
+ */
+ qdev_prop_set_uint32(gicdev, "num-irq", NUM_IRQS + 32);
+ qdev_init_nofail(gicdev);
+ gicbusdev = SYS_BUS_DEVICE(gicdev);
+ sysbus_mmio_map(gicbusdev, 0, vbi->memmap[VIRT_GIC_DIST].base);
+ sysbus_mmio_map(gicbusdev, 1, vbi->memmap[VIRT_GIC_CPU].base);
+
+ /* Wire the outputs from each CPU's generic timer to the
+ * appropriate GIC PPI inputs, and the GIC's IRQ output to
+ * the CPU's IRQ input.
+ */
+ for (i = 0; i < smp_cpus; i++) {
+ DeviceState *cpudev = DEVICE(qemu_get_cpu(i));
+ int ppibase = NUM_IRQS + i * 32;
+ /* physical timer; we wire it up to the non-secure timer's ID,
+ * since a real A15 always has TrustZone but QEMU doesn't.
+ */
+ qdev_connect_gpio_out(cpudev, 0,
+ qdev_get_gpio_in(gicdev, ppibase + 30));
+ /* virtual timer */
+ qdev_connect_gpio_out(cpudev, 1,
+ qdev_get_gpio_in(gicdev, ppibase + 27));
+
+ sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ));
+ }
+
+ for (i = 0; i < NUM_IRQS; i++) {
+ pic[i] = qdev_get_gpio_in(gicdev, i);
+ }
+
+ fdt_add_gic_node(vbi);
+}
+
static void create_uart(const VirtBoardInfo *vbi, qemu_irq *pic)
{
char *nodename;
@@ -340,8 +384,6 @@ static void machvirt_init(QEMUMachineInitArgs *args)
MemoryRegion *sysmem = get_system_memory();
int n;
MemoryRegion *ram = g_new(MemoryRegion, 1);
- DeviceState *dev;
- SysBusDevice *busdev;
const char *cpu_model = args->cpu_model;
VirtBoardInfo *vbi;
@@ -404,25 +446,7 @@ static void machvirt_init(QEMUMachineInitArgs *args)
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, vbi->memmap[VIRT_MEM].base, ram);
- dev = qdev_create(NULL, vbi->qdevname);
- qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
- /* Note that the num-irq property counts both internal and external
- * interrupts; there are always 32 of the former (mandated by GIC spec).
- */
- qdev_prop_set_uint32(dev, "num-irq", NUM_IRQS + 32);
- qdev_init_nofail(dev);
- busdev = SYS_BUS_DEVICE(dev);
- sysbus_mmio_map(busdev, 0, vbi->memmap[VIRT_CPUPERIPHS].base);
- fdt_add_gic_node(vbi);
- for (n = 0; n < smp_cpus; n++) {
- DeviceState *cpudev = DEVICE(qemu_get_cpu(n));
-
- sysbus_connect_irq(busdev, n, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ));
- }
-
- for (n = 0; n < NUM_IRQS; n++) {
- pic[n] = qdev_get_gpio_in(dev, n);
- }
+ create_gic(vbi, pic);
create_uart(vbi, pic);
commit 37f0806ed9ebaa3b7a7840048818b8916639f2db
Author: Edgar E. Iglesias <edgar.iglesias at xilinx.com>
Date: Thu May 1 15:24:46 2014 +0100
target-arm: Correct a comment refering to EL0
Signed-off-by: Edgar E. Iglesias <edgar.iglesias at xilinx.com>
Message-id: 1398926097-28097-5-git-send-email-edgar.iglesias at gmail.com
Signed-off-by: Peter Maydell <peter.maydell at linaro.org>
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index 57e7d9c..fb90676 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -418,7 +418,7 @@ void HELPER(exception_return)(CPUARMState *env)
goto illegal_return;
}
if (new_el == 0 && (spsr & PSTATE_SP)) {
- /* Return to EL1 with M[0] bit set */
+ /* Return to EL0 with M[0] bit set */
goto illegal_return;
}
env->aarch64 = 1;
commit 6ab9f49934664f33ad4b449333fc8036c01c4eeb
Author: Edgar E. Iglesias <edgar.iglesias at xilinx.com>
Date: Thu May 1 15:24:46 2014 +0100
target-arm: A64: Fix a typo when declaring TLBI ops
Harmless typo as opc1 defaults to zero and opc2 gets
re-declared to its correct value.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias at xilinx.com>
Reviewed-by: Alex Bennée <alex.bennee at linaro.org>
Message-id: 1398926097-28097-4-git-send-email-edgar.iglesias at gmail.com
Signed-off-by: Peter Maydell <peter.maydell at linaro.org>
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 7823e8c..3be917c 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -1908,51 +1908,51 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
.access = PL1_W, .type = ARM_CP_NOP },
/* TLBI operations */
{ .name = "TLBI_VMALLE1IS", .state = ARM_CP_STATE_AA64,
- .opc0 = 1, .opc2 = 0, .crn = 8, .crm = 3, .opc2 = 0,
+ .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 0,
.access = PL1_W, .type = ARM_CP_NO_MIGRATE,
.writefn = tlbiall_write },
{ .name = "TLBI_VAE1IS", .state = ARM_CP_STATE_AA64,
- .opc0 = 1, .opc2 = 0, .crn = 8, .crm = 3, .opc2 = 1,
+ .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 1,
.access = PL1_W, .type = ARM_CP_NO_MIGRATE,
.writefn = tlbi_aa64_va_write },
{ .name = "TLBI_ASIDE1IS", .state = ARM_CP_STATE_AA64,
- .opc0 = 1, .opc2 = 0, .crn = 8, .crm = 3, .opc2 = 2,
+ .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 2,
.access = PL1_W, .type = ARM_CP_NO_MIGRATE,
.writefn = tlbi_aa64_asid_write },
{ .name = "TLBI_VAAE1IS", .state = ARM_CP_STATE_AA64,
- .opc0 = 1, .opc2 = 0, .crn = 8, .crm = 3, .opc2 = 3,
+ .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 3,
.access = PL1_W, .type = ARM_CP_NO_MIGRATE,
.writefn = tlbi_aa64_vaa_write },
{ .name = "TLBI_VALE1IS", .state = ARM_CP_STATE_AA64,
- .opc0 = 1, .opc2 = 0, .crn = 8, .crm = 3, .opc2 = 5,
+ .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 5,
.access = PL1_W, .type = ARM_CP_NO_MIGRATE,
.writefn = tlbi_aa64_va_write },
{ .name = "TLBI_VAALE1IS", .state = ARM_CP_STATE_AA64,
- .opc0 = 1, .opc2 = 0, .crn = 8, .crm = 3, .opc2 = 7,
+ .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 7,
.access = PL1_W, .type = ARM_CP_NO_MIGRATE,
.writefn = tlbi_aa64_vaa_write },
{ .name = "TLBI_VMALLE1", .state = ARM_CP_STATE_AA64,
- .opc0 = 1, .opc2 = 0, .crn = 8, .crm = 7, .opc2 = 0,
+ .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 7, .opc2 = 0,
.access = PL1_W, .type = ARM_CP_NO_MIGRATE,
.writefn = tlbiall_write },
{ .name = "TLBI_VAE1", .state = ARM_CP_STATE_AA64,
- .opc0 = 1, .opc2 = 0, .crn = 8, .crm = 7, .opc2 = 1,
+ .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 7, .opc2 = 1,
.access = PL1_W, .type = ARM_CP_NO_MIGRATE,
.writefn = tlbi_aa64_va_write },
{ .name = "TLBI_ASIDE1", .state = ARM_CP_STATE_AA64,
- .opc0 = 1, .opc2 = 0, .crn = 8, .crm = 7, .opc2 = 2,
+ .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 7, .opc2 = 2,
.access = PL1_W, .type = ARM_CP_NO_MIGRATE,
.writefn = tlbi_aa64_asid_write },
{ .name = "TLBI_VAAE1", .state = ARM_CP_STATE_AA64,
- .opc0 = 1, .opc2 = 0, .crn = 8, .crm = 7, .opc2 = 3,
+ .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 7, .opc2 = 3,
.access = PL1_W, .type = ARM_CP_NO_MIGRATE,
.writefn = tlbi_aa64_vaa_write },
{ .name = "TLBI_VALE1", .state = ARM_CP_STATE_AA64,
- .opc0 = 1, .opc2 = 0, .crn = 8, .crm = 7, .opc2 = 5,
+ .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 7, .opc2 = 5,
.access = PL1_W, .type = ARM_CP_NO_MIGRATE,
.writefn = tlbi_aa64_va_write },
{ .name = "TLBI_VAALE1", .state = ARM_CP_STATE_AA64,
- .opc0 = 1, .opc2 = 0, .crn = 8, .crm = 7, .opc2 = 7,
+ .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 7, .opc2 = 7,
.access = PL1_W, .type = ARM_CP_NO_MIGRATE,
.writefn = tlbi_aa64_vaa_write },
#ifndef CONFIG_USER_ONLY
commit 1b505f93bcf605e7c4144fef83bd039b0d4f2576
Author: Edgar E. Iglesias <edgar.iglesias at xilinx.com>
Date: Thu May 1 15:24:45 2014 +0100
target-arm: A64: Handle blr lr
For linked branches, updates to the link register happen
conceptually after the read of the branch target register.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias at xilinx.com>
Reviewed-by: Alex Bennée <alex.bennee at linaro.org>
Cc: qemu-stable at nongnu.org
Message-id: 1398926097-28097-3-git-send-email-edgar.iglesias at gmail.com
Signed-off-by: Peter Maydell <peter.maydell at linaro.org>
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index e31e069..b62db4d 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -1509,8 +1509,10 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn)
switch (opc) {
case 0: /* BR */
case 2: /* RET */
+ tcg_gen_mov_i64(cpu_pc, cpu_reg(s, rn));
break;
case 1: /* BLR */
+ tcg_gen_mov_i64(cpu_pc, cpu_reg(s, rn));
tcg_gen_movi_i64(cpu_reg(s, 30), s->pc);
break;
case 4: /* ERET */
@@ -1529,7 +1531,6 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn)
return;
}
- tcg_gen_mov_i64(cpu_pc, cpu_reg(s, rn));
s->is_jmp = DISAS_JUMP;
}
commit fed3ffb9f157f33bc9b2b1c3ef68e710ee6b7b4b
Author: Edgar E. Iglesias <edgar.iglesias at xilinx.com>
Date: Thu May 1 15:24:45 2014 +0100
target-arm: Make vbar_write 64bit friendly on 32bit hosts
Signed-off-by: Edgar E. Iglesias <edgar.iglesias at xilinx.com>
Reviewed-by: Alex Bennée <alex.bennee at linaro.org>
Message-id: 1398926097-28097-2-git-send-email-edgar.iglesias at gmail.com
Signed-off-by: Peter Maydell <peter.maydell at linaro.org>
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 7c083c3..7823e8c 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -657,7 +657,7 @@ static void vbar_write(CPUARMState *env, const ARMCPRegInfo *ri,
* contexts. (ARMv8 would permit us to do no masking at all, but ARMv7
* requires the bottom five bits to be RAZ/WI because they're UNK/SBZP.)
*/
- env->cp15.c12_vbar = value & ~0x1Ful;
+ env->cp15.c12_vbar = value & ~0x1FULL;
}
static uint64_t ccsidr_read(CPUARMState *env, const ARMCPRegInfo *ri)
commit 252ec4057685cd9bf6a13f96528c843754af8fad
Author: Rob Herring <rob.herring at linaro.org>
Date: Thu May 1 15:24:45 2014 +0100
target-arm: implement WFE/YIELD as a yield for AArch64
Like was done for AArch32 for WFE, implement both WFE and YIELD as a
yield operation. This speeds up multi-core system emulation.
Signed-off-by: Rob Herring <rob.herring at linaro.org>
Message-id: 1397588401-20366-1-git-send-email-robherring2 at gmail.com
Signed-off-by: Peter Maydell <peter.maydell at linaro.org>
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index d86b8ff..e31e069 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -1151,6 +1151,8 @@ static void handle_hint(DisasContext *s, uint32_t insn,
return;
case 1: /* YIELD */
case 2: /* WFE */
+ s->is_jmp = DISAS_WFE;
+ return;
case 4: /* SEV */
case 5: /* SEVL */
/* we treat all as NOP at least for now */
@@ -10765,6 +10767,10 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
case DISAS_EXC:
case DISAS_SWI:
break;
+ case DISAS_WFE:
+ gen_a64_set_pc_im(dc->pc);
+ gen_helper_wfe(cpu_env);
+ break;
case DISAS_WFI:
/* This is a special case because we don't want to just halt the CPU
* if trying to debug across a WFI.
commit e3da9921ebc554fad3224a9fdda9a7425ffd9ef7
Author: Rabin Vincent <rabin at rab.in>
Date: Thu May 1 15:24:44 2014 +0100
armv7m_nvic: fix CPUID Base Register
cp15.c0_cpuid is never initialized for ARMv7-M; take the value directly
from cpu->midr instead.
Signed-off-by: Rabin Vincent <rabin at rab.in>
Message-id: 1398036308-32166-1-git-send-email-rabin at rab.in
Signed-off-by: Peter Maydell <peter.maydell at linaro.org>
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 6066fa6..f5b0c3b 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -173,7 +173,7 @@ static uint32_t nvic_readl(nvic_state *s, uint32_t offset)
return 10000;
case 0xd00: /* CPUID Base. */
cpu = ARM_CPU(current_cpu);
- return cpu->env.cp15.c0_cpuid;
+ return cpu->midr;
case 0xd04: /* Interrupt Control State. */
/* VECTACTIVE */
val = s->gic.running_irq[0];
commit 3b7715796401ad1b00f752217fe8f425915e801b
Author: Peter Maydell <peter.maydell at linaro.org>
Date: Thu May 1 15:24:44 2014 +0100
target-arm: Implement XScale cache lockdown operations as NOPs
XScale defines some implementation-specific coprocessor registers
for doing cache lockdown operations. Since QEMU doesn't model a
cache no proper implementation is possible, but NOP out the
registers so that guest code like u-boot that tries to use them
doesn't crash.
Reported-by: <prqek at centrum.cz>
Signed-off-by: Peter Maydell <peter.maydell at linaro.org>
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 43c1b4f..7c083c3 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -1578,6 +1578,21 @@ static const ARMCPRegInfo xscale_cp_reginfo[] = {
.cp = 15, .crn = 1, .crm = 0, .opc1 = 0, .opc2 = 1, .access = PL1_RW,
.fieldoffset = offsetof(CPUARMState, cp15.c1_xscaleauxcr),
.resetvalue = 0, },
+ /* XScale specific cache-lockdown: since we have no cache we NOP these
+ * and hope the guest does not really rely on cache behaviour.
+ */
+ { .name = "XSCALE_LOCK_ICACHE_LINE",
+ .cp = 15, .opc1 = 0, .crn = 9, .crm = 1, .opc2 = 0,
+ .access = PL1_W, .type = ARM_CP_NOP },
+ { .name = "XSCALE_UNLOCK_ICACHE",
+ .cp = 15, .opc1 = 0, .crn = 9, .crm = 1, .opc2 = 1,
+ .access = PL1_W, .type = ARM_CP_NOP },
+ { .name = "XSCALE_DCACHE_LOCK",
+ .cp = 15, .opc1 = 0, .crn = 9, .crm = 2, .opc2 = 0,
+ .access = PL1_RW, .type = ARM_CP_NOP },
+ { .name = "XSCALE_UNLOCK_DCACHE",
+ .cp = 15, .opc1 = 0, .crn = 9, .crm = 2, .opc2 = 1,
+ .access = PL1_W, .type = ARM_CP_NOP },
REGINFO_SENTINEL
};
commit 051b9980b99dbfba22ea5f79bd3708d513ae121d
Merge: 52b0867 341a034
Author: Peter Maydell <peter.maydell at linaro.org>
Date: Thu May 1 14:17:33 2014 +0100
Merge remote-tracking branch 'remotes/kraxel/tags/pull-gtk-6' into staging
gtk: collection of fixes and cleanups by Cole Robinson
# gpg: Signature made Tue 29 Apr 2014 10:44:44 BST using RSA key ID D3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel at redhat.com>"
# gpg: aka "Gerd Hoffmann <gerd at kraxel.org>"
# gpg: aka "Gerd Hoffmann (private) <kraxel at gmail.com>"
* remotes/kraxel/tags/pull-gtk-6:
gtk: Fix accelerators being triggered twice with gtk3
gtk: Fix -serial vc
gtk: Use ctrl+alt+q for quit accelerator
gtk: Remove use of deprecated stock items
gtk: Don't use deprecated vte_terminal_get_adjustment
gtk: Don't use deprecated gtk_image_menu_item_new_with_mnemonic
configure: Re-run make if gtkabi/sdlabi is changed
configure: Document --with-gtkabi
Signed-off-by: Peter Maydell <peter.maydell at linaro.org>
commit 52b08670e2c9031f74b58d3e9864a8d8f152ee31
Merge: 61e5b75 3f2fde2
Author: Peter Maydell <peter.maydell at linaro.org>
Date: Thu May 1 13:51:23 2014 +0100
Merge remote-tracking branch 'remotes/kraxel/tags/pull-sdl-2' into staging
sdl2: mouse wheel support, ui config notify
# gpg: Signature made Tue 29 Apr 2014 11:17:01 BST using RSA key ID D3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel at redhat.com>"
# gpg: aka "Gerd Hoffmann <gerd at kraxel.org>"
# gpg: aka "Gerd Hoffmann (private) <kraxel at gmail.com>"
* remotes/kraxel/tags/pull-sdl-2:
sdl2: Support mouse wheel
sdl2: add ui info setting.
Signed-off-by: Peter Maydell <peter.maydell at linaro.org>
commit 61e5b75c178524136622ea8809603b2fae6cc1ca
Merge: b006f81 4843877
Author: Peter Maydell <peter.maydell at linaro.org>
Date: Thu May 1 13:05:54 2014 +0100
Merge remote-tracking branch 'remotes/kraxel/tags/pull-audio-4' into staging
hda-audio: fix non-mixer codecs
# gpg: Signature made Tue 29 Apr 2014 10:03:44 BST using RSA key ID D3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel at redhat.com>"
# gpg: aka "Gerd Hoffmann <gerd at kraxel.org>"
# gpg: aka "Gerd Hoffmann (private) <kraxel at gmail.com>"
* remotes/kraxel/tags/pull-audio-4:
hda-audio: fix non-mixer codecs
Signed-off-by: Peter Maydell <peter.maydell at linaro.org>
commit b7079df4100069959f4e9d90d5cb5ba7d4ebbf1a
Author: Matthew Booth <mbooth at redhat.com>
Date: Tue Apr 29 16:03:32 2014 +0100
curl: Fix hang reading from slow connections
When receiving a new aio read request, we first look for an existing
transaction whose range will cover the read request by the time it
completes. However, we weren't checking that the existing transaction
was still active. If it had timed out, we were adding the request to a
transaction which would never complete and had already been cancelled,
resulting in a hang.
Signed-off-by: Matthew Booth <mbooth at redhat.com>
Tested-by: Richard W.M. Jones <rjones at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/curl.c b/block/curl.c
index 16e7db8..d2f1084 100644
--- a/block/curl.c
+++ b/block/curl.c
@@ -220,7 +220,8 @@ static int curl_find_buf(BDRVCURLState *s, size_t start, size_t len,
}
// Wait for unfinished chunks
- if ((start >= state->buf_start) &&
+ if (state->in_use &&
+ (start >= state->buf_start) &&
(start <= buf_fend) &&
(end >= state->buf_start) &&
(end <= buf_fend))
commit 1f2cead324436da25c3607f4b957f0198a01fc01
Author: Matthew Booth <mbooth at redhat.com>
Date: Tue Apr 29 16:03:31 2014 +0100
curl: Ensure all informationals are checked for completion
According to the documentation, the correct way to ensure all
informationals have been returned by curl_multi_info_read is to loop
until it returns NULL.
Signed-off-by: Matthew Booth <mbooth at redhat.com>
Tested-by: Richard W.M. Jones <rjones at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/curl.c b/block/curl.c
index f3a4445..16e7db8 100644
--- a/block/curl.c
+++ b/block/curl.c
@@ -248,46 +248,39 @@ static void curl_multi_check_completion(BDRVCURLState *s)
/* Try to find done transfers, so we can free the easy
* handle again. */
- do {
+ for (;;) {
CURLMsg *msg;
msg = curl_multi_info_read(s->multi, &msgs_in_queue);
+ /* Quit when there are no more completions */
if (!msg)
break;
- if (msg->msg == CURLMSG_NONE)
- break;
- switch (msg->msg) {
- case CURLMSG_DONE:
- {
- CURLState *state = NULL;
- curl_easy_getinfo(msg->easy_handle, CURLINFO_PRIVATE,
- (char **)&state);
-
- /* ACBs for successful messages get completed in curl_read_cb */
- if (msg->data.result != CURLE_OK) {
- int i;
- for (i = 0; i < CURL_NUM_ACB; i++) {
- CURLAIOCB *acb = state->acb[i];
-
- if (acb == NULL) {
- continue;
- }
-
- acb->common.cb(acb->common.opaque, -EIO);
- qemu_aio_release(acb);
- state->acb[i] = NULL;
+ if (msg->msg == CURLMSG_DONE) {
+ CURLState *state = NULL;
+ curl_easy_getinfo(msg->easy_handle, CURLINFO_PRIVATE,
+ (char **)&state);
+
+ /* ACBs for successful messages get completed in curl_read_cb */
+ if (msg->data.result != CURLE_OK) {
+ int i;
+ for (i = 0; i < CURL_NUM_ACB; i++) {
+ CURLAIOCB *acb = state->acb[i];
+
+ if (acb == NULL) {
+ continue;
}
- }
- curl_clean_state(state);
- break;
+ acb->common.cb(acb->common.opaque, -EIO);
+ qemu_aio_release(acb);
+ state->acb[i] = NULL;
+ }
}
- default:
- msgs_in_queue = 0;
- break;
+
+ curl_clean_state(state);
+ break;
}
- } while(msgs_in_queue);
+ }
}
static void curl_multi_do(void *arg)
commit 838ef602498b8d1985a231a06f5e328e2946a81d
Author: Matthew Booth <mbooth at redhat.com>
Date: Tue Apr 29 16:03:30 2014 +0100
curl: Eliminate unnecessary use of curl_multi_socket_all
curl_multi_socket_all is a deprecated catch-all which checks for
activities on all open curl sockets. We have enough information from
the event loop to check only the sockets with activity. This change
removes use of curl_multi_socket_all in favour of
curl_multi_socket_action called with the relevant handle.
At the same time, it also ensures that the driver only checks for
completion of read operations after reading from a socket, rather than
both reading and writing.
Signed-off-by: Matthew Booth <mbooth at redhat.com>
Tested-by: Richard W.M. Jones <rjones at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/curl.c b/block/curl.c
index fd2756e..f3a4445 100644
--- a/block/curl.c
+++ b/block/curl.c
@@ -71,6 +71,7 @@ typedef struct CURLState
struct BDRVCURLState *s;
CURLAIOCB *acb[CURL_NUM_ACB];
CURL *curl;
+ curl_socket_t sock_fd;
char *orig_buf;
size_t buf_start;
size_t buf_off;
@@ -92,6 +93,7 @@ typedef struct BDRVCURLState {
static void curl_clean_state(CURLState *s);
static void curl_multi_do(void *arg);
+static void curl_multi_read(void *arg);
#ifdef NEED_CURL_TIMER_CALLBACK
static int curl_timer_cb(CURLM *multi, long timeout_ms, void *opaque)
@@ -113,16 +115,20 @@ static int curl_timer_cb(CURLM *multi, long timeout_ms, void *opaque)
static int curl_sock_cb(CURL *curl, curl_socket_t fd, int action,
void *s, void *sp)
{
+ CURLState *state = NULL;
+ curl_easy_getinfo(curl, CURLINFO_PRIVATE, (char **)&state);
+ state->sock_fd = fd;
+
DPRINTF("CURL (AIO): Sock action %d on fd %d\n", action, fd);
switch (action) {
case CURL_POLL_IN:
- qemu_aio_set_fd_handler(fd, curl_multi_do, NULL, s);
+ qemu_aio_set_fd_handler(fd, curl_multi_read, NULL, state);
break;
case CURL_POLL_OUT:
- qemu_aio_set_fd_handler(fd, NULL, curl_multi_do, s);
+ qemu_aio_set_fd_handler(fd, NULL, curl_multi_do, state);
break;
case CURL_POLL_INOUT:
- qemu_aio_set_fd_handler(fd, curl_multi_do, curl_multi_do, s);
+ qemu_aio_set_fd_handler(fd, curl_multi_read, curl_multi_do, state);
break;
case CURL_POLL_REMOVE:
qemu_aio_set_fd_handler(fd, NULL, NULL, NULL);
@@ -236,7 +242,7 @@ static int curl_find_buf(BDRVCURLState *s, size_t start, size_t len,
return FIND_RET_NONE;
}
-static void curl_multi_read(BDRVCURLState *s)
+static void curl_multi_check_completion(BDRVCURLState *s)
{
int msgs_in_queue;
@@ -286,19 +292,26 @@ static void curl_multi_read(BDRVCURLState *s)
static void curl_multi_do(void *arg)
{
- BDRVCURLState *s = (BDRVCURLState *)arg;
+ CURLState *s = (CURLState *)arg;
int running;
int r;
- if (!s->multi) {
+ if (!s->s->multi) {
return;
}
do {
- r = curl_multi_socket_all(s->multi, &running);
+ r = curl_multi_socket_action(s->s->multi, s->sock_fd, 0, &running);
} while(r == CURLM_CALL_MULTI_PERFORM);
- curl_multi_read(s);
+}
+
+static void curl_multi_read(void *arg)
+{
+ CURLState *s = (CURLState *)arg;
+
+ curl_multi_do(arg);
+ curl_multi_check_completion(s->s);
}
static void curl_multi_timeout_do(void *arg)
@@ -313,7 +326,7 @@ static void curl_multi_timeout_do(void *arg)
curl_multi_socket_action(s->multi, CURL_SOCKET_TIMEOUT, 0, &running);
- curl_multi_read(s);
+ curl_multi_check_completion(s);
#else
abort();
#endif
@@ -529,7 +542,6 @@ static int curl_open(BlockDriverState *bs, QDict *options, int flags,
// initialize the multi interface!
s->multi = curl_multi_init();
- curl_multi_setopt(s->multi, CURLMOPT_SOCKETDATA, s);
curl_multi_setopt(s->multi, CURLMOPT_SOCKETFUNCTION, curl_sock_cb);
#ifdef NEED_CURL_TIMER_CALLBACK
curl_multi_setopt(s->multi, CURLMOPT_TIMERDATA, s);
commit b69cdef876340624bb40a2054d14f298471a40a6
Author: Matthew Booth <mbooth at redhat.com>
Date: Tue Apr 29 16:03:29 2014 +0100
curl: Remove unnecessary explicit calls to internal event handler
Remove calls to curl_multi_do where the relevant handles are already
registered to the event loop.
Ensure that we kick off socket handling with CURL_SOCKET_TIMEOUT after
adding a new handle.
Signed-off-by: Matthew Booth <mbooth at redhat.com>
Tested-by: Richard W.M. Jones <rjones at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/curl.c b/block/curl.c
index 50bd05f..fd2756e 100644
--- a/block/curl.c
+++ b/block/curl.c
@@ -535,7 +535,6 @@ static int curl_open(BlockDriverState *bs, QDict *options, int flags,
curl_multi_setopt(s->multi, CURLMOPT_TIMERDATA, s);
curl_multi_setopt(s->multi, CURLMOPT_TIMERFUNCTION, curl_timer_cb);
#endif
- curl_multi_do(s);
qemu_opts_del(opts);
return 0;
@@ -564,6 +563,7 @@ static const AIOCBInfo curl_aiocb_info = {
static void curl_readv_bh_cb(void *p)
{
CURLState *state;
+ int running;
CURLAIOCB *acb = p;
BDRVCURLState *s = acb->common.bs->opaque;
@@ -612,8 +612,9 @@ static void curl_readv_bh_cb(void *p)
curl_easy_setopt(state->curl, CURLOPT_RANGE, state->range);
curl_multi_add_handle(s->multi, state->curl);
- curl_multi_do(s);
+ /* Tell curl it needs to kick things off */
+ curl_multi_socket_action(s->multi, CURL_SOCKET_TIMEOUT, 0, &running);
}
static BlockDriverAIOCB *curl_aio_readv(BlockDriverState *bs,
commit e466183718bfaaf347a3c02499473068a0072114
Author: Matthew Booth <mbooth at redhat.com>
Date: Tue Apr 29 16:03:28 2014 +0100
curl: Remove erroneous sleep waiting for curl completion
The driver will not start more than a fixed number of curl sessions.
If it needs more, it must wait for the completion of an existing one.
The driver was sleeping, which will prevent the main loop from
running, and therefore the event it's waiting on. It was also directly
calling its internal handler rather than waiting on existing
registered handlers to be called from the main loop.
This change causes it simply to wait for a period of time whilst
allowing the main loop to execute.
Signed-off-by: Matthew Booth <mbooth at redhat.com>
Tested-by: Richard W.M. Jones <rjones at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/curl.c b/block/curl.c
index 26c9cac..50bd05f 100644
--- a/block/curl.c
+++ b/block/curl.c
@@ -337,8 +337,7 @@ static CURLState *curl_init_state(BDRVCURLState *s)
break;
}
if (!state) {
- g_usleep(100);
- curl_multi_do(s);
+ qemu_aio_wait();
}
} while(!state);
commit 38bbc0a580f9f10570b1d1b5d3e92f0e6feb2970
Author: Matthew Booth <mbooth at redhat.com>
Date: Tue Apr 29 16:03:27 2014 +0100
curl: Fix return from curl_read_cb with invalid state
A curl write callback is supposed to return the number of bytes it
handled. curl_read_cb would have erroneously reported it had handled
all bytes in the event that the internal curl state was invalid.
Signed-off-by: Matthew Booth <mbooth at redhat.com>
Tested-by: Richard W.M. Jones <rjones at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/curl.c b/block/curl.c
index e97f449..26c9cac 100644
--- a/block/curl.c
+++ b/block/curl.c
@@ -155,7 +155,7 @@ static size_t curl_read_cb(void *ptr, size_t size, size_t nmemb, void *opaque)
DPRINTF("CURL: Just reading %zd bytes\n", realsize);
if (!s || !s->orig_buf)
- goto read_end;
+ return 0;
if (s->buf_off >= s->buf_len) {
/* buffer full, read nothing */
@@ -180,7 +180,6 @@ static size_t curl_read_cb(void *ptr, size_t size, size_t nmemb, void *opaque)
}
}
-read_end:
return realsize;
}
commit 9e550b326076caf4a1756b77eee95ad60b4adc27
Author: Matthew Booth <mbooth at redhat.com>
Date: Tue Apr 29 16:03:26 2014 +0100
curl: Remove unnecessary use of goto
This isn't any of the usually acceptable uses of goto.
Signed-off-by: Matthew Booth <mbooth at redhat.com>
Tested-by: Richard W.M. Jones <rjones at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/curl.c b/block/curl.c
index 0404dbd..e97f449 100644
--- a/block/curl.c
+++ b/block/curl.c
@@ -343,39 +343,38 @@ static CURLState *curl_init_state(BDRVCURLState *s)
}
} while(!state);
- if (state->curl)
- goto has_curl;
-
- state->curl = curl_easy_init();
- if (!state->curl)
- return NULL;
- curl_easy_setopt(state->curl, CURLOPT_URL, s->url);
- curl_easy_setopt(state->curl, CURLOPT_TIMEOUT, 5);
- curl_easy_setopt(state->curl, CURLOPT_WRITEFUNCTION, (void *)curl_read_cb);
- curl_easy_setopt(state->curl, CURLOPT_WRITEDATA, (void *)state);
- curl_easy_setopt(state->curl, CURLOPT_PRIVATE, (void *)state);
- curl_easy_setopt(state->curl, CURLOPT_AUTOREFERER, 1);
- curl_easy_setopt(state->curl, CURLOPT_FOLLOWLOCATION, 1);
- curl_easy_setopt(state->curl, CURLOPT_NOSIGNAL, 1);
- curl_easy_setopt(state->curl, CURLOPT_ERRORBUFFER, state->errmsg);
- curl_easy_setopt(state->curl, CURLOPT_FAILONERROR, 1);
-
- /* Restrict supported protocols to avoid security issues in the more
- * obscure protocols. For example, do not allow POP3/SMTP/IMAP see
- * CVE-2013-0249.
- *
- * Restricting protocols is only supported from 7.19.4 upwards.
- */
+ if (!state->curl) {
+ state->curl = curl_easy_init();
+ if (!state->curl) {
+ return NULL;
+ }
+ curl_easy_setopt(state->curl, CURLOPT_URL, s->url);
+ curl_easy_setopt(state->curl, CURLOPT_TIMEOUT, 5);
+ curl_easy_setopt(state->curl, CURLOPT_WRITEFUNCTION,
+ (void *)curl_read_cb);
+ curl_easy_setopt(state->curl, CURLOPT_WRITEDATA, (void *)state);
+ curl_easy_setopt(state->curl, CURLOPT_PRIVATE, (void *)state);
+ curl_easy_setopt(state->curl, CURLOPT_AUTOREFERER, 1);
+ curl_easy_setopt(state->curl, CURLOPT_FOLLOWLOCATION, 1);
+ curl_easy_setopt(state->curl, CURLOPT_NOSIGNAL, 1);
+ curl_easy_setopt(state->curl, CURLOPT_ERRORBUFFER, state->errmsg);
+ curl_easy_setopt(state->curl, CURLOPT_FAILONERROR, 1);
+
+ /* Restrict supported protocols to avoid security issues in the more
+ * obscure protocols. For example, do not allow POP3/SMTP/IMAP see
+ * CVE-2013-0249.
+ *
+ * Restricting protocols is only supported from 7.19.4 upwards.
+ */
#if LIBCURL_VERSION_NUM >= 0x071304
- curl_easy_setopt(state->curl, CURLOPT_PROTOCOLS, PROTOCOLS);
- curl_easy_setopt(state->curl, CURLOPT_REDIR_PROTOCOLS, PROTOCOLS);
+ curl_easy_setopt(state->curl, CURLOPT_PROTOCOLS, PROTOCOLS);
+ curl_easy_setopt(state->curl, CURLOPT_REDIR_PROTOCOLS, PROTOCOLS);
#endif
#ifdef DEBUG_VERBOSE
- curl_easy_setopt(state->curl, CURLOPT_VERBOSE, 1);
+ curl_easy_setopt(state->curl, CURLOPT_VERBOSE, 1);
#endif
-
-has_curl:
+ }
state->s = s;
commit f6246509be602369cfa1250965e1e62a0c62c99f
Author: Matthew Booth <mbooth at redhat.com>
Date: Tue Apr 29 16:03:25 2014 +0100
curl: Fix long line
Signed-off-by: Matthew Booth <mbooth at redhat.com>
Tested-by: Richard W.M. Jones <rjones at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/curl.c b/block/curl.c
index 6731d28..0404dbd 100644
--- a/block/curl.c
+++ b/block/curl.c
@@ -256,7 +256,8 @@ static void curl_multi_read(BDRVCURLState *s)
case CURLMSG_DONE:
{
CURLState *state = NULL;
- curl_easy_getinfo(msg->easy_handle, CURLINFO_PRIVATE, (char**)&state);
+ curl_easy_getinfo(msg->easy_handle, CURLINFO_PRIVATE,
+ (char **)&state);
/* ACBs for successful messages get completed in curl_read_cb */
if (msg->data.result != CURLE_OK) {
commit 0549ea8b6d3ed4eba9a3bd0abfaed3af5de69873
Author: Max Reitz <mreitz at redhat.com>
Date: Tue Apr 29 19:03:16 2014 +0200
block/vdi: Error out immediately in vdi_create()
Currently, if an error occurs during the part of vdi_create() which
actually writes the image, the function stores -errno, but continues
anyway.
Instead of trying to write data which (if it can be written at all) does
not make any sense without the operations before succeeding (e.g.,
writing the image header), just error out immediately.
Signed-off-by: Max Reitz <mreitz at redhat.com>
Reviewed-by: Stefan Weil <sw at weilnetz.de>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/vdi.c b/block/vdi.c
index 81faa25..27737af 100644
--- a/block/vdi.c
+++ b/block/vdi.c
@@ -756,6 +756,7 @@ static int vdi_create(const char *filename, QEMUOptionParameter *options,
vdi_header_to_le(&header);
if (write(fd, &header, sizeof(header)) < 0) {
result = -errno;
+ goto close_and_exit;
}
if (bmap_size > 0) {
@@ -769,6 +770,8 @@ static int vdi_create(const char *filename, QEMUOptionParameter *options,
}
if (write(fd, bmap, bmap_size) < 0) {
result = -errno;
+ g_free(bmap);
+ goto close_and_exit;
}
g_free(bmap);
}
@@ -776,10 +779,12 @@ static int vdi_create(const char *filename, QEMUOptionParameter *options,
if (image_type == VDI_TYPE_STATIC) {
if (ftruncate(fd, sizeof(header) + bmap_size + blocks * block_size)) {
result = -errno;
+ goto close_and_exit;
}
}
- if (close(fd) < 0) {
+close_and_exit:
+ if ((close(fd) < 0) && !result) {
result = -errno;
}
commit e1b42f456fad6e797eaf795ed2e400c4e47d5eb4
Author: Max Reitz <mreitz at redhat.com>
Date: Tue Apr 29 19:03:15 2014 +0200
block/bochs: Fix error handling for seek_to_sector()
Currently, seek_to_sector() returns -1 both for errors and unallocated
sectors, resulting in silent errors. As 0 is an invalid offset of data
clusters (bitmap_offset is greater than 0 because s->data_offset is
greater than 0), just return 0 for unallocated sectors and -errno in
case of error. This should then be propagated by bochs_read(), the sole
user of seek_to_sector().
That function also has a case of "return -1 in case of error", which is
fixed by this patch as well.
bochs_read() is called by bochs_co_read() which passes the return value
through, therefore it is indeed correct for bochs_read() to return
-errno.
Signed-off-by: Max Reitz <mreitz at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/bochs.c b/block/bochs.c
index eacf956..eba23df 100644
--- a/block/bochs.c
+++ b/block/bochs.c
@@ -187,13 +187,14 @@ static int64_t seek_to_sector(BlockDriverState *bs, int64_t sector_num)
uint64_t offset = sector_num * 512;
uint64_t extent_index, extent_offset, bitmap_offset;
char bitmap_entry;
+ int ret;
// seek to sector
extent_index = offset / s->extent_size;
extent_offset = (offset % s->extent_size) / 512;
if (s->catalog_bitmap[extent_index] == 0xffffffff) {
- return -1; /* not allocated */
+ return 0; /* not allocated */
}
bitmap_offset = s->data_offset +
@@ -201,13 +202,14 @@ static int64_t seek_to_sector(BlockDriverState *bs, int64_t sector_num)
(s->extent_blocks + s->bitmap_blocks));
/* read in bitmap for current extent */
- if (bdrv_pread(bs->file, bitmap_offset + (extent_offset / 8),
- &bitmap_entry, 1) != 1) {
- return -1;
+ ret = bdrv_pread(bs->file, bitmap_offset + (extent_offset / 8),
+ &bitmap_entry, 1);
+ if (ret < 0) {
+ return ret;
}
if (!((bitmap_entry >> (extent_offset % 8)) & 1)) {
- return -1; /* not allocated */
+ return 0; /* not allocated */
}
return bitmap_offset + (512 * (s->bitmap_blocks + extent_offset));
@@ -220,13 +222,16 @@ static int bochs_read(BlockDriverState *bs, int64_t sector_num,
while (nb_sectors > 0) {
int64_t block_offset = seek_to_sector(bs, sector_num);
- if (block_offset >= 0) {
+ if (block_offset < 0) {
+ return block_offset;
+ } else if (block_offset > 0) {
ret = bdrv_pread(bs->file, block_offset, buf, 512);
- if (ret != 512) {
- return -1;
+ if (ret < 0) {
+ return ret;
}
- } else
+ } else {
memset(buf, 0, 512);
+ }
nb_sectors--;
sector_num++;
buf += 512;
commit b93f995081cc32e56071fef179161d2907d0491e
Author: Max Reitz <mreitz at redhat.com>
Date: Tue Apr 29 19:03:14 2014 +0200
qcow2: Check min_size in qcow2_grow_l1_table()
First, new_l1_size is an int64_t, whereas min_size is a uint64_t.
Therefore, during the loop which adjusts new_l1_size until it equals or
exceeds min_size, new_l1_size might overflow and become negative. The
comparison in the loop condition however will take it as an unsigned
value (because min_size is unsigned) and therefore recognize it as
exceeding min_size. Therefore, the loop is left with a negative
new_l1_size, which is not correct. This could be fixed by making
new_l1_size uint64_t.
On the other hand, however, by doing this, the while loop may take
forever. If min_size is e.g. UINT64_MAX, it will take new_l1_size
probably multiple overflows to reach the exact same value (if it reaches
it at all). Then, right after the loop, new_l1_size will be recognized
as being too big anyway.
Both problems require a ridiculously high min_size value, which is very
unlikely to occur; but both problems are also simply avoided by checking
whether min_size is sane before calculating new_l1_size (which should
still be checked separately, though).
Signed-off-by: Max Reitz <mreitz at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/qcow2-cluster.c b/block/qcow2-cluster.c
index b746429..76d2bcf 100644
--- a/block/qcow2-cluster.c
+++ b/block/qcow2-cluster.c
@@ -42,6 +42,13 @@ int qcow2_grow_l1_table(BlockDriverState *bs, uint64_t min_size,
if (min_size <= s->l1_size)
return 0;
+ /* Do a sanity check on min_size before trying to calculate new_l1_size
+ * (this prevents overflows during the while loop for the calculation of
+ * new_l1_size) */
+ if (min_size > INT_MAX / sizeof(uint64_t)) {
+ return -EFBIG;
+ }
+
if (exact_size) {
new_l1_size = min_size;
} else {
commit a49139af77850d64d74f9ffe43cabe7aa4f19de0
Author: Max Reitz <mreitz at redhat.com>
Date: Tue Apr 29 19:03:13 2014 +0200
qcow2: Catch bdrv_getlength() error
The call to bdrv_getlength() from qcow2_check_refcounts() may result in
an error. Check this and abort if necessary.
Signed-off-by: Max Reitz <mreitz at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/qcow2-refcount.c b/block/qcow2-refcount.c
index d2cb6a8..e79895d 100644
--- a/block/qcow2-refcount.c
+++ b/block/qcow2-refcount.c
@@ -1487,6 +1487,11 @@ int qcow2_check_refcounts(BlockDriverState *bs, BdrvCheckResult *res,
int ret;
size = bdrv_getlength(bs->file);
+ if (size < 0) {
+ res->check_errors++;
+ return size;
+ }
+
nb_clusters = size_to_clusters(s, size);
if (nb_clusters > INT_MAX) {
res->check_errors++;
commit 521b2b5df0ccad764cf95164c6e428f855067a6f
Author: Max Reitz <mreitz at redhat.com>
Date: Tue Apr 29 19:03:12 2014 +0200
block: Use correct width in format strings
Instead of blindly relying on a normal integer having a width of 32 bits
(which is a pretty good assumption, but we should not rely on it if
there is no need), use the correct format string macros.
This does not touch DEBUG output.
Signed-off-by: Max Reitz <mreitz at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/cow.c b/block/cow.c
index 30deb88..164759f 100644
--- a/block/cow.c
+++ b/block/cow.c
@@ -82,7 +82,7 @@ static int cow_open(BlockDriverState *bs, QDict *options, int flags,
if (be32_to_cpu(cow_header.version) != COW_VERSION) {
char version[64];
snprintf(version, sizeof(version),
- "COW version %d", cow_header.version);
+ "COW version %" PRIu32, cow_header.version);
error_set(errp, QERR_UNKNOWN_BLOCK_FORMAT_FEATURE,
bs->device_name, "cow", version);
ret = -ENOTSUP;
diff --git a/block/dmg.c b/block/dmg.c
index 856402e..1e153cd 100644
--- a/block/dmg.c
+++ b/block/dmg.c
@@ -248,8 +248,8 @@ static int dmg_open(BlockDriverState *bs, QDict *options, int flags,
offset += 8;
if (s->sectorcounts[i] > DMG_SECTORCOUNTS_MAX) {
- error_report("sector count %" PRIu64 " for chunk %u is "
- "larger than max (%u)",
+ error_report("sector count %" PRIu64 " for chunk %" PRIu32
+ " is larger than max (%u)",
s->sectorcounts[i], i, DMG_SECTORCOUNTS_MAX);
ret = -EINVAL;
goto fail;
@@ -269,8 +269,8 @@ static int dmg_open(BlockDriverState *bs, QDict *options, int flags,
offset += 8;
if (s->lengths[i] > DMG_LENGTHS_MAX) {
- error_report("length %" PRIu64 " for chunk %u is larger "
- "than max (%u)",
+ error_report("length %" PRIu64 " for chunk %" PRIu32
+ " is larger than max (%u)",
s->lengths[i], i, DMG_LENGTHS_MAX);
ret = -EINVAL;
goto fail;
diff --git a/block/qcow.c b/block/qcow.c
index d5a7d5f..937dd6d 100644
--- a/block/qcow.c
+++ b/block/qcow.c
@@ -119,7 +119,8 @@ static int qcow_open(BlockDriverState *bs, QDict *options, int flags,
}
if (header.version != QCOW_VERSION) {
char version[64];
- snprintf(version, sizeof(version), "QCOW version %d", header.version);
+ snprintf(version, sizeof(version), "QCOW version %" PRIu32,
+ header.version);
error_set(errp, QERR_UNKNOWN_BLOCK_FORMAT_FEATURE,
bs->device_name, "qcow", version);
ret = -ENOTSUP;
diff --git a/block/qcow2.c b/block/qcow2.c
index e903d97..a4b97e8 100644
--- a/block/qcow2.c
+++ b/block/qcow2.c
@@ -124,8 +124,9 @@ static int qcow2_read_extensions(BlockDriverState *bs, uint64_t start_offset,
case QCOW2_EXT_MAGIC_BACKING_FORMAT:
if (ext.len >= sizeof(bs->backing_format)) {
- error_setg(errp, "ERROR: ext_backing_format: len=%u too large"
- " (>=%zu)", ext.len, sizeof(bs->backing_format));
+ error_setg(errp, "ERROR: ext_backing_format: len=%" PRIu32
+ " too large (>=%zu)", ext.len,
+ sizeof(bs->backing_format));
return 2;
}
ret = bdrv_pread(bs->file, offset, bs->backing_format, ext.len);
@@ -483,7 +484,7 @@ static int qcow2_open(BlockDriverState *bs, QDict *options, int flags,
goto fail;
}
if (header.version < 2 || header.version > 3) {
- report_unsupported(bs, errp, "QCOW version %d", header.version);
+ report_unsupported(bs, errp, "QCOW version %" PRIu32, header.version);
ret = -ENOTSUP;
goto fail;
}
@@ -493,7 +494,8 @@ static int qcow2_open(BlockDriverState *bs, QDict *options, int flags,
/* Initialise cluster size */
if (header.cluster_bits < MIN_CLUSTER_BITS ||
header.cluster_bits > MAX_CLUSTER_BITS) {
- error_setg(errp, "Unsupported cluster size: 2^%i", header.cluster_bits);
+ error_setg(errp, "Unsupported cluster size: 2^%" PRIu32,
+ header.cluster_bits);
ret = -EINVAL;
goto fail;
}
@@ -591,7 +593,7 @@ static int qcow2_open(BlockDriverState *bs, QDict *options, int flags,
s->refcount_order = header.refcount_order;
if (header.crypt_method > QCOW_CRYPT_AES) {
- error_setg(errp, "Unsupported encryption method: %i",
+ error_setg(errp, "Unsupported encryption method: %" PRIu32,
header.crypt_method);
ret = -EINVAL;
goto fail;
diff --git a/block/sheepdog.c b/block/sheepdog.c
index 0eb33ee..2c3fb01 100644
--- a/block/sheepdog.c
+++ b/block/sheepdog.c
@@ -1099,7 +1099,7 @@ static int find_vdi_name(BDRVSheepdogState *s, const char *filename,
}
if (rsp->result != SD_RES_SUCCESS) {
- error_report("cannot get vdi info, %s, %s %d %s",
+ error_report("cannot get vdi info, %s, %s %" PRIu32 " %s",
sd_strerror(rsp->result), filename, snapid, tag);
if (rsp->result == SD_RES_NO_VDI) {
ret = -ENOENT;
@@ -2316,8 +2316,8 @@ static int sd_snapshot_list(BlockDriverState *bs, QEMUSnapshotInfo **psn_tab)
sn_tab[found].vm_state_size = inode.vm_state_size;
sn_tab[found].vm_clock_nsec = inode.vm_clock_nsec;
- snprintf(sn_tab[found].id_str, sizeof(sn_tab[found].id_str), "%u",
- inode.snap_id);
+ snprintf(sn_tab[found].id_str, sizeof(sn_tab[found].id_str),
+ "%" PRIu32, inode.snap_id);
pstrcpy(sn_tab[found].name,
MIN(sizeof(sn_tab[found].name), sizeof(inode.tag)),
inode.tag);
diff --git a/block/vdi.c b/block/vdi.c
index 820cd37..81faa25 100644
--- a/block/vdi.c
+++ b/block/vdi.c
@@ -408,34 +408,35 @@ static int vdi_open(BlockDriverState *bs, QDict *options, int flags,
}
if (header.signature != VDI_SIGNATURE) {
- error_setg(errp, "Image not in VDI format (bad signature %08x)", header.signature);
+ error_setg(errp, "Image not in VDI format (bad signature %08" PRIx32
+ ")", header.signature);
ret = -EINVAL;
goto fail;
} else if (header.version != VDI_VERSION_1_1) {
- error_setg(errp, "unsupported VDI image (version %u.%u)",
- header.version >> 16, header.version & 0xffff);
+ error_setg(errp, "unsupported VDI image (version %" PRIu32 ".%" PRIu32
+ ")", header.version >> 16, header.version & 0xffff);
ret = -ENOTSUP;
goto fail;
} else if (header.offset_bmap % SECTOR_SIZE != 0) {
/* We only support block maps which start on a sector boundary. */
error_setg(errp, "unsupported VDI image (unaligned block map offset "
- "0x%x)", header.offset_bmap);
+ "0x%" PRIx32 ")", header.offset_bmap);
ret = -ENOTSUP;
goto fail;
} else if (header.offset_data % SECTOR_SIZE != 0) {
/* We only support data blocks which start on a sector boundary. */
- error_setg(errp, "unsupported VDI image (unaligned data offset 0x%x)",
- header.offset_data);
+ error_setg(errp, "unsupported VDI image (unaligned data offset 0x%"
+ PRIx32 ")", header.offset_data);
ret = -ENOTSUP;
goto fail;
} else if (header.sector_size != SECTOR_SIZE) {
- error_setg(errp, "unsupported VDI image (sector size %u is not %u)",
- header.sector_size, SECTOR_SIZE);
+ error_setg(errp, "unsupported VDI image (sector size %" PRIu32
+ " is not %u)", header.sector_size, SECTOR_SIZE);
ret = -ENOTSUP;
goto fail;
} else if (header.block_size != DEFAULT_CLUSTER_SIZE) {
- error_setg(errp, "unsupported VDI image (block size %u is not %u)",
- header.block_size, DEFAULT_CLUSTER_SIZE);
+ error_setg(errp, "unsupported VDI image (block size %" PRIu32
+ " is not %u)", header.block_size, DEFAULT_CLUSTER_SIZE);
ret = -ENOTSUP;
goto fail;
} else if (header.disk_size >
commit 91f827dcff61c3e007def4c949d3a8310954b85e
Author: Max Reitz <mreitz at redhat.com>
Date: Tue Apr 29 19:03:11 2014 +0200
qcow2: Avoid overflow in alloc_clusters_noref()
alloc_clusters_noref() stores the cluster index in a uint64_t. However,
offsets are often represented as int64_t (as for example the return
value of alloc_clusters_noref() itself demonstrates). Therefore, we
should make sure all offsets in the allocated range of clusters are
representable using int64_t without overflows.
Signed-off-by: Max Reitz <mreitz at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/qcow2-refcount.c b/block/qcow2-refcount.c
index a37ee45..d2cb6a8 100644
--- a/block/qcow2-refcount.c
+++ b/block/qcow2-refcount.c
@@ -653,6 +653,13 @@ retry:
goto retry;
}
}
+
+ /* Make sure that all offsets in the "allocated" range are representable
+ * in an int64_t */
+ if (s->free_cluster_index - 1 > (INT64_MAX >> s->cluster_bits)) {
+ return -EFBIG;
+ }
+
#ifdef DEBUG_ALLOC2
fprintf(stderr, "alloc_clusters: size=%" PRId64 " -> %" PRId64 "\n",
size,
commit 48add816cf7697509debaee0a36f5bb54e4a121b
Author: Cornelia Huck <cornelia.huck at de.ibm.com>
Date: Wed Apr 9 17:21:57 2014 +0200
ppc: use kvm_vcpu_enable_cap()
Convert existing users of KVM_ENABLE_CAP to new helper.
Reviewed-by: Thomas Huth <thuth at linux.vnet.ibm.com>
Reviewed-by: Alexander Graf <agraf at suse.de>
Signed-off-by: Cornelia Huck <cornelia.huck at de.ibm.com>
diff --git a/hw/intc/openpic_kvm.c b/hw/intc/openpic_kvm.c
index 6635407..585ab4f 100644
--- a/hw/intc/openpic_kvm.c
+++ b/hw/intc/openpic_kvm.c
@@ -234,13 +234,9 @@ static void kvm_openpic_realize(DeviceState *dev, Error **errp)
int kvm_openpic_connect_vcpu(DeviceState *d, CPUState *cs)
{
KVMOpenPICState *opp = KVM_OPENPIC(d);
- struct kvm_enable_cap encap = {};
- encap.cap = KVM_CAP_IRQ_MPIC;
- encap.args[0] = opp->fd;
- encap.args[1] = kvm_arch_vcpu_id(cs);
-
- return kvm_vcpu_ioctl(cs, KVM_ENABLE_CAP, &encap);
+ return kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_MPIC, 0, opp->fd,
+ kvm_arch_vcpu_id(cs));
}
static Property kvm_openpic_properties[] = {
diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c
index c93dae0..09476ae 100644
--- a/hw/intc/xics_kvm.c
+++ b/hw/intc/xics_kvm.c
@@ -331,15 +331,11 @@ static void xics_kvm_cpu_setup(XICSState *icp, PowerPCCPU *cpu)
if (icpkvm->kernel_xics_fd != -1) {
int ret;
- struct kvm_enable_cap xics_enable_cap = {
- .cap = KVM_CAP_IRQ_XICS,
- .flags = 0,
- .args = {icpkvm->kernel_xics_fd, kvm_arch_vcpu_id(cs), 0, 0},
- };
ss->cs = cs;
- ret = kvm_vcpu_ioctl(ss->cs, KVM_ENABLE_CAP, &xics_enable_cap);
+ ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0,
+ icpkvm->kernel_xics_fd, kvm_arch_vcpu_id(cs));
if (ret < 0) {
error_report("Unable to connect CPU%ld to kernel XICS: %s",
kvm_arch_vcpu_id(cs), strerror(errno));
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index 9974b10..4b81e5f 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -151,7 +151,6 @@ static int kvm_booke206_tlb_init(PowerPCCPU *cpu)
CPUState *cs = CPU(cpu);
struct kvm_book3e_206_tlb_params params = {};
struct kvm_config_tlb cfg = {};
- struct kvm_enable_cap encap = {};
unsigned int entries = 0;
int ret, i;
@@ -178,10 +177,7 @@ static int kvm_booke206_tlb_init(PowerPCCPU *cpu)
cfg.params = (uintptr_t)¶ms;
cfg.mmu_type = KVM_MMU_FSL_BOOKE_NOHV;
- encap.cap = KVM_CAP_SW_TLB;
- encap.args[0] = (uintptr_t)&cfg;
-
- ret = kvm_vcpu_ioctl(cs, KVM_ENABLE_CAP, &encap);
+ ret = kvm_vcpu_enable_cap(cs, KVM_CAP_SW_TLB, 0, (uintptr_t)&cfg);
if (ret < 0) {
fprintf(stderr, "%s: couldn't enable KVM_CAP_SW_TLB: %s\n",
__func__, strerror(-ret));
@@ -1292,7 +1288,6 @@ int kvmppc_set_tcr(PowerPCCPU *cpu)
int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu)
{
CPUState *cs = CPU(cpu);
- struct kvm_enable_cap encap = {};
int ret;
if (!kvm_enabled()) {
@@ -1304,8 +1299,7 @@ int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu)
return -1;
}
- encap.cap = KVM_CAP_PPC_BOOKE_WATCHDOG;
- ret = kvm_vcpu_ioctl(cs, KVM_ENABLE_CAP, &encap);
+ ret = kvm_vcpu_enable_cap(cs, KVM_CAP_PPC_BOOKE_WATCHDOG, 0);
if (ret < 0) {
fprintf(stderr, "%s: couldn't enable KVM_CAP_PPC_BOOKE_WATCHDOG: %s\n",
__func__, strerror(-ret));
@@ -1505,12 +1499,9 @@ int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len)
void kvmppc_set_papr(PowerPCCPU *cpu)
{
CPUState *cs = CPU(cpu);
- struct kvm_enable_cap cap = {};
int ret;
- cap.cap = KVM_CAP_PPC_PAPR;
- ret = kvm_vcpu_ioctl(cs, KVM_ENABLE_CAP, &cap);
-
+ ret = kvm_vcpu_enable_cap(cs, KVM_CAP_PPC_PAPR, 0);
if (ret) {
cpu_abort(cs, "This KVM version does not support PAPR\n");
}
@@ -1523,13 +1514,9 @@ void kvmppc_set_papr(PowerPCCPU *cpu)
void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy)
{
CPUState *cs = CPU(cpu);
- struct kvm_enable_cap cap = {};
int ret;
- cap.cap = KVM_CAP_PPC_EPR;
- cap.args[0] = mpic_proxy;
- ret = kvm_vcpu_ioctl(cs, KVM_ENABLE_CAP, &cap);
-
+ ret = kvm_vcpu_enable_cap(cs, KVM_CAP_PPC_EPR, 0, mpic_proxy);
if (ret && mpic_proxy) {
cpu_abort(cs, "This KVM version does not support EPR\n");
}
commit e080f0fdff4a321a461638963b619b77b4307fdd
Author: Cornelia Huck <cornelia.huck at de.ibm.com>
Date: Wed Apr 9 17:23:34 2014 +0200
s390x: use kvm_vcpu_enable_cap()
Make kvm_s390_enable_css_support() use new interface.
Reviewed-by: Thomas Huth <thuth at linux.vnet.ibm.com>
Reviewed-by: Alexander Graf <agraf at suse.de>
Signed-off-by: Cornelia Huck <cornelia.huck at de.ibm.com>
diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c
index a30d1bc..b7b0edc 100644
--- a/target-s390x/kvm.c
+++ b/target-s390x/kvm.c
@@ -929,12 +929,10 @@ void kvm_s390_crw_mchk(S390CPU *cpu)
void kvm_s390_enable_css_support(S390CPU *cpu)
{
- struct kvm_enable_cap cap = {};
int r;
/* Activate host kernel channel subsystem support. */
- cap.cap = KVM_CAP_S390_CSS_SUPPORT;
- r = kvm_vcpu_ioctl(CPU(cpu), KVM_ENABLE_CAP, &cap);
+ r = kvm_vcpu_enable_cap(CPU(cpu), KVM_CAP_S390_CSS_SUPPORT, 0);
assert(r == 0);
}
commit 40f1ee27aa14494c155e4062afa83523e7817f40
Author: Cornelia Huck <cornelia.huck at de.ibm.com>
Date: Wed Oct 23 18:19:26 2013 +0200
kvm: add kvm_{vm,vcpu}_enable_cap
Provide helper functions for enabling capabilities (on a vcpu and on a vm).
Reviewed-by: Thomas Huth <thuth at linux.vnet.ibm.com>
Reviewed-by: Alexander Graf <agraf at suse.de>
Signed-off-by: Cornelia Huck <cornelia.huck at de.ibm.com>
diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h
index 0bee1e8..192fe89 100644
--- a/include/sysemu/kvm.h
+++ b/include/sysemu/kvm.h
@@ -294,6 +294,36 @@ bool kvm_arch_stop_on_emulation_error(CPUState *cpu);
int kvm_check_extension(KVMState *s, unsigned int extension);
+#define kvm_vm_enable_cap(s, capability, cap_flags, ...) \
+ ({ \
+ struct kvm_enable_cap cap = { \
+ .cap = capability, \
+ .flags = cap_flags, \
+ }; \
+ uint64_t args_tmp[] = { __VA_ARGS__ }; \
+ int i; \
+ for (i = 0; i < ARRAY_SIZE(args_tmp) && \
+ i < ARRAY_SIZE(cap.args); i++) { \
+ cap.args[i] = args_tmp[i]; \
+ } \
+ kvm_vm_ioctl(s, KVM_ENABLE_CAP, &cap); \
+ })
+
+#define kvm_vcpu_enable_cap(cpu, capability, cap_flags, ...) \
+ ({ \
+ struct kvm_enable_cap cap = { \
+ .cap = capability, \
+ .flags = cap_flags, \
+ }; \
+ uint64_t args_tmp[] = { __VA_ARGS__ }; \
+ int i; \
+ for (i = 0; i < ARRAY_SIZE(args_tmp) && \
+ i < ARRAY_SIZE(cap.args); i++) { \
+ cap.args[i] = args_tmp[i]; \
+ } \
+ kvm_vcpu_ioctl(cpu, KVM_ENABLE_CAP, &cap); \
+ })
+
uint32_t kvm_arch_get_supported_cpuid(KVMState *env, uint32_t function,
uint32_t index, int reg);
commit 35d0d40a034b2392f48f91e4e00c8c94e3526a19
Author: Max Reitz <mreitz at redhat.com>
Date: Tue Apr 29 18:32:25 2014 +0200
block: Use error_abort in bdrv_image_info_specific_dump()
Currently, bdrv_image_info_specific_dump() uses an error variable for
visit_type_ImageInfoSpecific, but ignores the result. As this function
is used here with an output visitor to transform the ImageInfoSpecific
object to a generic QDict, an error should actually be impossible. It is
however better to assert that this is indeed the case. This is done by
this patch using error_abort instead of an unused local Error variable.
Signed-off-by: Max Reitz <mreitz at redhat.com>
Reported-by: Markus Armbruster <armbru at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/qapi.c b/block/qapi.c
index 8f2b4db..af11445 100644
--- a/block/qapi.c
+++ b/block/qapi.c
@@ -532,12 +532,11 @@ static void dump_qdict(fprintf_function func_fprintf, void *f, int indentation,
void bdrv_image_info_specific_dump(fprintf_function func_fprintf, void *f,
ImageInfoSpecific *info_spec)
{
- Error *local_err = NULL;
QmpOutputVisitor *ov = qmp_output_visitor_new();
QObject *obj, *data;
visit_type_ImageInfoSpecific(qmp_output_get_visitor(ov), &info_spec, NULL,
- &local_err);
+ &error_abort);
obj = qmp_output_get_qobject(ov);
assert(qobject_type(obj) == QTYPE_QDICT);
data = qdict_get(qobject_to_qdict(obj), "data");
commit f1f25a2e2ea0cd3cdc7d01f2e0afbc4aef6fb853
Author: Kevin Wolf <kwolf at redhat.com>
Date: Fri Apr 25 19:04:55 2014 +0200
block: Fix open_flags in bdrv_reopen()
Use the same function as bdrv_open() for determining what the right
flags for bs->file are. Without doing this, a reopen means that
bs->file loses BDRV_O_CACHE_WB or BDRV_O_UNMAP if bs doesn't have it as
well.
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
Reviewed-by: Max Reitz <mreitz at redhat.com>
diff --git a/block.c b/block.c
index 9f6f07e..b749d31 100644
--- a/block.c
+++ b/block.c
@@ -1525,8 +1525,11 @@ BlockReopenQueue *bdrv_reopen_queue(BlockReopenQueue *bs_queue,
QSIMPLEQ_INIT(bs_queue);
}
+ /* bdrv_open() masks this flag out */
+ flags &= ~BDRV_O_PROTOCOL;
+
if (bs->file) {
- bdrv_reopen_queue(bs_queue, bs->file, flags);
+ bdrv_reopen_queue(bs_queue, bs->file, bdrv_inherited_flags(flags));
}
bs_entry = g_new0(BlockReopenQueueEntry, 1);
commit 7e3d98dd31b6de53923bfb0f04b23b42a94f3829
Author: Kevin Wolf <kwolf at redhat.com>
Date: Fri Apr 25 12:36:07 2014 +0200
Revert "block: another bdrv_append fix"
This reverts commit 3a389e7926750cba5c83f662b1941888b2bebc04. The commit
was wrong and what it tried to fix just works today without any change.
What the commit tried to fix:
When creating live snapshots, the new image file is opened with
BDRV_O_NO_BACKING because the whole backing chain is already opened.
It is then appended to the chain using bdrv_append(). The result of
this was that the image had a backing file, but BDRV_O_NO_BACKING
was still set. This is obviously inconsistent.
There used to be some places in qemu that closed and image and then
opened it again, with its old flags (a bdrv_open()/close() sequence
involves reopening the whole backing file chain, too). In this case
the BDRV_O_NO_BACKING flag meant that the backing chain wasn't
reopened and only the top layer was left.
(Most, but not all of these places are replaced by bdrv_reopen()
today, which doesn't touch the backing files at all.)
Other places that looked at bs->open_flags weren't interested in
BDRV_O_NO_BACKING, so no breakage there.
What it actually did:
The commit moved the BDRV_O_NO_BACKING away to the backing file.
Because the bdrv_open()/close() sequences only looked at the flags
of the top level BlockDriverState and used it for the whole chain,
the flag didn't hurt there any more. Obviously, it is still
inconsistent because the backing file may have another backing file,
but without practical impact.
At the same time, it swapped all other flags. This is practically
irrelevant as long as live snapshots only allow opening the new
layer with the same flags as the old top layer. It still doesn't
make any sense, and it is a time bomb that explodes as soon as the
flags can differ.
bdrv_append_temp_snapshot() is such a case: It adds the new flag
BDRV_O_TEMPORARY for the temporary snapshot. The swapping of commit
3a389e79 results in the following nonsensical configuration:
bs->open_flags: BDRV_O_TEMPORARY cleared
bs->file->open_flags: BDRV_O_TEMPORARY set
bs->backing_hd->open_flags: BDRV_O_TEMPORARY set
bs->backing_hd->file->open_flags: BDRV_O_TEMPORARY cleared
We're still lucky because the format layer ignores the flag and the
protocol layer happens to get the right value, but sooner or later
this is bound to go wrong...
What the right fix would have been:
Simply clear the BDRV_O_NO_BACKING flag when the BlockDriverState is
appended to an existing backing file chain, because now it does have
a backing file.
Commit 4ddc07ca already implemented this silently in bdrv_append(),
so we don't have to come up with a new fix.
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
Reviewed-by: Max Reitz <mreitz at redhat.com>
diff --git a/block.c b/block.c
index c094075..9f6f07e 100644
--- a/block.c
+++ b/block.c
@@ -1864,7 +1864,6 @@ static void bdrv_move_feature_fields(BlockDriverState *bs_dest,
BlockDriverState *bs_src)
{
/* move some fields that need to stay attached to the device */
- bs_dest->open_flags = bs_src->open_flags;
/* dev info */
bs_dest->dev_ops = bs_src->dev_ops;
commit 8bfea15ddac3a0ae832f181653c36e020f24f007
Author: Kevin Wolf <kwolf at redhat.com>
Date: Fri Apr 11 19:16:36 2014 +0200
block: Unlink temporary files in raw-posix/win32
Instead of having unlink() calls in the generic block layer, where we
aren't even guarateed to have a file name, move them to those block
drivers that are actually used and that always have a filename. Gets us
rid of some #ifdefs as well.
The patch also converts bs->is_temporary to a new BDRV_O_TEMPORARY open
flag so that it is inherited in the protocol layer and the raw-posix and
raw-win32 drivers can unlink the file.
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
Reviewed-by: Max Reitz <mreitz at redhat.com>
diff --git a/block.c b/block.c
index 9f88bcc..c094075 100644
--- a/block.c
+++ b/block.c
@@ -808,7 +808,7 @@ static int bdrv_backing_flags(int flags)
flags &= ~(BDRV_O_RDWR | BDRV_O_COPY_ON_READ);
/* snapshot=on is handled on the top layer */
- flags &= ~BDRV_O_SNAPSHOT;
+ flags &= ~(BDRV_O_SNAPSHOT | BDRV_O_TEMPORARY);
return flags;
}
@@ -831,7 +831,7 @@ static int bdrv_open_flags(BlockDriverState *bs, int flags)
/*
* Snapshots should be writable.
*/
- if (bs->is_temporary) {
+ if (flags & BDRV_O_TEMPORARY) {
open_flags |= BDRV_O_RDWR;
}
@@ -990,13 +990,6 @@ static int bdrv_open_common(BlockDriverState *bs, BlockDriverState *file,
bdrv_refresh_limits(bs);
assert(bdrv_opt_mem_align(bs) != 0);
assert((bs->request_alignment != 0) || bs->sg);
-
-#ifndef _WIN32
- if (bs->is_temporary) {
- assert(bs->filename[0] != '\0');
- unlink(bs->filename);
- }
-#endif
return 0;
free_and_fail:
@@ -1267,10 +1260,10 @@ void bdrv_append_temp_snapshot(BlockDriverState *bs, Error **errp)
qstring_from_str(tmp_filename));
bs_snapshot = bdrv_new("", &error_abort);
- bs_snapshot->is_temporary = 1;
ret = bdrv_open(&bs_snapshot, NULL, NULL, snapshot_options,
- bs->open_flags & ~BDRV_O_SNAPSHOT, bdrv_qcow2, &local_err);
+ (bs->open_flags & ~BDRV_O_SNAPSHOT) | BDRV_O_TEMPORARY,
+ bdrv_qcow2, &local_err);
if (ret < 0) {
error_propagate(errp, local_err);
goto out;
@@ -1371,7 +1364,7 @@ int bdrv_open(BlockDriverState **pbs, const char *filename,
bdrv_inherited_flags(flags),
true, &local_err);
if (ret < 0) {
- goto unlink_and_fail;
+ goto fail;
}
/* Find the right image format driver */
@@ -1382,7 +1375,7 @@ int bdrv_open(BlockDriverState **pbs, const char *filename,
if (!drv) {
error_setg(errp, "Invalid driver: '%s'", drvname);
ret = -EINVAL;
- goto unlink_and_fail;
+ goto fail;
}
}
@@ -1392,18 +1385,18 @@ int bdrv_open(BlockDriverState **pbs, const char *filename,
} else {
error_setg(errp, "Must specify either driver or file");
ret = -EINVAL;
- goto unlink_and_fail;
+ goto fail;
}
}
if (!drv) {
- goto unlink_and_fail;
+ goto fail;
}
/* Open the image */
ret = bdrv_open_common(bs, file, options, flags, drv, &local_err);
if (ret < 0) {
- goto unlink_and_fail;
+ goto fail;
}
if (file && (bs->file != file)) {
@@ -1465,14 +1458,10 @@ done:
*pbs = bs;
return 0;
-unlink_and_fail:
+fail:
if (file != NULL) {
bdrv_unref(file);
}
- if (bs->is_temporary) {
- unlink(filename);
- }
-fail:
QDECREF(bs->options);
QDECREF(options);
bs->options = NULL;
@@ -1752,11 +1741,6 @@ void bdrv_close(BlockDriverState *bs)
}
bs->drv->bdrv_close(bs);
g_free(bs->opaque);
-#ifdef _WIN32
- if (bs->is_temporary) {
- unlink(bs->filename);
- }
-#endif
bs->opaque = NULL;
bs->drv = NULL;
bs->copy_on_read = 0;
diff --git a/block/raw-posix.c b/block/raw-posix.c
index 1688e16..3ce026d 100644
--- a/block/raw-posix.c
+++ b/block/raw-posix.c
@@ -366,7 +366,7 @@ static int raw_open_common(BlockDriverState *bs, QDict *options,
BDRVRawState *s = bs->opaque;
QemuOpts *opts;
Error *local_err = NULL;
- const char *filename;
+ const char *filename = NULL;
int fd, ret;
struct stat st;
@@ -446,6 +446,9 @@ static int raw_open_common(BlockDriverState *bs, QDict *options,
ret = 0;
fail:
+ if (filename && (bdrv_flags & BDRV_O_TEMPORARY)) {
+ unlink(filename);
+ }
qemu_opts_del(opts);
return ret;
}
diff --git a/block/raw-win32.c b/block/raw-win32.c
index 48cb2c2..064ea31 100644
--- a/block/raw-win32.c
+++ b/block/raw-win32.c
@@ -390,6 +390,9 @@ static void raw_close(BlockDriverState *bs)
{
BDRVRawState *s = bs->opaque;
CloseHandle(s->hfile);
+ if (bs->open_flags & BDRV_O_TEMPORARY) {
+ unlink(bs->filename);
+ }
}
static int raw_truncate(BlockDriverState *bs, int64_t offset)
diff --git a/include/block/block.h b/include/block/block.h
index c12808a..467fb2b 100644
--- a/include/block/block.h
+++ b/include/block/block.h
@@ -92,6 +92,7 @@ typedef enum {
#define BDRV_O_RDWR 0x0002
#define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
+#define BDRV_O_TEMPORARY 0x0010 /* delete the file after use */
#define BDRV_O_NOCACHE 0x0020 /* do not use the host page cache */
#define BDRV_O_CACHE_WB 0x0040 /* use write-back caching */
#define BDRV_O_NATIVE_AIO 0x0080 /* use native AIO instead of the thread pool */
diff --git a/include/block/block_int.h b/include/block/block_int.h
index cd5bc73..9ffcb69 100644
--- a/include/block/block_int.h
+++ b/include/block/block_int.h
@@ -299,7 +299,6 @@ struct BlockDriverState {
char backing_file[1024]; /* if non zero, the image is a diff of
this file image */
char backing_format[16]; /* if non-zero and backing_file exists */
- int is_temporary;
BlockDriverState *backing_hd;
BlockDriverState *file;
commit 5669b44de5b3b607a3a4749e0c8c5ddfd723e76b
Author: Kevin Wolf <kwolf at redhat.com>
Date: Fri Apr 11 21:36:45 2014 +0200
block: Remove BDRV_O_COPY_ON_READ for bs->file
Copy on Read makes sense on the format level where backing files are
implemented, but it's not required on the protocol level. While it
shouldn't actively break anything to have COR enabled on both layers,
needless serialisation and allocation checks may impact performance.
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
Reviewed-by: Max Reitz <mreitz at redhat.com>
diff --git a/block.c b/block.c
index c6d5ab9..9f88bcc 100644
--- a/block.c
+++ b/block.c
@@ -793,7 +793,7 @@ static int bdrv_inherited_flags(int flags)
}
/* Clear flags that only apply to the top layer */
- flags &= ~(BDRV_O_SNAPSHOT | BDRV_O_NO_BACKING);
+ flags &= ~(BDRV_O_SNAPSHOT | BDRV_O_NO_BACKING | BDRV_O_COPY_ON_READ);
return flags;
}
commit 317fc44ef2bfa87e96adecf035ed136ed9d78c8f
Author: Kevin Wolf <kwolf at redhat.com>
Date: Fri Apr 25 13:27:34 2014 +0200
block: Create bdrv_backing_flags()
Instead of manipulation flags inline, move the derivation of the flags
of a backing file into a new function next to the existing functions
that derive flags for bs->file and for the block driver open function.
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
Reviewed-by: Max Reitz <mreitz at redhat.com>
diff --git a/block.c b/block.c
index 01282c2..c6d5ab9 100644
--- a/block.c
+++ b/block.c
@@ -798,6 +798,21 @@ static int bdrv_inherited_flags(int flags)
return flags;
}
+/*
+ * Returns the flags that bs->backing_hd should get, based on the given flags
+ * for the parent BDS
+ */
+static int bdrv_backing_flags(int flags)
+{
+ /* backing files always opened read-only */
+ flags &= ~(BDRV_O_RDWR | BDRV_O_COPY_ON_READ);
+
+ /* snapshot=on is handled on the top layer */
+ flags &= ~BDRV_O_SNAPSHOT;
+
+ return flags;
+}
+
static int bdrv_open_flags(BlockDriverState *bs, int flags)
{
int open_flags = flags | BDRV_O_CACHE_WB;
@@ -1093,7 +1108,7 @@ fail:
int bdrv_open_backing_file(BlockDriverState *bs, QDict *options, Error **errp)
{
char *backing_filename = g_malloc0(PATH_MAX);
- int back_flags, ret = 0;
+ int ret = 0;
BlockDriver *back_drv = NULL;
Error *local_err = NULL;
@@ -1121,14 +1136,10 @@ int bdrv_open_backing_file(BlockDriverState *bs, QDict *options, Error **errp)
back_drv = bdrv_find_format(bs->backing_format);
}
- /* backing files always opened read-only */
- back_flags = bs->open_flags & ~(BDRV_O_RDWR | BDRV_O_SNAPSHOT |
- BDRV_O_COPY_ON_READ);
-
assert(bs->backing_hd == NULL);
ret = bdrv_open(&bs->backing_hd,
*backing_filename ? backing_filename : NULL, NULL, options,
- back_flags, back_drv, &local_err);
+ bdrv_backing_flags(bs->open_flags), back_drv, &local_err);
if (ret < 0) {
bs->backing_hd = NULL;
bs->open_flags |= BDRV_O_NO_BACKING;
commit 0b50cc885381fc6794590dbbb40665e32f9292f8
Author: Kevin Wolf <kwolf at redhat.com>
Date: Fri Apr 11 21:29:52 2014 +0200
block: Create bdrv_inherited_flags()
Instead of having bdrv_open_flags() as a function that creates flags for
several unrelated places and then adding open-coded flags on top, create
a new function that derives the flags for bs->file from the flags for bs.
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
Reviewed-by: Max Reitz <mreitz at redhat.com>
diff --git a/block.c b/block.c
index 100fa86..01282c2 100644
--- a/block.c
+++ b/block.c
@@ -774,6 +774,30 @@ void bdrv_disable_copy_on_read(BlockDriverState *bs)
bs->copy_on_read--;
}
+/*
+ * Returns the flags that bs->file should get, based on the given flags for
+ * the parent BDS
+ */
+static int bdrv_inherited_flags(int flags)
+{
+ /* Enable protocol handling, disable format probing for bs->file */
+ flags |= BDRV_O_PROTOCOL;
+
+ /* Our block drivers take care to send flushes and respect unmap policy,
+ * so we can enable both unconditionally on lower layers. */
+ flags |= BDRV_O_CACHE_WB | BDRV_O_UNMAP;
+
+ /* The backing file of a temporary snapshot is read-only */
+ if (flags & BDRV_O_SNAPSHOT) {
+ flags &= ~BDRV_O_RDWR;
+ }
+
+ /* Clear flags that only apply to the top layer */
+ flags &= ~(BDRV_O_SNAPSHOT | BDRV_O_NO_BACKING);
+
+ return flags;
+}
+
static int bdrv_open_flags(BlockDriverState *bs, int flags)
{
int open_flags = flags | BDRV_O_CACHE_WB;
@@ -1333,8 +1357,8 @@ int bdrv_open(BlockDriverState **pbs, const char *filename,
assert(file == NULL);
ret = bdrv_open_image(&file, filename, options, "file",
- bdrv_open_flags(bs, flags | BDRV_O_UNMAP) |
- BDRV_O_PROTOCOL, true, &local_err);
+ bdrv_inherited_flags(flags),
+ true, &local_err);
if (ret < 0) {
goto unlink_and_fail;
}
commit cffb12051a26e5494ed009c99db7858b2aab7099
Author: Max Reitz <mreitz at redhat.com>
Date: Tue Apr 29 16:12:31 2014 +0200
iotests: Discarding compressed clusters on qcow2
Add a test which discards a compressed cluster on qcow2. This should
work without any problems.
Signed-off-by: Max Reitz <mreitz at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/tests/qemu-iotests/090 b/tests/qemu-iotests/090
new file mode 100755
index 0000000..8d032f8
--- /dev/null
+++ b/tests/qemu-iotests/090
@@ -0,0 +1,61 @@
+#!/bin/bash
+#
+# Test for discarding compressed clusters on qcow2 images
+#
+# Copyright (C) 2014 Red Hat, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+# creator
+owner=mreitz at redhat.com
+
+seq="$(basename $0)"
+echo "QA output created by $seq"
+
+here="$PWD"
+tmp=/tmp/$$
+status=1 # failure is the default!
+
+_cleanup()
+{
+ _cleanup_test_img
+}
+trap "_cleanup; exit \$status" 0 1 2 3 15
+
+# get standard environment, filters and checks
+. ./common.rc
+. ./common.filter
+
+_supported_fmt qcow2
+_supported_proto file
+_supported_os Linux
+
+IMG_SIZE=128K
+
+_make_test_img $IMG_SIZE
+
+$QEMU_IO -c 'write -c -P 42 0 64k' \
+ -c 'write -c -P 23 64k 64k' \
+ -c 'discard 64k 64k' \
+ "$TEST_IMG" | _filter_qemu_io
+
+$QEMU_IO -c 'read -P 0 64k 64k' "$TEST_IMG" | _filter_qemu_io
+
+_check_test_img
+
+# success, all done
+echo "*** done"
+rm -f $seq.full
+status=0
diff --git a/tests/qemu-iotests/090.out b/tests/qemu-iotests/090.out
new file mode 100644
index 0000000..2df93e0
--- /dev/null
+++ b/tests/qemu-iotests/090.out
@@ -0,0 +1,12 @@
+QA output created by 090
+Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=131072
+wrote 65536/65536 bytes at offset 0
+64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
+wrote 65536/65536 bytes at offset 65536
+64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
+discard 65536/65536 bytes at offset 65536
+64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
+read 65536/65536 bytes at offset 65536
+64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
+No errors were found on the image.
+*** done
diff --git a/tests/qemu-iotests/group b/tests/qemu-iotests/group
index 864643d..ae09663 100644
--- a/tests/qemu-iotests/group
+++ b/tests/qemu-iotests/group
@@ -95,3 +95,4 @@
086 rw auto quick
087 rw auto
088 rw auto
+090 rw auto quick
commit c883db0df9dbf26471c1418a632b216b0c1104f1
Author: Max Reitz <mreitz at redhat.com>
Date: Tue Apr 29 16:12:30 2014 +0200
qcow2: Fix discard
discard_single_l2() should not implement its own version of
qcow2_get_cluster_type(), but rather rely on this already existing
function. By doing so, it will work for compressed clusters as well
(which it did not so far).
Also, rename "old_offset" to "old_l2_entry", as both are quite different
(and the value is indeed of the latter kind).
Signed-off-by: Max Reitz <mreitz at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/qcow2-cluster.c b/block/qcow2-cluster.c
index 331ab08..b746429 100644
--- a/block/qcow2-cluster.c
+++ b/block/qcow2-cluster.c
@@ -1360,9 +1360,9 @@ static int discard_single_l2(BlockDriverState *bs, uint64_t offset,
nb_clusters = MIN(nb_clusters, s->l2_size - l2_index);
for (i = 0; i < nb_clusters; i++) {
- uint64_t old_offset;
+ uint64_t old_l2_entry;
- old_offset = be64_to_cpu(l2_table[l2_index + i]);
+ old_l2_entry = be64_to_cpu(l2_table[l2_index + i]);
/*
* Make sure that a discarded area reads back as zeroes for v3 images
@@ -1373,12 +1373,22 @@ static int discard_single_l2(BlockDriverState *bs, uint64_t offset,
* TODO We might want to use bdrv_get_block_status(bs) here, but we're
* holding s->lock, so that doesn't work today.
*/
- if (old_offset & QCOW_OFLAG_ZERO) {
- continue;
- }
+ switch (qcow2_get_cluster_type(old_l2_entry)) {
+ case QCOW2_CLUSTER_UNALLOCATED:
+ if (!bs->backing_hd) {
+ continue;
+ }
+ break;
- if ((old_offset & L2E_OFFSET_MASK) == 0 && !bs->backing_hd) {
- continue;
+ case QCOW2_CLUSTER_ZERO:
+ continue;
+
+ case QCOW2_CLUSTER_NORMAL:
+ case QCOW2_CLUSTER_COMPRESSED:
+ break;
+
+ default:
+ abort();
}
/* First remove L2 entries */
@@ -1390,7 +1400,7 @@ static int discard_single_l2(BlockDriverState *bs, uint64_t offset,
}
/* Then decrease the refcount */
- qcow2_free_any_clusters(bs, old_offset, 1, type);
+ qcow2_free_any_clusters(bs, old_l2_entry, 1, type);
}
ret = qcow2_cache_put(bs, s->l2_table_cache, (void**) &l2_table);
commit cc8a7e560ca7932bacabc8a7113ac73976917848
Author: Jeff Cody <jcody at redhat.com>
Date: Thu Apr 10 16:47:40 2014 -0400
block: qemu-iotests: make test 019 and 086 work with spaced pathnames
Both tests 019 and 086 need proper quotations to work with pathnames
that contain spaces.
Reviewed-by: Benoit Canet <benoit at irqsave.net>
Reviewed-by: Fam Zheng <famz at redhat.com>
Signed-off-by: Jeff Cody <jcody at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/tests/qemu-iotests/019 b/tests/qemu-iotests/019
index e67445c..f5ecbf5 100755
--- a/tests/qemu-iotests/019
+++ b/tests/qemu-iotests/019
@@ -96,7 +96,7 @@ mv "$TEST_IMG" "$TEST_IMG.orig"
for backing_option in "-B " "-o backing_file="; do
echo
- echo Testing conversion with $backing_option$TEST_IMG.base | _filter_testdir | _filter_imgfmt
+ echo Testing conversion with $backing_option"$TEST_IMG.base" | _filter_testdir | _filter_imgfmt
echo
$QEMU_IMG convert -O $IMGFMT $backing_option"$TEST_IMG.base" "$TEST_IMG.orig" "$TEST_IMG"
diff --git a/tests/qemu-iotests/086 b/tests/qemu-iotests/086
index 48fe85b..d9a80cf 100755
--- a/tests/qemu-iotests/086
+++ b/tests/qemu-iotests/086
@@ -51,10 +51,10 @@ function run_qemu_img()
size=128M
_make_test_img $size
-$QEMU_IO -c 'write 0 1M' $TEST_IMG | _filter_qemu_io
-$QEMU_IO -c 'write 2M 1M' $TEST_IMG | _filter_qemu_io
-$QEMU_IO -c 'write 4M 1M' $TEST_IMG | _filter_qemu_io
-$QEMU_IO -c 'write 32M 1M' $TEST_IMG | _filter_qemu_io
+$QEMU_IO -c 'write 0 1M' "$TEST_IMG" | _filter_qemu_io
+$QEMU_IO -c 'write 2M 1M' "$TEST_IMG" | _filter_qemu_io
+$QEMU_IO -c 'write 4M 1M' "$TEST_IMG" | _filter_qemu_io
+$QEMU_IO -c 'write 32M 1M' "$TEST_IMG" | _filter_qemu_io
$QEMU_IMG convert -p -O $IMGFMT -f $IMGFMT "$TEST_IMG" "$TEST_IMG".base 2>&1 |\
_filter_testdir | sed -e 's/\r/\n/g'
commit c55752745536712f778e9a0d73a078bdb0360df2
Author: Jeff Cody <jcody at redhat.com>
Date: Thu Apr 10 16:47:39 2014 -0400
block: qemu-iotests - fix image cleanup when using spaced pathnames
The _rm_test_img() function in common.rc did not quote the image
file, which left droppings in the scratch directory (and performed
a potentially unsafe rm -f).
This adds the necessary quotes.
Reviewed-by: Benoit Canet <benoit at irqsave.net>
Signed-off-by: Jeff Cody <jcody at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/tests/qemu-iotests/common.rc b/tests/qemu-iotests/common.rc
index 7f00883..195c564 100644
--- a/tests/qemu-iotests/common.rc
+++ b/tests/qemu-iotests/common.rc
@@ -178,10 +178,10 @@ _rm_test_img()
local img=$1
if [ "$IMGFMT" = "vmdk" ]; then
# Remove all the extents for vmdk
- $QEMU_IMG info $img 2>/dev/null | grep 'filename:' | cut -f 2 -d: \
+ "$QEMU_IMG" info "$img" 2>/dev/null | grep 'filename:' | cut -f 2 -d: \
| xargs -I {} rm -f "{}"
fi
- rm -f $img
+ rm -f "$img"
}
_cleanup_test_img()
commit b006f8162e11f0395689a684d6e871b047c23481
Merge: e2da502 ebd0c61
Author: Peter Maydell <peter.maydell at linaro.org>
Date: Tue Apr 29 13:03:25 2014 +0100
Merge remote-tracking branch 'remotes/rth/tags/tcg-sparc-pull-20140428' into staging
TCG sparc backend update for 20140428
# gpg: Signature made Mon 28 Apr 2014 19:36:55 BST using RSA key ID 4DD0279B
# gpg: Can't check signature: public key not found
* remotes/rth/tags/tcg-sparc-pull-20140428:
tcg-sparc: Accept stores of zero
tcg-sparc: Fix small 32-bit movi
tcg-sparc: Fixup function argument types
tcg-sparc: Hoist common argument loads in tcg_out_op
tcg-sparc: Don't handle mov/movi in tcg_out_op
tcg-sparc: Tidy check_fit_* tests
tcg-sparc: Implement muls2_i32
tcg-sparc: Use the RETURN instruction
tcg-sparc: Use 64-bit registers with sparcv8plus
tcg-sparc: Support trunc_shr_i32
tcg-sparc: Remove most uses of TCG_TARGET_REG_BITS
tcg: Add INDEX_op_trunc_shr_i32
tcg: Fix missed pointer size != TCG_TARGET_REG_BITS changes
Signed-off-by: Peter Maydell <peter.maydell at linaro.org>
commit c3cc95bd155d51fc1f9b7259b3bff20a361a1cca
Author: Fam Zheng <famz at redhat.com>
Date: Tue Apr 29 18:14:17 2014 +0800
mirror: Check for bdrv_get_info result
bdrv_get_info could fail. Add check before using the returned value.
Signed-off-by: Fam Zheng <famz at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/mirror.c b/block/mirror.c
index 403714c..1c38aa8 100644
--- a/block/mirror.c
+++ b/block/mirror.c
@@ -339,7 +339,10 @@ static void coroutine_fn mirror_run(void *opaque)
bdrv_get_backing_filename(s->target, backing_filename,
sizeof(backing_filename));
if (backing_filename[0] && !s->target->backing_hd) {
- bdrv_get_info(s->target, &bdi);
+ ret = bdrv_get_info(s->target, &bdi);
+ if (ret < 0) {
+ goto immediate_exit;
+ }
if (s->granularity < bdi.cluster_size) {
s->buf_size = MAX(s->buf_size, bdi.cluster_size);
s->cow_bitmap = bitmap_new(length);
commit 373df5b135b4a54e0abb394e9e703fef3ded093c
Author: Fam Zheng <famz at redhat.com>
Date: Tue Apr 29 18:09:09 2014 +0800
mirror: Fix resource leak when bdrv_getlength fails
The direct return will skip releasing of all the resouces at
immediate_exit, don't miss that.
Signed-off-by: Fam Zheng <famz at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/mirror.c b/block/mirror.c
index 95366ad..403714c 100644
--- a/block/mirror.c
+++ b/block/mirror.c
@@ -325,8 +325,8 @@ static void coroutine_fn mirror_run(void *opaque)
s->common.len = bdrv_getlength(bs);
if (s->common.len <= 0) {
- block_job_completed(&s->common, s->common.len);
- return;
+ ret = s->common.len;
+ goto immediate_exit;
}
length = DIV_ROUND_UP(s->common.len, s->granularity);
commit e855e4fb7b97f7f605e1f44427b98022e39e6f8f
Author: Jeff Cody <jcody at redhat.com>
Date: Mon Apr 28 18:29:54 2014 -0400
block: Ignore duplicate or NULL format_name in bdrv_iterate_format
Some block drivers have multiple BlockDriver instances with identical
format_name fields (e.g. gluster, nbd).
Both qemu-img and qemu will use bdrv_iterate_format() to list the
supported formats when a help option is invoked. As protocols and
formats may register multiple drivers, redundant listings of formats
occur (e.g., "Supported formats: ... gluster gluster gluster gluster ...
").
Since the list of driver formats will be small, this performs a simple
linear search on format_name, and ignores any duplicates.
The end result change is that the iterator will no longer receive
duplicate string names, nor will it receive NULL pointers.
Signed-off-by: Jeff Cody <jcody at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block.c b/block.c
index 4745712..100fa86 100644
--- a/block.c
+++ b/block.c
@@ -3601,10 +3601,25 @@ void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
void *opaque)
{
BlockDriver *drv;
+ int count = 0;
+ const char **formats = NULL;
QLIST_FOREACH(drv, &bdrv_drivers, list) {
- it(opaque, drv->format_name);
+ if (drv->format_name) {
+ bool found = false;
+ int i = count;
+ while (formats && i && !found) {
+ found = !strcmp(formats[--i], drv->format_name);
+ }
+
+ if (!found) {
+ formats = g_realloc(formats, (count + 1) * sizeof(char *));
+ formats[count++] = drv->format_name;
+ it(opaque, drv->format_name);
+ }
+ }
}
+ g_free(formats);
}
/* This function is to find block backend bs */
commit 3f2fde2a0002e6a3c83d61b7976436fbaf39750c
Author: Cole Robinson <crobinso at redhat.com>
Date: Mon Apr 21 18:58:50 2014 -0400
sdl2: Support mouse wheel
In SDL2, wheel movement is its own event, not a button event. Wire
it up similar to gtk.c
Signed-off-by: Cole Robinson <crobinso at redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
diff --git a/ui/sdl2.c b/ui/sdl2.c
index 94d6d3f..361de61 100644
--- a/ui/sdl2.c
+++ b/ui/sdl2.c
@@ -359,16 +359,12 @@ static void sdl_mouse_mode_change(Notifier *notify, void *data)
}
static void sdl_send_mouse_event(struct sdl2_state *scon, int dx, int dy,
- int dz, int x, int y, int state)
+ int x, int y, int state)
{
static uint32_t bmap[INPUT_BUTTON_MAX] = {
[INPUT_BUTTON_LEFT] = SDL_BUTTON(SDL_BUTTON_LEFT),
[INPUT_BUTTON_MIDDLE] = SDL_BUTTON(SDL_BUTTON_MIDDLE),
[INPUT_BUTTON_RIGHT] = SDL_BUTTON(SDL_BUTTON_RIGHT),
-#if 0
- [INPUT_BUTTON_WHEEL_UP] = SDL_BUTTON(SDL_BUTTON_WHEELUP),
- [INPUT_BUTTON_WHEEL_DOWN] = SDL_BUTTON(SDL_BUTTON_WHEELDOWN),
-#endif
};
static uint32_t prev_state;
@@ -566,7 +562,7 @@ static void handle_mousemotion(SDL_Event *ev)
}
}
if (gui_grab || qemu_input_is_absolute() || absolute_enabled) {
- sdl_send_mouse_event(scon, ev->motion.xrel, ev->motion.yrel, 0,
+ sdl_send_mouse_event(scon, ev->motion.xrel, ev->motion.yrel,
ev->motion.x, ev->motion.y, ev->motion.state);
}
}
@@ -576,7 +572,6 @@ static void handle_mousebutton(SDL_Event *ev)
int buttonstate = SDL_GetMouseState(NULL, NULL);
SDL_MouseButtonEvent *bev;
struct sdl2_state *scon = get_scon_from_window(ev->key.windowID);
- int dz;
bev = &ev->button;
if (!gui_grab && !qemu_input_is_absolute()) {
@@ -585,23 +580,33 @@ static void handle_mousebutton(SDL_Event *ev)
sdl_grab_start(scon);
}
} else {
- dz = 0;
if (ev->type == SDL_MOUSEBUTTONDOWN) {
buttonstate |= SDL_BUTTON(bev->button);
} else {
buttonstate &= ~SDL_BUTTON(bev->button);
}
-#ifdef SDL_BUTTON_WHEELUP
- if (bev->button == SDL_BUTTON_WHEELUP &&
- ev->type == SDL_MOUSEBUTTONDOWN) {
- dz = -1;
- } else if (bev->button == SDL_BUTTON_WHEELDOWN &&
- ev->type == SDL_MOUSEBUTTONDOWN) {
- dz = 1;
- }
-#endif
- sdl_send_mouse_event(scon, 0, 0, dz, bev->x, bev->y, buttonstate);
+ sdl_send_mouse_event(scon, 0, 0, bev->x, bev->y, buttonstate);
+ }
+}
+
+static void handle_mousewheel(SDL_Event *ev)
+{
+ struct sdl2_state *scon = get_scon_from_window(ev->key.windowID);
+ SDL_MouseWheelEvent *wev = &ev->wheel;
+ InputButton btn;
+
+ if (wev->y > 0) {
+ btn = INPUT_BUTTON_WHEEL_UP;
+ } else if (wev->y < 0) {
+ btn = INPUT_BUTTON_WHEEL_DOWN;
+ } else {
+ return;
}
+
+ qemu_input_queue_btn(scon->dcl.con, btn, true);
+ qemu_input_event_sync();
+ qemu_input_queue_btn(scon->dcl.con, btn, false);
+ qemu_input_event_sync();
}
static void handle_windowevent(DisplayChangeListener *dcl, SDL_Event *ev)
@@ -685,6 +690,9 @@ static void sdl_refresh(DisplayChangeListener *dcl)
case SDL_MOUSEBUTTONUP:
handle_mousebutton(ev);
break;
+ case SDL_MOUSEWHEEL:
+ handle_mousewheel(ev);
+ break;
case SDL_WINDOWEVENT:
handle_windowevent(dcl, ev);
break;
commit 8b15d9f1d2954c405bbbf53968f0f5660f946311
Author: Dave Airlie <airlied at redhat.com>
Date: Tue Mar 25 16:50:36 2014 +1000
sdl2: add ui info setting.
Allows you to resize the sdl2 window and have the guest notice.
[ kraxel: zero-initialize QemuUIInfo ]
Signed-off-by: Dave Airlie <airlied at redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
diff --git a/ui/sdl2.c b/ui/sdl2.c
index 7506e2e..94d6d3f 100644
--- a/ui/sdl2.c
+++ b/ui/sdl2.c
@@ -612,6 +612,13 @@ static void handle_windowevent(DisplayChangeListener *dcl, SDL_Event *ev)
switch (ev->window.event) {
case SDL_WINDOWEVENT_RESIZED:
sdl_scale(scon, ev->window.data1, ev->window.data2);
+ {
+ QemuUIInfo info;
+ memset(&info, 0, sizeof(info));
+ info.width = ev->window.data1;
+ info.height = ev->window.data2;
+ dpy_set_ui_info(scon->dcl.con, &info);
+ }
graphic_hw_invalidate(scon->dcl.con);
graphic_hw_update(scon->dcl.con);
break;
commit 341a034742ffd87208fa51279537def21a8c39a7
Author: Cole Robinson <crobinso at redhat.com>
Date: Thu Apr 24 13:35:56 2014 -0400
gtk: Fix accelerators being triggered twice with gtk3
When keyboard focus is grabbed, current qemu wants to pass every
keypress to the VM, unless the user is pressing a UI accelerator.
That's exactly how things work without any of the fancy handling. Drop
the special handling, which seems to trigger accelerators twice on gtk3.
Signed-off-by: Cole Robinson <crobinso at redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
diff --git a/ui/gtk.c b/ui/gtk.c
index 1465a38..9f5061a 100644
--- a/ui/gtk.c
+++ b/ui/gtk.c
@@ -99,8 +99,6 @@ static inline void gdk_drawable_get_size(GdkWindow *w, gint *ww, gint *wh)
#endif
#define HOTKEY_MODIFIERS (GDK_CONTROL_MASK | GDK_MOD1_MASK)
-#define IGNORE_MODIFIER_MASK \
- (GDK_MODIFIER_MASK & ~(GDK_LOCK_MASK | GDK_MOD2_MASK))
static const int modifier_keycode[] = {
/* shift, control, alt keys, meta keys, both left & right */
@@ -489,24 +487,6 @@ static void gd_mouse_mode_change(Notifier *notify, void *data)
/** GTK Events **/
-static gboolean gd_window_key_event(GtkWidget *widget, GdkEventKey *key, void *opaque)
-{
- GtkDisplayState *s = opaque;
- gboolean handled = FALSE;
-
- if (!gd_is_grab_active(s) ||
- (key->state & IGNORE_MODIFIER_MASK) == HOTKEY_MODIFIERS) {
- handled = gtk_window_activate_key(GTK_WINDOW(widget), key);
- }
- if (handled) {
- gtk_release_modifiers(s);
- } else {
- handled = gtk_window_propagate_key_event(GTK_WINDOW(widget), key);
- }
-
- return handled;
-}
-
static gboolean gd_window_close(GtkWidget *widget, GdkEvent *event,
void *opaque)
{
@@ -1272,8 +1252,6 @@ static void gd_connect_signals(GtkDisplayState *s)
g_signal_connect(s->show_tabs_item, "activate",
G_CALLBACK(gd_menu_show_tabs), s);
- g_signal_connect(s->window, "key-press-event",
- G_CALLBACK(gd_window_key_event), s);
g_signal_connect(s->window, "delete-event",
G_CALLBACK(gd_window_close), s);
commit d4370741402a97b8b6d0c38fef18ab38bf25ab22
Author: Cole Robinson <crobinso at redhat.com>
Date: Thu Apr 24 13:35:54 2014 -0400
gtk: Fix -serial vc
Try kicking off a rhel5 text install over serial, the text menu navigation
is all messed up, and some of the kernel boot messages are randomly
corrupted.
Drop use of a pty and just use vte infrastructure for reading and writing.
This fixes the above corruption, and is simpler to boot.
(I don't know what was wrong with the original code though. FWIW this is
what virt-manager has done for years).
Signed-off-by: Cole Robinson <crobinso at redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
diff --git a/ui/gtk.c b/ui/gtk.c
index c85aea3..1465a38 100644
--- a/ui/gtk.c
+++ b/ui/gtk.c
@@ -115,7 +115,6 @@ typedef struct VirtualConsole
GtkWidget *scrolled_window;
CharDriverState *chr;
#endif
- int fd;
} VirtualConsole;
typedef struct GtkDisplayState
@@ -1162,9 +1161,12 @@ static gboolean gd_focus_out_event(GtkWidget *widget,
static int gd_vc_chr_write(CharDriverState *chr, const uint8_t *buf, int len)
{
+#if defined(CONFIG_VTE)
VirtualConsole *vc = chr->opaque;
- return vc ? write(vc->fd, buf, len) : len;
+ vte_terminal_feed(VTE_TERMINAL(vc->terminal), (const char *)buf, len);
+#endif
+ return len;
}
static int nb_vcs;
@@ -1190,19 +1192,12 @@ void early_gtk_display_init(void)
}
#if defined(CONFIG_VTE)
-static gboolean gd_vc_in(GIOChannel *chan, GIOCondition cond, void *opaque)
+static gboolean gd_vc_in(VteTerminal *terminal, gchar *text, guint size,
+ gpointer user_data)
{
- VirtualConsole *vc = opaque;
- uint8_t buffer[1024];
- ssize_t len;
-
- len = read(vc->fd, buffer, sizeof(buffer));
- if (len <= 0) {
- return FALSE;
- }
-
- qemu_chr_be_write(vc->chr, buffer, len);
+ VirtualConsole *vc = user_data;
+ qemu_chr_be_write(vc->chr, (uint8_t *)text, (unsigned int)size);
return TRUE;
}
#endif
@@ -1214,13 +1209,8 @@ static GSList *gd_vc_init(GtkDisplayState *s, VirtualConsole *vc, int index, GSL
const char *label;
char buffer[32];
char path[32];
-#if VTE_CHECK_VERSION(0, 26, 0)
- VtePty *pty;
-#endif
- GIOChannel *chan;
GtkWidget *scrolled_window;
GtkAdjustment *vadjustment;
- int master_fd, slave_fd;
snprintf(buffer, sizeof(buffer), "vc%d", index);
snprintf(path, sizeof(path), "<QEMU>/View/VC%d", index);
@@ -1239,16 +1229,7 @@ static GSList *gd_vc_init(GtkDisplayState *s, VirtualConsole *vc, int index, GSL
gtk_accel_map_add_entry(path, GDK_KEY_2 + index, HOTKEY_MODIFIERS);
vc->terminal = vte_terminal_new();
-
- master_fd = qemu_openpty_raw(&slave_fd, NULL);
- g_assert(master_fd != -1);
-
-#if VTE_CHECK_VERSION(0, 26, 0)
- pty = vte_pty_new_foreign(master_fd, NULL);
- vte_terminal_set_pty_object(VTE_TERMINAL(vc->terminal), pty);
-#else
- vte_terminal_set_pty(VTE_TERMINAL(vc->terminal), master_fd);
-#endif
+ g_signal_connect(vc->terminal, "commit", G_CALLBACK(gd_vc_in), vc);
vte_terminal_set_scrollback_lines(VTE_TERMINAL(vc->terminal), -1);
@@ -1263,7 +1244,6 @@ static GSList *gd_vc_init(GtkDisplayState *s, VirtualConsole *vc, int index, GSL
vte_terminal_set_size(VTE_TERMINAL(vc->terminal), 80, 25);
- vc->fd = slave_fd;
vc->chr->opaque = vc;
vc->scrolled_window = scrolled_window;
@@ -1281,9 +1261,6 @@ static GSList *gd_vc_init(GtkDisplayState *s, VirtualConsole *vc, int index, GSL
vc->chr->init(vc->chr);
}
- chan = g_io_channel_unix_new(vc->fd);
- g_io_add_watch(chan, G_IO_IN, gd_vc_in, vc);
-
#endif /* CONFIG_VTE */
return group;
}
commit db1da1f2b5f3a2383030438553988f0734a97dbe
Author: Cole Robinson <crobinso at redhat.com>
Date: Mon Mar 17 16:06:27 2014 -0400
gtk: Use ctrl+alt+q for quit accelerator
Using the standard ctrl+q makes it too easy to kill the whole VM. Using
ctrl+alt+FOO is consistent with our other accelerators.
https://bugzilla.redhat.com/show_bug.cgi?id=1062393
Signed-off-by: Cole Robinson <crobinso at redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
diff --git a/ui/gtk.c b/ui/gtk.c
index 7e87e35..c85aea3 100644
--- a/ui/gtk.c
+++ b/ui/gtk.c
@@ -93,6 +93,7 @@ static inline void gdk_drawable_get_size(GdkWindow *w, gint *ww, gint *wh)
#define GDK_KEY_2 GDK_2
#define GDK_KEY_f GDK_f
#define GDK_KEY_g GDK_g
+#define GDK_KEY_q GDK_q
#define GDK_KEY_plus GDK_plus
#define GDK_KEY_minus GDK_minus
#endif
@@ -1378,7 +1379,7 @@ static GtkWidget *gd_create_menu_machine(GtkDisplayState *s, GtkAccelGroup *acce
gtk_menu_item_set_accel_path(GTK_MENU_ITEM(s->quit_item),
"<QEMU>/Machine/Quit");
gtk_accel_map_add_entry("<QEMU>/Machine/Quit",
- GDK_KEY_q, GDK_CONTROL_MASK);
+ GDK_KEY_q, HOTKEY_MODIFIERS);
gtk_menu_shell_append(GTK_MENU_SHELL(machine_menu), s->quit_item);
return machine_menu;
commit 3d914488aee3dc1bf495e461aedf8fb4e5bb2270
Author: Cole Robinson <crobinso at redhat.com>
Date: Mon Mar 17 16:06:26 2014 -0400
gtk: Remove use of deprecated stock items
Stock items are deprecated. As are ImageMenuItems. Convert everything to
text only MenuItems, with the same text content as mentioned in the
conversion guide:
https://docs.google.com/spreadsheet/pub?key=0AsPAM3pPwxagdGF4THNMMUpjUW5xMXZfdUNzMXhEa2c&output=html
gtk2 users lose their menu icons as well, but I don't think that's enough
of a problem to warrant keeping around back compat code.
Example error:
ui/gtk.c:1328:5: error: ‘GtkStock’ is deprecated [-Werror=deprecated-declarations]
ui/gtk.c:1335:5: error: ‘gtk_image_menu_item_new_from_stock’ is deprecated (declared at /usr/include/gtk-3.0/gtk/deprecated/gtkimagemenuitem.h:78): Use 'gtk_menu_item_new' instead [-Werror=deprecated-declarations]
s->zoom_out_item = gtk_image_menu_item_new_from_stock(GTK_STOCK_ZOOM_OUT, NULL);
Signed-off-by: Cole Robinson <crobinso at redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
diff --git a/ui/gtk.c b/ui/gtk.c
index 5cdc044..7e87e35 100644
--- a/ui/gtk.c
+++ b/ui/gtk.c
@@ -1355,7 +1355,6 @@ static GtkWidget *gd_create_menu_machine(GtkDisplayState *s, GtkAccelGroup *acce
{
GtkWidget *machine_menu;
GtkWidget *separator;
- GtkStockItem item;
machine_menu = gtk_menu_new();
gtk_menu_set_accel_group(GTK_MENU(machine_menu), accel_group);
@@ -1375,11 +1374,11 @@ static GtkWidget *gd_create_menu_machine(GtkDisplayState *s, GtkAccelGroup *acce
separator = gtk_separator_menu_item_new();
gtk_menu_shell_append(GTK_MENU_SHELL(machine_menu), separator);
- s->quit_item = gtk_image_menu_item_new_from_stock(GTK_STOCK_QUIT, NULL);
- gtk_stock_lookup(GTK_STOCK_QUIT, &item);
+ s->quit_item = gtk_menu_item_new_with_mnemonic(_("_Quit"));
gtk_menu_item_set_accel_path(GTK_MENU_ITEM(s->quit_item),
"<QEMU>/Machine/Quit");
- gtk_accel_map_add_entry("<QEMU>/Machine/Quit", item.keyval, item.modifier);
+ gtk_accel_map_add_entry("<QEMU>/Machine/Quit",
+ GDK_KEY_q, GDK_CONTROL_MASK);
gtk_menu_shell_append(GTK_MENU_SHELL(machine_menu), s->quit_item);
return machine_menu;
@@ -1395,8 +1394,7 @@ static GtkWidget *gd_create_menu_view(GtkDisplayState *s, GtkAccelGroup *accel_g
view_menu = gtk_menu_new();
gtk_menu_set_accel_group(GTK_MENU(view_menu), accel_group);
- s->full_screen_item =
- gtk_image_menu_item_new_from_stock(GTK_STOCK_FULLSCREEN, NULL);
+ s->full_screen_item = gtk_menu_item_new_with_mnemonic(_("_Fullscreen"));
gtk_menu_item_set_accel_path(GTK_MENU_ITEM(s->full_screen_item),
"<QEMU>/View/Full Screen");
gtk_accel_map_add_entry("<QEMU>/View/Full Screen", GDK_KEY_f,
@@ -1406,21 +1404,21 @@ static GtkWidget *gd_create_menu_view(GtkDisplayState *s, GtkAccelGroup *accel_g
separator = gtk_separator_menu_item_new();
gtk_menu_shell_append(GTK_MENU_SHELL(view_menu), separator);
- s->zoom_in_item = gtk_image_menu_item_new_from_stock(GTK_STOCK_ZOOM_IN, NULL);
+ s->zoom_in_item = gtk_menu_item_new_with_mnemonic(_("Zoom _In"));
gtk_menu_item_set_accel_path(GTK_MENU_ITEM(s->zoom_in_item),
"<QEMU>/View/Zoom In");
gtk_accel_map_add_entry("<QEMU>/View/Zoom In", GDK_KEY_plus,
HOTKEY_MODIFIERS);
gtk_menu_shell_append(GTK_MENU_SHELL(view_menu), s->zoom_in_item);
- s->zoom_out_item = gtk_image_menu_item_new_from_stock(GTK_STOCK_ZOOM_OUT, NULL);
+ s->zoom_out_item = gtk_menu_item_new_with_mnemonic(_("Zoom _Out"));
gtk_menu_item_set_accel_path(GTK_MENU_ITEM(s->zoom_out_item),
"<QEMU>/View/Zoom Out");
gtk_accel_map_add_entry("<QEMU>/View/Zoom Out", GDK_KEY_minus,
HOTKEY_MODIFIERS);
gtk_menu_shell_append(GTK_MENU_SHELL(view_menu), s->zoom_out_item);
- s->zoom_fixed_item = gtk_image_menu_item_new_from_stock(GTK_STOCK_ZOOM_100, NULL);
+ s->zoom_fixed_item = gtk_menu_item_new_with_mnemonic(_("Best _Fit"));
gtk_menu_item_set_accel_path(GTK_MENU_ITEM(s->zoom_fixed_item),
"<QEMU>/View/Zoom Fixed");
gtk_accel_map_add_entry("<QEMU>/View/Zoom Fixed", GDK_KEY_0,
commit 105923e08c724c2a5561673442bca91ddab83b41
Author: Cole Robinson <crobinso at redhat.com>
Date: Mon Mar 17 16:06:25 2014 -0400
gtk: Don't use deprecated vte_terminal_get_adjustment
Guard this with a VTE version check, since I'm not sure if this is backwards
compatible.
ui/gtk.c: In function ‘gd_vc_init’:
ui/gtk.c:1176:5: error: ‘vte_terminal_get_adjustment’ is deprecated (declared at /usr/include/vte-2.90/vte/vtedeprecated.h:101) [-Werror=deprecated-declarations]
Signed-off-by: Cole Robinson <crobinso at redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
diff --git a/ui/gtk.c b/ui/gtk.c
index a56678f..5cdc044 100644
--- a/ui/gtk.c
+++ b/ui/gtk.c
@@ -1251,7 +1251,11 @@ static GSList *gd_vc_init(GtkDisplayState *s, VirtualConsole *vc, int index, GSL
vte_terminal_set_scrollback_lines(VTE_TERMINAL(vc->terminal), -1);
+#if VTE_CHECK_VERSION(0, 28, 0) && GTK_CHECK_VERSION(3, 0, 0)
+ vadjustment = gtk_scrollable_get_vadjustment(GTK_SCROLLABLE(vc->terminal));
+#else
vadjustment = vte_terminal_get_adjustment(VTE_TERMINAL(vc->terminal));
+#endif
scrolled_window = gtk_scrolled_window_new(NULL, vadjustment);
gtk_container_add(GTK_CONTAINER(scrolled_window), vc->terminal);
commit 9068f20dfbc8e24afe467ce568dc30049b520652
Author: Cole Robinson <crobinso at redhat.com>
Date: Mon Mar 17 16:06:24 2014 -0400
gtk: Don't use deprecated gtk_image_menu_item_new_with_mnemonic
In these cases we weren't using an image in the menu item anyways, so
just do as the suggestion says. Should be fine for all qemu supported
gtk versions.
ui/gtk.c: In function ‘gd_create_menu_machine’:
ui/gtk.c:1284:5: error: ‘gtk_image_menu_item_new_with_mnemonic’ is deprecated (declared at /usr/include/gtk-3.0/gtk/deprecated/gtkimagemenuitem.h:76): Use 'gtk_menu_item_new_with_mnemonic' instead [-Werror=deprecated-declarations]
s->reset_item = gtk_image_menu_item_new_with_mnemonic(_("_Reset"));
^
ui/gtk.c:1287:5: error: ‘gtk_image_menu_item_new_with_mnemonic’ is deprecated (declared at /usr/include/gtk-3.0/gtk/deprecated/gtkimagemenuitem.h:76): Use 'gtk_menu_item_new_with_mnemonic' instead [-Werror=deprecated-declarations]
s->powerdown_item = gtk_image_menu_item_new_with_mnemonic(_("Power _Down"));
Signed-off-by: Cole Robinson <crobinso at redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
diff --git a/ui/gtk.c b/ui/gtk.c
index 00fbbcc..a56678f 100644
--- a/ui/gtk.c
+++ b/ui/gtk.c
@@ -1362,10 +1362,10 @@ static GtkWidget *gd_create_menu_machine(GtkDisplayState *s, GtkAccelGroup *acce
separator = gtk_separator_menu_item_new();
gtk_menu_shell_append(GTK_MENU_SHELL(machine_menu), separator);
- s->reset_item = gtk_image_menu_item_new_with_mnemonic(_("_Reset"));
+ s->reset_item = gtk_menu_item_new_with_mnemonic(_("_Reset"));
gtk_menu_shell_append(GTK_MENU_SHELL(machine_menu), s->reset_item);
- s->powerdown_item = gtk_image_menu_item_new_with_mnemonic(_("Power _Down"));
+ s->powerdown_item = gtk_menu_item_new_with_mnemonic(_("Power _Down"));
gtk_menu_shell_append(GTK_MENU_SHELL(machine_menu), s->powerdown_item);
separator = gtk_separator_menu_item_new();
commit a3f4d63d63a2566928a1aec140989e16d969b684
Author: Cole Robinson <crobinso at redhat.com>
Date: Thu Apr 24 13:35:52 2014 -0400
configure: Re-run make if gtkabi/sdlabi is changed
Reconfiguring with a different --with-gtkabi or --with-sdlabi doesn't
trigger a remake. Generate an (unused) CONFIG_GTKABI/CONFIG_SDLABI
so config-host.h will actually give 'make' something to trigger on.
Signed-off-by: Cole Robinson <crobinso at redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
diff --git a/configure b/configure
index cb5ffa2..870c939 100755
--- a/configure
+++ b/configure
@@ -4350,6 +4350,7 @@ if test "$modules" = "yes"; then
fi
if test "$sdl" = "yes" ; then
echo "CONFIG_SDL=y" >> $config_host_mak
+ echo "CONFIG_SDLABI=$sdlabi" >> $config_host_mak
echo "SDL_CFLAGS=$sdl_cflags" >> $config_host_mak
fi
if test "$cocoa" = "yes" ; then
@@ -4433,6 +4434,7 @@ fi
echo "GLIB_CFLAGS=$glib_cflags" >> $config_host_mak
if test "$gtk" = "yes" ; then
echo "CONFIG_GTK=y" >> $config_host_mak
+ echo "CONFIG_GTKABI=$gtkabi" >> $config_host_mak
echo "GTK_CFLAGS=$gtk_cflags" >> $config_host_mak
fi
if test "$vte" = "yes" ; then
commit f92d61f336aa7dab9b47a831a9d1e0d44d3f5ce6
Author: Cole Robinson <crobinso at redhat.com>
Date: Mon Mar 17 16:06:23 2014 -0400
configure: Document --with-gtkabi
Signed-off-by: Cole Robinson <crobinso at redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
diff --git a/configure b/configure
index 2fbec59..cb5ffa2 100755
--- a/configure
+++ b/configure
@@ -1233,6 +1233,7 @@ Advanced options (experts only):
--with-sdlabi select preferred SDL ABI 1.2 or 2.0
--disable-gtk disable gtk UI
--enable-gtk enable gtk UI
+ --with-gtkabi select preferred GTK ABI 2.0 or 3.0
--disable-virtfs disable VirtFS
--enable-virtfs enable VirtFS
--disable-vnc disable VNC
commit 4843877e5d7d9ef4fdd29ac14ee1ce55531a0fc4
Author: Gerd Hoffmann <kraxel at redhat.com>
Date: Thu Apr 17 12:43:26 2014 +0200
hda-audio: fix non-mixer codecs
They don't advertise mixer support, but still allow the guest change
mixer settings. Add a check to avoid it.
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
diff --git a/hw/audio/hda-codec.c b/hw/audio/hda-codec.c
index a67ca91..48c6ead 100644
--- a/hw/audio/hda-codec.c
+++ b/hw/audio/hda-codec.c
@@ -261,6 +261,9 @@ static void hda_audio_set_amp(HDAAudioStream *st)
left = left * 255 / QEMU_HDA_AMP_STEPS;
right = right * 255 / QEMU_HDA_AMP_STEPS;
+ if (!st->state->mixer) {
+ return;
+ }
if (st->output) {
AUD_set_volume_out(st->voice.out, muted, left, right);
} else {
commit 5f6979cba9f63480d38e9deb72b565c6781ac0e8
Author: Jeff Cody <jcody at redhat.com>
Date: Mon Apr 28 14:37:18 2014 -0400
block: Add '--version' option to qemu-img
This allows qemu-img to print out version information, without
needing to print the long help wall of text.
While there, perform some minor whitespace cleanup, and remove the
unused option_index variable in the call to getopt_long().
Reported-by: Eric Blake <eblake at redhat.com>
Signed-off-by: Jeff Cody <jcody at redhat.com>
Reviewed-by: Eric Blake <eblake at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/qemu-img.c b/qemu-img.c
index d884324..96f4463 100644
--- a/qemu-img.c
+++ b/qemu-img.c
@@ -33,6 +33,9 @@
#include "block/qapi.h"
#include <getopt.h>
+#define QEMU_IMG_VERSION "qemu-img version " QEMU_VERSION \
+ ", Copyright (c) 2004-2008 Fabrice Bellard\n"
+
typedef struct img_cmd_t {
const char *name;
int (*handler)(int argc, char **argv);
@@ -75,7 +78,7 @@ static void QEMU_NORETURN GCC_FMT_ATTR(1, 2) error_exit(const char *fmt, ...)
static void QEMU_NORETURN help(void)
{
const char *help_msg =
- "qemu-img version " QEMU_VERSION ", Copyright (c) 2004-2008 Fabrice Bellard\n"
+ QEMU_IMG_VERSION
"usage: qemu-img command [command options]\n"
"QEMU disk image utility\n"
"\n"
@@ -2790,9 +2793,9 @@ int main(int argc, char **argv)
const img_cmd_t *cmd;
const char *cmdname;
int c;
- int option_index = 0;
static const struct option long_options[] = {
{"help", no_argument, 0, 'h'},
+ {"version", no_argument, 0, 'v'},
{0, 0, 0, 0}
};
@@ -2811,17 +2814,21 @@ int main(int argc, char **argv)
cmdname = argv[1];
/* find the command */
- for(cmd = img_cmds; cmd->name != NULL; cmd++) {
+ for (cmd = img_cmds; cmd->name != NULL; cmd++) {
if (!strcmp(cmdname, cmd->name)) {
return cmd->handler(argc - 1, argv + 1);
}
}
- c = getopt_long(argc, argv, "h", long_options, &option_index);
+ c = getopt_long(argc, argv, "h", long_options, NULL);
if (c == 'h') {
help();
}
+ if (c == 'v') {
+ printf(QEMU_IMG_VERSION);
+ return 0;
+ }
/* not found */
error_exit("Command not found: %s", cmdname);
commit ebd0c614d77898741c1ec70b5c5ca3f263253da3
Author: Richard Henderson <rth at twiddle.net>
Date: Mon Mar 17 11:10:59 2014 -0700
tcg-sparc: Accept stores of zero
Signed-off-by: Richard Henderson <rth at twiddle.net>
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 1526f2c..5468ff5 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -1470,8 +1470,8 @@ static const TCGTargetOpDef sparc_op_defs[] = {
{ INDEX_op_qemu_ld_i32, { "r", "A" } },
{ INDEX_op_qemu_ld_i64, { "R", "A" } },
- { INDEX_op_qemu_st_i32, { "s", "A" } },
- { INDEX_op_qemu_st_i64, { "S", "A" } },
+ { INDEX_op_qemu_st_i32, { "sZ", "A" } },
+ { INDEX_op_qemu_st_i64, { "SZ", "A" } },
{ -1 },
};
commit 035b2398264d4b8838d66a8360ca6091f1a107e9
Author: Richard Henderson <rth at twiddle.net>
Date: Thu Mar 6 16:06:24 2014 -0800
tcg-sparc: Fix small 32-bit movi
We tested imm13 before discarding garbage high bits.
Signed-off-by: Richard Henderson <rth at twiddle.net>
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index a977c57..1526f2c 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -432,6 +432,11 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
{
tcg_target_long hi, lo = (int32_t)arg;
+ /* Make sure we test 32-bit constants for imm13 properly. */
+ if (type == TCG_TYPE_I32) {
+ arg = lo;
+ }
+
/* A 13-bit constant sign-extended to 64-bits. */
if (check_fit_tl(arg, 13)) {
tcg_out_movi_imm13(s, ret, arg);
commit 35e2da1556555b1d56816dfcea4306f5c41c6dbe
Author: Richard Henderson <rth at twiddle.net>
Date: Thu Mar 6 15:12:48 2014 -0800
tcg-sparc: Fixup function argument types
Use TCGReg everywhere appropriate. Use int32_t for all arguments
that may be registers or immediate constants. Merge tcg_out_addi
into its only caller.
Signed-off-by: Richard Henderson <rth at twiddle.net>
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 655e435..a977c57 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -390,22 +390,20 @@ static inline int tcg_target_const_match(tcg_target_long val, TCGType type,
}
}
-static inline void tcg_out_arith(TCGContext *s, int rd, int rs1, int rs2,
- int op)
+static inline void tcg_out_arith(TCGContext *s, TCGReg rd, TCGReg rs1,
+ TCGReg rs2, int op)
{
- tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1) |
- INSN_RS2(rs2));
+ tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1) | INSN_RS2(rs2));
}
-static inline void tcg_out_arithi(TCGContext *s, int rd, int rs1,
- uint32_t offset, int op)
+static inline void tcg_out_arithi(TCGContext *s, TCGReg rd, TCGReg rs1,
+ int32_t offset, int op)
{
- tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1) |
- INSN_IMM13(offset));
+ tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1) | INSN_IMM13(offset));
}
-static void tcg_out_arithc(TCGContext *s, int rd, int rs1,
- int val2, int val2const, int op)
+static void tcg_out_arithc(TCGContext *s, TCGReg rd, TCGReg rs1,
+ int32_t val2, int val2const, int op)
{
tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1)
| (val2const ? INSN_IMM13(val2) : INSN_RS2(val2)));
@@ -419,12 +417,12 @@ static inline void tcg_out_mov(TCGContext *s, TCGType type,
}
}
-static inline void tcg_out_sethi(TCGContext *s, int ret, uint32_t arg)
+static inline void tcg_out_sethi(TCGContext *s, TCGReg ret, uint32_t arg)
{
tcg_out32(s, SETHI | INSN_RD(ret) | ((arg & 0xfffffc00) >> 10));
}
-static inline void tcg_out_movi_imm13(TCGContext *s, int ret, uint32_t arg)
+static inline void tcg_out_movi_imm13(TCGContext *s, TCGReg ret, int32_t arg)
{
tcg_out_arithi(s, ret, TCG_REG_G0, arg, ARITH_OR);
}
@@ -471,14 +469,14 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
}
}
-static inline void tcg_out_ldst_rr(TCGContext *s, int data, int a1,
- int a2, int op)
+static inline void tcg_out_ldst_rr(TCGContext *s, TCGReg data, TCGReg a1,
+ TCGReg a2, int op)
{
tcg_out32(s, op | INSN_RD(data) | INSN_RS1(a1) | INSN_RS2(a2));
}
-static inline void tcg_out_ldst(TCGContext *s, int ret, int addr,
- int offset, int op)
+static void tcg_out_ldst(TCGContext *s, TCGReg ret, TCGReg addr,
+ intptr_t offset, int op)
{
if (check_fit_ptr(offset, 13)) {
tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(addr) |
@@ -501,40 +499,24 @@ static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
tcg_out_ldst(s, arg, arg1, arg2, (type == TCG_TYPE_I32 ? STW : STX));
}
-static inline void tcg_out_ld_ptr(TCGContext *s, TCGReg ret, uintptr_t arg)
+static void tcg_out_ld_ptr(TCGContext *s, TCGReg ret, uintptr_t arg)
{
- TCGReg base = TCG_REG_G0;
- if (!check_fit_ptr(arg, 10)) {
- tcg_out_movi(s, TCG_TYPE_PTR, ret, arg & ~0x3ff);
- base = ret;
- }
- tcg_out_ld(s, TCG_TYPE_PTR, ret, base, arg & 0x3ff);
+ tcg_out_movi(s, TCG_TYPE_PTR, ret, arg & ~0x3ff);
+ tcg_out_ld(s, TCG_TYPE_PTR, ret, ret, arg & 0x3ff);
}
-static inline void tcg_out_sety(TCGContext *s, int rs)
+static inline void tcg_out_sety(TCGContext *s, TCGReg rs)
{
tcg_out32(s, WRY | INSN_RS1(TCG_REG_G0) | INSN_RS2(rs));
}
-static inline void tcg_out_rdy(TCGContext *s, int rd)
+static inline void tcg_out_rdy(TCGContext *s, TCGReg rd)
{
tcg_out32(s, RDY | INSN_RD(rd));
}
-static inline void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)
-{
- if (val != 0) {
- if (check_fit_tl(val, 13))
- tcg_out_arithi(s, reg, reg, val, ARITH_ADD);
- else {
- tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_T1, val);
- tcg_out_arith(s, reg, reg, TCG_REG_T1, ARITH_ADD);
- }
- }
-}
-
-static void tcg_out_div32(TCGContext *s, int rd, int rs1,
- int val2, int val2const, int uns)
+static void tcg_out_div32(TCGContext *s, TCGReg rd, TCGReg rs1,
+ int32_t val2, int val2const, int uns)
{
/* Load Y with the sign/zero extension of RS1 to 64-bits. */
if (uns) {
@@ -595,37 +577,37 @@ static void tcg_out_bpcc(TCGContext *s, int scond, int flags, int label)
tcg_out_bpcc0(s, scond, flags, off19);
}
-static void tcg_out_cmp(TCGContext *s, TCGArg c1, TCGArg c2, int c2const)
+static void tcg_out_cmp(TCGContext *s, TCGReg c1, int32_t c2, int c2const)
{
tcg_out_arithc(s, TCG_REG_G0, c1, c2, c2const, ARITH_SUBCC);
}
-static void tcg_out_brcond_i32(TCGContext *s, TCGCond cond, TCGArg arg1,
- TCGArg arg2, int const_arg2, int label)
+static void tcg_out_brcond_i32(TCGContext *s, TCGCond cond, TCGReg arg1,
+ int32_t arg2, int const_arg2, int label)
{
tcg_out_cmp(s, arg1, arg2, const_arg2);
tcg_out_bpcc(s, tcg_cond_to_bcond[cond], BPCC_ICC | BPCC_PT, label);
tcg_out_nop(s);
}
-static void tcg_out_movcc(TCGContext *s, TCGCond cond, int cc, TCGArg ret,
- TCGArg v1, int v1const)
+static void tcg_out_movcc(TCGContext *s, TCGCond cond, int cc, TCGReg ret,
+ int32_t v1, int v1const)
{
tcg_out32(s, ARITH_MOVCC | cc | INSN_RD(ret)
| INSN_RS1(tcg_cond_to_bcond[cond])
| (v1const ? INSN_IMM11(v1) : INSN_RS2(v1)));
}
-static void tcg_out_movcond_i32(TCGContext *s, TCGCond cond, TCGArg ret,
- TCGArg c1, TCGArg c2, int c2const,
- TCGArg v1, int v1const)
+static void tcg_out_movcond_i32(TCGContext *s, TCGCond cond, TCGReg ret,
+ TCGReg c1, int32_t c2, int c2const,
+ int32_t v1, int v1const)
{
tcg_out_cmp(s, c1, c2, c2const);
tcg_out_movcc(s, cond, MOVCC_ICC, ret, v1, v1const);
}
-static void tcg_out_brcond_i64(TCGContext *s, TCGCond cond, TCGArg arg1,
- TCGArg arg2, int const_arg2, int label)
+static void tcg_out_brcond_i64(TCGContext *s, TCGCond cond, TCGReg arg1,
+ int32_t arg2, int const_arg2, int label)
{
/* For 64-bit signed comparisons vs zero, we can avoid the compare. */
if (arg2 == 0 && !is_unsigned_cond(cond)) {
@@ -648,23 +630,23 @@ static void tcg_out_brcond_i64(TCGContext *s, TCGCond cond, TCGArg arg1,
tcg_out_nop(s);
}
-static void tcg_out_movr(TCGContext *s, TCGCond cond, TCGArg ret, TCGArg c1,
- TCGArg v1, int v1const)
+static void tcg_out_movr(TCGContext *s, TCGCond cond, TCGReg ret, TCGReg c1,
+ int32_t v1, int v1const)
{
tcg_out32(s, ARITH_MOVR | INSN_RD(ret) | INSN_RS1(c1)
| (tcg_cond_to_rcond[cond] << 10)
| (v1const ? INSN_IMM10(v1) : INSN_RS2(v1)));
}
-static void tcg_out_movcond_i64(TCGContext *s, TCGCond cond, TCGArg ret,
- TCGArg c1, TCGArg c2, int c2const,
- TCGArg v1, int v1const)
+static void tcg_out_movcond_i64(TCGContext *s, TCGCond cond, TCGReg ret,
+ TCGReg c1, int32_t c2, int c2const,
+ int32_t v1, int v1const)
{
/* For 64-bit signed comparisons vs zero, we can avoid the compare.
Note that the immediate range is one bit smaller, so we must check
for that as well. */
if (c2 == 0 && !is_unsigned_cond(cond)
- && (!v1const || check_fit_tl(v1, 10))) {
+ && (!v1const || check_fit_i32(v1, 10))) {
tcg_out_movr(s, cond, ret, c1, v1, v1const);
} else {
tcg_out_cmp(s, c1, c2, c2const);
@@ -672,8 +654,8 @@ static void tcg_out_movcond_i64(TCGContext *s, TCGCond cond, TCGArg ret,
}
}
-static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGArg ret,
- TCGArg c1, TCGArg c2, int c2const)
+static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGReg ret,
+ TCGReg c1, int32_t c2, int c2const)
{
/* For 32-bit comparisons, we can play games with ADDX/SUBX. */
switch (cond) {
@@ -698,7 +680,7 @@ static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGArg ret,
swap the operands on GTU/LEU. There's no benefit to loading
the constant into a temporary register. */
if (!c2const || c2 == 0) {
- TCGArg t = c1;
+ TCGReg t = c1;
c1 = c2;
c2 = t;
c2const = 0;
@@ -722,8 +704,8 @@ static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGArg ret,
}
}
-static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGArg ret,
- TCGArg c1, TCGArg c2, int c2const)
+static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGReg ret,
+ TCGReg c1, int32_t c2, int c2const)
{
/* For 64-bit signed comparisons vs zero, we can avoid the compare
if the input does not overlap the output. */
@@ -737,11 +719,11 @@ static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGArg ret,
}
}
-static void tcg_out_addsub2(TCGContext *s, TCGArg rl, TCGArg rh,
- TCGArg al, TCGArg ah, TCGArg bl, int blconst,
- TCGArg bh, int bhconst, int opl, int oph)
+static void tcg_out_addsub2(TCGContext *s, TCGReg rl, TCGReg rh,
+ TCGReg al, TCGReg ah, int32_t bl, int blconst,
+ int32_t bh, int bhconst, int opl, int oph)
{
- TCGArg tmp = TCG_REG_T1;
+ TCGReg tmp = TCG_REG_T1;
/* Note that the low parts are fully consumed before tmp is set. */
if (rl != ah && (bhconst || rl != bh)) {
@@ -753,7 +735,7 @@ static void tcg_out_addsub2(TCGContext *s, TCGArg rl, TCGArg rh,
tcg_out_mov(s, TCG_TYPE_I32, rl, tmp);
}
-static inline void tcg_out_calli(TCGContext *s, uintptr_t dest)
+static void tcg_out_calli(TCGContext *s, uintptr_t dest)
{
intptr_t disp = dest - (uintptr_t)s->code_ptr;
@@ -960,7 +942,10 @@ static TCGReg tcg_out_tlb_load(TCGContext *s, TCGReg addr, int mem_index,
/* Find a base address that can load both tlb comparator and addend. */
tlb_ofs = offsetof(CPUArchState, tlb_table[mem_index][0]);
if (!check_fit_ptr(tlb_ofs + sizeof(CPUTLBEntry), 13)) {
- tcg_out_addi(s, r1, tlb_ofs & ~0x3ff);
+ if (tlb_ofs & ~0x3ff) {
+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_T1, tlb_ofs & ~0x3ff);
+ tcg_out_arith(s, r1, r1, TCG_REG_T1, ARITH_ADD);
+ }
tlb_ofs &= 0x3ff;
}
commit b357f902bff6811dda91072ab43d1426f10602b2
Author: Richard Henderson <rth at twiddle.net>
Date: Thu Mar 6 14:21:26 2014 -0800
tcg-sparc: Hoist common argument loads in tcg_out_op
Signed-off-by: Richard Henderson <rth at twiddle.net>
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index d5d1761..655e435 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -1142,49 +1142,56 @@ static void tcg_out_qemu_st(TCGContext *s, TCGReg data, TCGReg addr,
#endif /* CONFIG_SOFTMMU */
}
-static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
- const int *const_args)
+static void tcg_out_op(TCGContext *s, TCGOpcode opc,
+ const TCGArg args[TCG_MAX_OP_ARGS],
+ const int const_args[TCG_MAX_OP_ARGS])
{
- int c;
+ TCGArg a0, a1, a2;
+ int c, c2;
+
+ /* Hoist the loads of the most common arguments. */
+ a0 = args[0];
+ a1 = args[1];
+ a2 = args[2];
+ c2 = const_args[2];
switch (opc) {
case INDEX_op_exit_tb:
- if (check_fit_ptr(args[0], 13)) {
+ if (check_fit_ptr(a0, 13)) {
tcg_out_arithi(s, TCG_REG_G0, TCG_REG_I7, 8, RETURN);
- tcg_out_movi_imm13(s, TCG_REG_O0, args[0]);
+ tcg_out_movi_imm13(s, TCG_REG_O0, a0);
} else {
- tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_I0, args[0] & ~0x3ff);
+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_I0, a0 & ~0x3ff);
tcg_out_arithi(s, TCG_REG_G0, TCG_REG_I7, 8, RETURN);
- tcg_out_arithi(s, TCG_REG_O0, TCG_REG_O0,
- args[0] & 0x3ff, ARITH_OR);
+ tcg_out_arithi(s, TCG_REG_O0, TCG_REG_O0, a0 & 0x3ff, ARITH_OR);
}
break;
case INDEX_op_goto_tb:
if (s->tb_jmp_offset) {
/* direct jump method */
uint32_t old_insn = *(uint32_t *)s->code_ptr;
- s->tb_jmp_offset[args[0]] = s->code_ptr - s->code_buf;
+ s->tb_jmp_offset[a0] = s->code_ptr - s->code_buf;
/* Make sure to preserve links during retranslation. */
tcg_out32(s, CALL | (old_insn & ~INSN_OP(-1)));
} else {
/* indirect jump method */
- tcg_out_ld_ptr(s, TCG_REG_T1, (uintptr_t)(s->tb_next + args[0]));
+ tcg_out_ld_ptr(s, TCG_REG_T1, (uintptr_t)(s->tb_next + a0));
tcg_out_arithi(s, TCG_REG_G0, TCG_REG_T1, 0, JMPL);
}
tcg_out_nop(s);
- s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf;
+ s->tb_next_offset[a0] = s->code_ptr - s->code_buf;
break;
case INDEX_op_call:
if (const_args[0]) {
- tcg_out_calli(s, args[0]);
+ tcg_out_calli(s, a0);
} else {
- tcg_out_arithi(s, TCG_REG_O7, args[0], 0, JMPL);
+ tcg_out_arithi(s, TCG_REG_O7, a0, 0, JMPL);
}
/* delay slot */
tcg_out_nop(s);
break;
case INDEX_op_br:
- tcg_out_bpcc(s, COND_A, BPCC_PT, args[0]);
+ tcg_out_bpcc(s, COND_A, BPCC_PT, a0);
tcg_out_nop(s);
break;
@@ -1193,30 +1200,30 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
glue(glue(case INDEX_op_, x), _i64)
OP_32_64(ld8u):
- tcg_out_ldst(s, args[0], args[1], args[2], LDUB);
+ tcg_out_ldst(s, a0, a1, a2, LDUB);
break;
OP_32_64(ld8s):
- tcg_out_ldst(s, args[0], args[1], args[2], LDSB);
+ tcg_out_ldst(s, a0, a1, a2, LDSB);
break;
OP_32_64(ld16u):
- tcg_out_ldst(s, args[0], args[1], args[2], LDUH);
+ tcg_out_ldst(s, a0, a1, a2, LDUH);
break;
OP_32_64(ld16s):
- tcg_out_ldst(s, args[0], args[1], args[2], LDSH);
+ tcg_out_ldst(s, a0, a1, a2, LDSH);
break;
case INDEX_op_ld_i32:
case INDEX_op_ld32u_i64:
- tcg_out_ldst(s, args[0], args[1], args[2], LDUW);
+ tcg_out_ldst(s, a0, a1, a2, LDUW);
break;
OP_32_64(st8):
- tcg_out_ldst(s, args[0], args[1], args[2], STB);
+ tcg_out_ldst(s, a0, a1, a2, STB);
break;
OP_32_64(st16):
- tcg_out_ldst(s, args[0], args[1], args[2], STH);
+ tcg_out_ldst(s, a0, a1, a2, STH);
break;
case INDEX_op_st_i32:
case INDEX_op_st32_i64:
- tcg_out_ldst(s, args[0], args[1], args[2], STW);
+ tcg_out_ldst(s, a0, a1, a2, STW);
break;
OP_32_64(add):
c = ARITH_ADD;
@@ -1243,7 +1250,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
c = SHIFT_SLL;
do_shift32:
/* Limit immediate shift count lest we create an illegal insn. */
- tcg_out_arithc(s, args[0], args[1], args[2] & 31, const_args[2], c);
+ tcg_out_arithc(s, a0, a1, a2 & 31, c2, c);
break;
case INDEX_op_shr_i32:
c = SHIFT_SRL;
@@ -1263,34 +1270,29 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
goto gen_arith1;
case INDEX_op_div_i32:
- tcg_out_div32(s, args[0], args[1], args[2], const_args[2], 0);
+ tcg_out_div32(s, a0, a1, a2, c2, 0);
break;
case INDEX_op_divu_i32:
- tcg_out_div32(s, args[0], args[1], args[2], const_args[2], 1);
+ tcg_out_div32(s, a0, a1, a2, c2, 1);
break;
case INDEX_op_brcond_i32:
- tcg_out_brcond_i32(s, args[2], args[0], args[1], const_args[1],
- args[3]);
+ tcg_out_brcond_i32(s, a2, a0, a1, const_args[1], args[3]);
break;
case INDEX_op_setcond_i32:
- tcg_out_setcond_i32(s, args[3], args[0], args[1],
- args[2], const_args[2]);
+ tcg_out_setcond_i32(s, args[3], a0, a1, a2, c2);
break;
case INDEX_op_movcond_i32:
- tcg_out_movcond_i32(s, args[5], args[0], args[1],
- args[2], const_args[2], args[3], const_args[3]);
+ tcg_out_movcond_i32(s, args[5], a0, a1, a2, c2, args[3], const_args[3]);
break;
case INDEX_op_add2_i32:
- tcg_out_addsub2(s, args[0], args[1], args[2], args[3],
- args[4], const_args[4], args[5], const_args[5],
- ARITH_ADDCC, ARITH_ADDX);
+ tcg_out_addsub2(s, a0, a1, a2, args[3], args[4], const_args[4],
+ args[5], const_args[5], ARITH_ADDCC, ARITH_ADDX);
break;
case INDEX_op_sub2_i32:
- tcg_out_addsub2(s, args[0], args[1], args[2], args[3],
- args[4], const_args[4], args[5], const_args[5],
- ARITH_SUBCC, ARITH_SUBX);
+ tcg_out_addsub2(s, a0, a1, a2, args[3], args[4], const_args[4],
+ args[5], const_args[5], ARITH_SUBCC, ARITH_SUBX);
break;
case INDEX_op_mulu2_i32:
c = ARITH_UMUL;
@@ -1300,41 +1302,39 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
do_mul2:
/* The 32-bit multiply insns produce a full 64-bit result. If the
destination register can hold it, we can avoid the slower RDY. */
- tcg_out_arithc(s, args[0], args[2], args[3], const_args[3], c);
- if (SPARC64 || args[0] <= TCG_REG_O7) {
- tcg_out_arithi(s, args[1], args[0], 32, SHIFT_SRLX);
+ tcg_out_arithc(s, a0, a2, args[3], const_args[3], c);
+ if (SPARC64 || a0 <= TCG_REG_O7) {
+ tcg_out_arithi(s, a1, a0, 32, SHIFT_SRLX);
} else {
- tcg_out_rdy(s, args[1]);
+ tcg_out_rdy(s, a1);
}
break;
case INDEX_op_qemu_ld_i32:
- tcg_out_qemu_ld(s, args[0], args[1], args[2], args[3], false);
+ tcg_out_qemu_ld(s, a0, a1, a2, args[3], false);
break;
case INDEX_op_qemu_ld_i64:
- tcg_out_qemu_ld(s, args[0], args[1], args[2], args[3], true);
+ tcg_out_qemu_ld(s, a0, a1, a2, args[3], true);
break;
case INDEX_op_qemu_st_i32:
- tcg_out_qemu_st(s, args[0], args[1], args[2], args[3]);
- break;
case INDEX_op_qemu_st_i64:
- tcg_out_qemu_st(s, args[0], args[1], args[2], args[3]);
+ tcg_out_qemu_st(s, a0, a1, a2, args[3]);
break;
case INDEX_op_ld32s_i64:
- tcg_out_ldst(s, args[0], args[1], args[2], LDSW);
+ tcg_out_ldst(s, a0, a1, a2, LDSW);
break;
case INDEX_op_ld_i64:
- tcg_out_ldst(s, args[0], args[1], args[2], LDX);
+ tcg_out_ldst(s, a0, a1, a2, LDX);
break;
case INDEX_op_st_i64:
- tcg_out_ldst(s, args[0], args[1], args[2], STX);
+ tcg_out_ldst(s, a0, a1, a2, STX);
break;
case INDEX_op_shl_i64:
c = SHIFT_SLLX;
do_shift64:
/* Limit immediate shift count lest we create an illegal insn. */
- tcg_out_arithc(s, args[0], args[1], args[2] & 63, const_args[2], c);
+ tcg_out_arithc(s, a0, a1, a2 & 63, c2, c);
break;
case INDEX_op_shr_i64:
c = SHIFT_SRLX;
@@ -1352,38 +1352,35 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
c = ARITH_UDIVX;
goto gen_arith;
case INDEX_op_ext32s_i64:
- tcg_out_arithi(s, args[0], args[1], 0, SHIFT_SRA);
+ tcg_out_arithi(s, a0, a1, 0, SHIFT_SRA);
break;
case INDEX_op_ext32u_i64:
- tcg_out_arithi(s, args[0], args[1], 0, SHIFT_SRL);
+ tcg_out_arithi(s, a0, a1, 0, SHIFT_SRL);
break;
case INDEX_op_trunc_shr_i32:
- if (args[2] == 0) {
- tcg_out_mov(s, TCG_TYPE_I32, args[0], args[1]);
+ if (a2 == 0) {
+ tcg_out_mov(s, TCG_TYPE_I32, a0, a1);
} else {
- tcg_out_arithi(s, args[0], args[1], args[2], SHIFT_SRLX);
+ tcg_out_arithi(s, a0, a1, a2, SHIFT_SRLX);
}
break;
case INDEX_op_brcond_i64:
- tcg_out_brcond_i64(s, args[2], args[0], args[1], const_args[1],
- args[3]);
+ tcg_out_brcond_i64(s, a2, a0, a1, const_args[1], args[3]);
break;
case INDEX_op_setcond_i64:
- tcg_out_setcond_i64(s, args[3], args[0], args[1],
- args[2], const_args[2]);
+ tcg_out_setcond_i64(s, args[3], a0, a1, a2, c2);
break;
case INDEX_op_movcond_i64:
- tcg_out_movcond_i64(s, args[5], args[0], args[1],
- args[2], const_args[2], args[3], const_args[3]);
+ tcg_out_movcond_i64(s, args[5], a0, a1, a2, c2, args[3], const_args[3]);
break;
gen_arith:
- tcg_out_arithc(s, args[0], args[1], args[2], const_args[2], c);
+ tcg_out_arithc(s, a0, a1, a2, c2, c);
break;
gen_arith1:
- tcg_out_arithc(s, args[0], TCG_REG_G0, args[1], const_args[1], c);
+ tcg_out_arithc(s, a0, TCG_REG_G0, a1, const_args[1], c);
break;
case INDEX_op_mov_i64:
commit 98b90bab3f1368bfa1e99c3c613ce5073b07ef4f
Author: Richard Henderson <rth at twiddle.net>
Date: Thu Mar 6 14:16:26 2014 -0800
tcg-sparc: Don't handle mov/movi in tcg_out_op
Signed-off-by: Richard Henderson <rth at twiddle.net>
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index af9673f..d5d1761 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -1187,9 +1187,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
tcg_out_bpcc(s, COND_A, BPCC_PT, args[0]);
tcg_out_nop(s);
break;
- case INDEX_op_movi_i32:
- tcg_out_movi(s, TCG_TYPE_I32, args[0], (uint32_t)args[1]);
- break;
#define OP_32_64(x) \
glue(glue(case INDEX_op_, x), _i32): \
@@ -1324,9 +1321,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
tcg_out_qemu_st(s, args[0], args[1], args[2], args[3]);
break;
- case INDEX_op_movi_i64:
- tcg_out_movi(s, TCG_TYPE_I64, args[0], args[1]);
- break;
case INDEX_op_ld32s_i64:
tcg_out_ldst(s, args[0], args[1], args[2], LDSW);
break;
@@ -1392,8 +1386,13 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
tcg_out_arithc(s, args[0], TCG_REG_G0, args[1], const_args[1], c);
break;
+ case INDEX_op_mov_i64:
+ case INDEX_op_mov_i32:
+ case INDEX_op_movi_i64:
+ case INDEX_op_movi_i32:
+ /* Always implemented with tcg_out_mov/i, never with tcg_out_op. */
default:
- fprintf(stderr, "unknown opcode 0x%x\n", opc);
+ /* Opcode not implemented. */
tcg_abort();
}
}
commit 425532d71d5d295cc9c649500e4969ac621ce51d
Author: Richard Henderson <rth at twiddle.net>
Date: Thu Mar 6 13:44:15 2014 -0800
tcg-sparc: Tidy check_fit_* tests
Use sextract instead of raw bit shifting for the tests. Introduce
a new check_fit_ptr macro to make it clear we're looking at pointers.
Signed-off-by: Richard Henderson <rth at twiddle.net>
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 5ae80c2..af9673f 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -262,17 +262,23 @@ static const int tcg_target_call_oarg_regs[] = {
#define STW_LE (STWA | INSN_ASI(ASI_PRIMARY_LITTLE))
#define STX_LE (STXA | INSN_ASI(ASI_PRIMARY_LITTLE))
-static inline int check_fit_tl(tcg_target_long val, unsigned int bits)
+static inline int check_fit_i64(int64_t val, unsigned int bits)
{
- return (val << ((sizeof(tcg_target_long) * 8 - bits))
- >> (sizeof(tcg_target_long) * 8 - bits)) == val;
+ return val == sextract64(val, 0, bits);
}
-static inline int check_fit_i32(uint32_t val, unsigned int bits)
+static inline int check_fit_i32(int32_t val, unsigned int bits)
{
- return ((val << (32 - bits)) >> (32 - bits)) == val;
+ return val == sextract32(val, 0, bits);
}
+#define check_fit_tl check_fit_i64
+#if SPARC64
+# define check_fit_ptr check_fit_i64
+#else
+# define check_fit_ptr check_fit_i32
+#endif
+
static void patch_reloc(uint8_t *code_ptr, int type,
intptr_t value, intptr_t addend)
{
@@ -287,7 +293,7 @@ static void patch_reloc(uint8_t *code_ptr, int type,
break;
case R_SPARC_WDISP16:
value -= (intptr_t)code_ptr;
- if (!check_fit_tl(value >> 2, 16)) {
+ if (!check_fit_ptr(value >> 2, 16)) {
tcg_abort();
}
insn = *(uint32_t *)code_ptr;
@@ -297,7 +303,7 @@ static void patch_reloc(uint8_t *code_ptr, int type,
break;
case R_SPARC_WDISP19:
value -= (intptr_t)code_ptr;
- if (!check_fit_tl(value >> 2, 19)) {
+ if (!check_fit_ptr(value >> 2, 19)) {
tcg_abort();
}
insn = *(uint32_t *)code_ptr;
@@ -426,7 +432,7 @@ static inline void tcg_out_movi_imm13(TCGContext *s, int ret, uint32_t arg)
static void tcg_out_movi(TCGContext *s, TCGType type,
TCGReg ret, tcg_target_long arg)
{
- tcg_target_long hi, lo;
+ tcg_target_long hi, lo = (int32_t)arg;
/* A 13-bit constant sign-extended to 64-bits. */
if (check_fit_tl(arg, 13)) {
@@ -444,15 +450,14 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
}
/* A 32-bit constant sign-extended to 64-bits. */
- if (check_fit_tl(arg, 32)) {
+ if (arg == lo) {
tcg_out_sethi(s, ret, ~arg);
tcg_out_arithi(s, ret, ret, (arg & 0x3ff) | -0x400, ARITH_XOR);
return;
}
/* A 64-bit constant decomposed into 2 32-bit pieces. */
- lo = (int32_t)arg;
- if (check_fit_tl(lo, 13)) {
+ if (check_fit_i32(lo, 13)) {
hi = (arg - lo) >> 32;
tcg_out_movi(s, TCG_TYPE_I32, ret, hi);
tcg_out_arithi(s, ret, ret, 32, SHIFT_SLLX);
@@ -475,7 +480,7 @@ static inline void tcg_out_ldst_rr(TCGContext *s, int data, int a1,
static inline void tcg_out_ldst(TCGContext *s, int ret, int addr,
int offset, int op)
{
- if (check_fit_tl(offset, 13)) {
+ if (check_fit_ptr(offset, 13)) {
tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(addr) |
INSN_IMM13(offset));
} else {
@@ -499,7 +504,7 @@ static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
static inline void tcg_out_ld_ptr(TCGContext *s, TCGReg ret, uintptr_t arg)
{
TCGReg base = TCG_REG_G0;
- if (!check_fit_tl(arg, 10)) {
+ if (!check_fit_ptr(arg, 10)) {
tcg_out_movi(s, TCG_TYPE_PTR, ret, arg & ~0x3ff);
base = ret;
}
@@ -954,7 +959,7 @@ static TCGReg tcg_out_tlb_load(TCGContext *s, TCGReg addr, int mem_index,
/* Find a base address that can load both tlb comparator and addend. */
tlb_ofs = offsetof(CPUArchState, tlb_table[mem_index][0]);
- if (!check_fit_tl(tlb_ofs + sizeof(CPUTLBEntry), 13)) {
+ if (!check_fit_ptr(tlb_ofs + sizeof(CPUTLBEntry), 13)) {
tcg_out_addi(s, r1, tlb_ofs & ~0x3ff);
tlb_ofs &= 0x3ff;
}
@@ -1144,7 +1149,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
switch (opc) {
case INDEX_op_exit_tb:
- if (check_fit_tl(args[0], 13)) {
+ if (check_fit_ptr(args[0], 13)) {
tcg_out_arithi(s, TCG_REG_G0, TCG_REG_I7, 8, RETURN);
tcg_out_movi_imm13(s, TCG_REG_O0, args[0]);
} else {
commit f4c166619ed433e43bdc77ceeb0fbc2832915725
Author: Richard Henderson <rth at twiddle.net>
Date: Thu Mar 6 11:46:11 2014 -0800
tcg-sparc: Implement muls2_i32
Using the 32-bit SMUL is a tad more efficient than
resorting to extending and using the 64-bit MULX.
Signed-off-by: Richard Henderson <rth at twiddle.net>
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index b4a15af..5ae80c2 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -200,6 +200,7 @@ static const int tcg_target_call_oarg_regs[] = {
#define ARITH_ADDX (INSN_OP(2) | INSN_OP3(0x08))
#define ARITH_SUBX (INSN_OP(2) | INSN_OP3(0x0c))
#define ARITH_UMUL (INSN_OP(2) | INSN_OP3(0x0a))
+#define ARITH_SMUL (INSN_OP(2) | INSN_OP3(0x0b))
#define ARITH_UDIV (INSN_OP(2) | INSN_OP3(0x0e))
#define ARITH_SDIV (INSN_OP(2) | INSN_OP3(0x0f))
#define ARITH_MULX (INSN_OP(2) | INSN_OP3(0x09))
@@ -1290,9 +1291,19 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
ARITH_SUBCC, ARITH_SUBX);
break;
case INDEX_op_mulu2_i32:
- tcg_out_arithc(s, args[0], args[2], args[3], const_args[3],
- ARITH_UMUL);
- tcg_out_rdy(s, args[1]);
+ c = ARITH_UMUL;
+ goto do_mul2;
+ case INDEX_op_muls2_i32:
+ c = ARITH_SMUL;
+ do_mul2:
+ /* The 32-bit multiply insns produce a full 64-bit result. If the
+ destination register can hold it, we can avoid the slower RDY. */
+ tcg_out_arithc(s, args[0], args[2], args[3], const_args[3], c);
+ if (SPARC64 || args[0] <= TCG_REG_O7) {
+ tcg_out_arithi(s, args[1], args[0], 32, SHIFT_SRLX);
+ } else {
+ tcg_out_rdy(s, args[1]);
+ }
break;
case INDEX_op_qemu_ld_i32:
@@ -1424,6 +1435,7 @@ static const TCGTargetOpDef sparc_op_defs[] = {
{ INDEX_op_add2_i32, { "r", "r", "rZ", "rZ", "rJ", "rJ" } },
{ INDEX_op_sub2_i32, { "r", "r", "rZ", "rZ", "rJ", "rJ" } },
{ INDEX_op_mulu2_i32, { "r", "r", "rZ", "rJ" } },
+ { INDEX_op_muls2_i32, { "r", "r", "rZ", "rJ" } },
{ INDEX_op_mov_i64, { "R", "R" } },
{ INDEX_op_movi_i64, { "R" } },
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
index 8ce85f8..3a903db 100644
--- a/tcg/sparc/tcg-target.h
+++ b/tcg/sparc/tcg-target.h
@@ -106,7 +106,7 @@ typedef enum {
#define TCG_TARGET_HAS_add2_i32 1
#define TCG_TARGET_HAS_sub2_i32 1
#define TCG_TARGET_HAS_mulu2_i32 1
-#define TCG_TARGET_HAS_muls2_i32 0
+#define TCG_TARGET_HAS_muls2_i32 1
#define TCG_TARGET_HAS_muluh_i32 0
#define TCG_TARGET_HAS_mulsh_i32 0
commit 8b66eefe0d3c5eafba498157a2f6169c9828b77b
Author: Richard Henderson <rth at twiddle.net>
Date: Thu Mar 6 09:34:29 2014 -0800
tcg-sparc: Use the RETURN instruction
Saves one insn per TB exit over JMPL+RESTORE.
Signed-off-by: Richard Henderson <rth at twiddle.net>
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 86229d5..b4a15af 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -219,6 +219,7 @@ static const int tcg_target_call_oarg_regs[] = {
#define RDY (INSN_OP(2) | INSN_OP3(0x28) | INSN_RS1(0))
#define WRY (INSN_OP(2) | INSN_OP3(0x30) | INSN_RD(0))
#define JMPL (INSN_OP(2) | INSN_OP3(0x38))
+#define RETURN (INSN_OP(2) | INSN_OP3(0x39))
#define SAVE (INSN_OP(2) | INSN_OP3(0x3c))
#define RESTORE (INSN_OP(2) | INSN_OP3(0x3d))
#define SETHI (INSN_OP(0) | INSN_OP2(0x4))
@@ -1142,10 +1143,15 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
switch (opc) {
case INDEX_op_exit_tb:
- tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_I0, args[0]);
- tcg_out_arithi(s, TCG_REG_G0, TCG_REG_I7, 8, JMPL);
- tcg_out32(s, RESTORE | INSN_RD(TCG_REG_G0) | INSN_RS1(TCG_REG_G0) |
- INSN_RS2(TCG_REG_G0));
+ if (check_fit_tl(args[0], 13)) {
+ tcg_out_arithi(s, TCG_REG_G0, TCG_REG_I7, 8, RETURN);
+ tcg_out_movi_imm13(s, TCG_REG_O0, args[0]);
+ } else {
+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_I0, args[0] & ~0x3ff);
+ tcg_out_arithi(s, TCG_REG_G0, TCG_REG_I7, 8, RETURN);
+ tcg_out_arithi(s, TCG_REG_O0, TCG_REG_O0,
+ args[0] & 0x3ff, ARITH_OR);
+ }
break;
case INDEX_op_goto_tb:
if (s->tb_jmp_offset) {
commit 34b1a49cb11adf2a544e5737c1ea87499dd76d6c
Author: Richard Henderson <rth at twiddle.net>
Date: Tue Mar 4 13:39:48 2014 -0800
tcg-sparc: Use 64-bit registers with sparcv8plus
Quite a lot of effort was spent composing and decomposing 64-bit
quantities in registers, when we should just create them and leave
them as one 64-bit register.
Signed-off-by: Richard Henderson <rth at twiddle.net>
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 4287bbe..86229d5 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -67,6 +67,18 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
# define SPARC64 0
#endif
+/* Note that sparcv8plus can only hold 64 bit quantities in %g and %o
+ registers. These are saved manually by the kernel in full 64-bit
+ slots. The %i and %l registers are saved by the register window
+ mechanism, which only allocates space for 32 bits. Given that this
+ window spill/fill can happen on any signal, we must consider the
+ high bits of the %i and %l registers garbage at all times. */
+#if SPARC64
+# define ALL_64 0xffffffffu
+#else
+# define ALL_64 0xffffu
+#endif
+
/* Define some temporary registers. T2 is used for constant generation. */
#define TCG_REG_T1 TCG_REG_G1
#define TCG_REG_T2 TCG_REG_O7
@@ -307,14 +319,27 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
ct->ct |= TCG_CT_REG;
tcg_regset_set32(ct->u.regs, 0, 0xffffffff);
break;
- case 'L': /* qemu_ld/st constraint */
+ case 'R':
ct->ct |= TCG_CT_REG;
- tcg_regset_set32(ct->u.regs, 0, 0xffffffff);
- // Helper args
+ tcg_regset_set32(ct->u.regs, 0, ALL_64);
+ break;
+ case 'A': /* qemu_ld/st address constraint */
+ ct->ct |= TCG_CT_REG;
+ tcg_regset_set32(ct->u.regs, 0,
+ TARGET_LONG_BITS == 64 ? ALL_64 : 0xffffffff);
+ reserve_helpers:
tcg_regset_reset_reg(ct->u.regs, TCG_REG_O0);
tcg_regset_reset_reg(ct->u.regs, TCG_REG_O1);
tcg_regset_reset_reg(ct->u.regs, TCG_REG_O2);
break;
+ case 's': /* qemu_st data 32-bit constraint */
+ ct->ct |= TCG_CT_REG;
+ tcg_regset_set32(ct->u.regs, 0, 0xffffffff);
+ goto reserve_helpers;
+ case 'S': /* qemu_st data 64-bit constraint */
+ ct->ct |= TCG_CT_REG;
+ tcg_regset_set32(ct->u.regs, 0, ALL_64);
+ goto reserve_helpers;
case 'I':
ct->ct |= TCG_CT_CONST_S11;
break;
@@ -408,7 +433,7 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
}
/* A 32-bit constant, or 32-bit zero-extended to 64-bits. */
- if (type == TCG_TYPE_I32 || (arg & ~0xffffffffu) == 0) {
+ if (type == TCG_TYPE_I32 || arg == (uint32_t)arg) {
tcg_out_sethi(s, ret, arg);
if (arg & 0x3ff) {
tcg_out_arithi(s, ret, ret, arg & 0x3ff, ARITH_OR);
@@ -426,12 +451,12 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
/* A 64-bit constant decomposed into 2 32-bit pieces. */
lo = (int32_t)arg;
if (check_fit_tl(lo, 13)) {
- hi = (arg - lo) >> 31 >> 1;
+ hi = (arg - lo) >> 32;
tcg_out_movi(s, TCG_TYPE_I32, ret, hi);
tcg_out_arithi(s, ret, ret, 32, SHIFT_SLLX);
tcg_out_arithi(s, ret, ret, lo, ARITH_ADD);
} else {
- hi = arg >> 31 >> 1;
+ hi = arg >> 32;
tcg_out_movi(s, TCG_TYPE_I32, ret, hi);
tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_T2, lo);
tcg_out_arithi(s, ret, ret, 32, SHIFT_SLLX);
@@ -592,7 +617,6 @@ static void tcg_out_movcond_i32(TCGContext *s, TCGCond cond, TCGArg ret,
tcg_out_movcc(s, cond, MOVCC_ICC, ret, v1, v1const);
}
-#if SPARC64
static void tcg_out_brcond_i64(TCGContext *s, TCGCond cond, TCGArg arg1,
TCGArg arg2, int const_arg2, int label)
{
@@ -640,45 +664,6 @@ static void tcg_out_movcond_i64(TCGContext *s, TCGCond cond, TCGArg ret,
tcg_out_movcc(s, cond, MOVCC_XCC, ret, v1, v1const);
}
}
-#else
-static void tcg_out_brcond2_i32(TCGContext *s, TCGCond cond,
- TCGArg al, TCGArg ah,
- TCGArg bl, int blconst,
- TCGArg bh, int bhconst, int label_dest)
-{
- int scond, label_next = gen_new_label();
-
- tcg_out_cmp(s, ah, bh, bhconst);
-
- /* Note that we fill one of the delay slots with the second compare. */
- switch (cond) {
- case TCG_COND_EQ:
- tcg_out_bpcc(s, COND_NE, BPCC_ICC | BPCC_PT, label_next);
- tcg_out_cmp(s, al, bl, blconst);
- tcg_out_bpcc(s, COND_E, BPCC_ICC | BPCC_PT, label_dest);
- break;
-
- case TCG_COND_NE:
- tcg_out_bpcc(s, COND_NE, BPCC_ICC | BPCC_PT, label_dest);
- tcg_out_cmp(s, al, bl, blconst);
- tcg_out_bpcc(s, COND_NE, BPCC_ICC | BPCC_PT, label_dest);
- break;
-
- default:
- scond = tcg_cond_to_bcond[tcg_high_cond(cond)];
- tcg_out_bpcc(s, scond, BPCC_ICC | BPCC_PT, label_dest);
- tcg_out_nop(s);
- tcg_out_bpcc(s, COND_NE, BPCC_ICC | BPCC_PT, label_next);
- tcg_out_cmp(s, al, bl, blconst);
- scond = tcg_cond_to_bcond[tcg_unsigned_cond(cond)];
- tcg_out_bpcc(s, scond, BPCC_ICC | BPCC_PT, label_dest);
- break;
- }
- tcg_out_nop(s);
-
- tcg_out_label(s, label_next, s->code_ptr);
-}
-#endif
static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGArg ret,
TCGArg c1, TCGArg c2, int c2const)
@@ -730,7 +715,6 @@ static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGArg ret,
}
}
-#if SPARC64
static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGArg ret,
TCGArg c1, TCGArg c2, int c2const)
{
@@ -745,48 +729,6 @@ static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGArg ret,
tcg_out_movcc(s, cond, MOVCC_XCC, ret, 1, 1);
}
}
-#else
-static void tcg_out_setcond2_i32(TCGContext *s, TCGCond cond, TCGArg ret,
- TCGArg al, TCGArg ah,
- TCGArg bl, int blconst,
- TCGArg bh, int bhconst)
-{
- int tmp = TCG_REG_T1;
-
- /* Note that the low parts are fully consumed before tmp is set. */
- if (ret != ah && (bhconst || ret != bh)) {
- tmp = ret;
- }
-
- switch (cond) {
- case TCG_COND_EQ:
- case TCG_COND_NE:
- if (bl == 0 && bh == 0) {
- if (cond == TCG_COND_EQ) {
- tcg_out_arith(s, TCG_REG_G0, al, ah, ARITH_ORCC);
- tcg_out_movi(s, TCG_TYPE_I32, ret, 1);
- } else {
- tcg_out_arith(s, ret, al, ah, ARITH_ORCC);
- }
- } else {
- tcg_out_setcond_i32(s, cond, tmp, al, bl, blconst);
- tcg_out_cmp(s, ah, bh, bhconst);
- tcg_out_mov(s, TCG_TYPE_I32, ret, tmp);
- }
- tcg_out_movcc(s, TCG_COND_NE, MOVCC_ICC, ret, cond == TCG_COND_NE, 1);
- break;
-
- default:
- /* <= : ah < bh | (ah == bh && al <= bl) */
- tcg_out_setcond_i32(s, tcg_unsigned_cond(cond), tmp, al, bl, blconst);
- tcg_out_cmp(s, ah, bh, bhconst);
- tcg_out_mov(s, TCG_TYPE_I32, ret, tmp);
- tcg_out_movcc(s, TCG_COND_NE, MOVCC_ICC, ret, 0, 1);
- tcg_out_movcc(s, tcg_high_cond(cond), MOVCC_ICC, ret, 1, 1);
- break;
- }
-}
-#endif
static void tcg_out_addsub2(TCGContext *s, TCGArg rl, TCGArg rh,
TCGArg al, TCGArg ah, TCGArg bl, int blconst,
@@ -861,8 +803,13 @@ static void build_trampolines(TCGContext *s)
}
qemu_ld_trampoline[i] = tramp;
- /* Find the retaddr argument register. */
- ra = TCG_REG_O3 + (!SPARC64 && TARGET_LONG_BITS == 64);
+ if (SPARC64 || TARGET_LONG_BITS == 32) {
+ ra = TCG_REG_O3;
+ } else {
+ /* Install the high part of the address. */
+ tcg_out_arithi(s, TCG_REG_O1, TCG_REG_O2, 32, SHIFT_SRLX);
+ ra = TCG_REG_O4;
+ }
/* Set the retaddr operand. */
tcg_out_mov(s, TCG_TYPE_PTR, ra, TCG_REG_O7);
@@ -886,12 +833,28 @@ static void build_trampolines(TCGContext *s)
}
qemu_st_trampoline[i] = tramp;
- /* Find the retaddr argument. For 32-bit, this may be past the
- last argument register, and need passing on the stack. */
- ra = (TCG_REG_O4
- + (!SPARC64 && TARGET_LONG_BITS == 64)
- + (!SPARC64 && (i & MO_SIZE) == MO_64));
-
+ if (SPARC64) {
+ ra = TCG_REG_O4;
+ } else {
+ ra = TCG_REG_O1;
+ if (TARGET_LONG_BITS == 64) {
+ /* Install the high part of the address. */
+ tcg_out_arithi(s, ra, ra + 1, 32, SHIFT_SRLX);
+ ra += 2;
+ } else {
+ ra += 1;
+ }
+ if ((i & MO_SIZE) == MO_64) {
+ /* Install the high part of the data. */
+ tcg_out_arithi(s, ra, ra + 1, 32, SHIFT_SRLX);
+ ra += 2;
+ } else {
+ ra += 1;
+ }
+ /* Skip the mem_index argument. */
+ ra += 1;
+ }
+
/* Set the retaddr operand. */
if (ra >= TCG_REG_O6) {
tcg_out_st(s, TCG_TYPE_PTR, TCG_REG_O7, TCG_REG_CALL_STACK,
@@ -960,25 +923,16 @@ static void tcg_target_qemu_prologue(TCGContext *s)
The result of the TLB comparison is in %[ix]cc. The sanitized address
is in the returned register, maybe %o0. The TLB addend is in %o1. */
-static TCGReg tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi,
- int mem_index, TCGMemOp s_bits, int which)
+static TCGReg tcg_out_tlb_load(TCGContext *s, TCGReg addr, int mem_index,
+ TCGMemOp s_bits, int which)
{
const TCGReg r0 = TCG_REG_O0;
const TCGReg r1 = TCG_REG_O1;
const TCGReg r2 = TCG_REG_O2;
- TCGReg addr = addrlo;
int tlb_ofs;
- if (!SPARC64 && TARGET_LONG_BITS == 64) {
- /* Assemble the 64-bit address in R0. */
- tcg_out_arithi(s, r0, addrlo, 0, SHIFT_SRL);
- tcg_out_arithi(s, r1, addrhi, 32, SHIFT_SLLX);
- tcg_out_arith(s, r0, r0, r1, ARITH_OR);
- addr = r0;
- }
-
/* Shift the page number down. */
- tcg_out_arithi(s, r1, addrlo, TARGET_PAGE_BITS, SHIFT_SRL);
+ tcg_out_arithi(s, r1, addr, TARGET_PAGE_BITS, SHIFT_SRL);
/* Mask out the page offset, except for the required alignment. */
tcg_out_movi(s, TCG_TYPE_TL, TCG_REG_T1,
@@ -1012,10 +966,10 @@ static TCGReg tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi,
/* If the guest address must be zero-extended, do so now. */
if (SPARC64 && TARGET_LONG_BITS == 32) {
- tcg_out_arithi(s, r0, addrlo, 0, SHIFT_SRL);
+ tcg_out_arithi(s, r0, addr, 0, SHIFT_SRL);
return r0;
}
- return addrlo;
+ return addr;
}
#endif /* CONFIG_SOFTMMU */
@@ -1048,78 +1002,37 @@ static const int qemu_st_opc[16] = {
[MO_LEQ] = STX_LE,
};
-static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
+static void tcg_out_qemu_ld(TCGContext *s, TCGReg data, TCGReg addr,
+ TCGMemOp memop, int memi, bool is_64)
{
- TCGReg addrlo, datalo, datahi, addrhi __attribute__((unused));
- TCGMemOp memop, s_bits;
-#if defined(CONFIG_SOFTMMU)
+#ifdef CONFIG_SOFTMMU
+ TCGMemOp s_bits = memop & MO_SIZE;
TCGReg addrz, param;
uintptr_t func;
- int memi;
- uint32_t *label_ptr[2];
-#endif
-
- datalo = *args++;
- datahi = (!SPARC64 && is64 ? *args++ : 0);
- addrlo = *args++;
- addrhi = (!SPARC64 && TARGET_LONG_BITS == 64 ? *args++ : 0);
- memop = *args++;
- s_bits = memop & MO_SIZE;
+ uint32_t *label_ptr;
-#if defined(CONFIG_SOFTMMU)
- memi = *args++;
- addrz = tcg_out_tlb_load(s, addrlo, addrhi, memi, s_bits,
+ addrz = tcg_out_tlb_load(s, addr, memi, s_bits,
offsetof(CPUTLBEntry, addr_read));
- if (!SPARC64 && s_bits == MO_64) {
- int reg64;
-
- /* bne,pn %[xi]cc, label0 */
- label_ptr[0] = (uint32_t *)s->code_ptr;
- tcg_out_bpcc0(s, COND_NE, BPCC_PN
- | (TARGET_LONG_BITS == 64 ? BPCC_XCC : BPCC_ICC), 0);
- tcg_out_nop(s);
-
- /* TLB Hit. */
- /* Load all 64-bits into an O/G register. */
- reg64 = (datalo < 16 ? datalo : TCG_REG_O0);
- tcg_out_ldst_rr(s, reg64, addrz, TCG_REG_O1, qemu_ld_opc[memop]);
+ /* The fast path is exactly one insn. Thus we can perform the
+ entire TLB Hit in the (annulled) delay slot of the branch
+ over the TLB Miss case. */
- /* Move the two 32-bit pieces into the destination registers. */
- tcg_out_arithi(s, datahi, reg64, 32, SHIFT_SRLX);
- if (reg64 != datalo) {
- tcg_out_mov(s, TCG_TYPE_I32, datalo, reg64);
- }
-
- /* b,a,pt label1 */
- label_ptr[1] = (uint32_t *)s->code_ptr;
- tcg_out_bpcc0(s, COND_A, BPCC_A | BPCC_PT, 0);
- } else {
- /* The fast path is exactly one insn. Thus we can perform the
- entire TLB Hit in the (annulled) delay slot of the branch
- over the TLB Miss case. */
-
- /* beq,a,pt %[xi]cc, label0 */
- label_ptr[0] = NULL;
- label_ptr[1] = (uint32_t *)s->code_ptr;
- tcg_out_bpcc0(s, COND_E, BPCC_A | BPCC_PT
- | (TARGET_LONG_BITS == 64 ? BPCC_XCC : BPCC_ICC), 0);
- /* delay slot */
- tcg_out_ldst_rr(s, datalo, addrz, TCG_REG_O1, qemu_ld_opc[memop]);
- }
+ /* beq,a,pt %[xi]cc, label0 */
+ label_ptr = (uint32_t *)s->code_ptr;
+ tcg_out_bpcc0(s, COND_E, BPCC_A | BPCC_PT
+ | (TARGET_LONG_BITS == 64 ? BPCC_XCC : BPCC_ICC), 0);
+ /* delay slot */
+ tcg_out_ldst_rr(s, data, addrz, TCG_REG_O1, qemu_ld_opc[memop]);
/* TLB Miss. */
- if (label_ptr[0]) {
- *label_ptr[0] |= INSN_OFF19((unsigned long)s->code_ptr -
- (unsigned long)label_ptr[0]);
- }
-
param = TCG_REG_O1;
- if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) {
- tcg_out_mov(s, TCG_TYPE_REG, param++, addrhi);
+ if (!SPARC64 && TARGET_LONG_BITS == 64) {
+ /* Skip the high-part; we'll perform the extract in the trampoline. */
+ param++;
}
- tcg_out_mov(s, TCG_TYPE_REG, param++, addrlo);
+ tcg_out_mov(s, TCG_TYPE_REG, param++, addr);
/* We use the helpers to extend SB and SW data, leaving the case
of SL needing explicit extending below. */
@@ -1133,81 +1046,54 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
/* delay slot */
tcg_out_movi(s, TCG_TYPE_I32, param, memi);
- switch (memop & ~MO_BSWAP) {
- case MO_SL:
- tcg_out_arithi(s, datalo, TCG_REG_O0, 0, SHIFT_SRA);
- break;
- case MO_Q:
- if (TCG_TARGET_REG_BITS == 32) {
- tcg_out_mov(s, TCG_TYPE_REG, datahi, TCG_REG_O0);
- tcg_out_mov(s, TCG_TYPE_REG, datalo, TCG_REG_O1);
- break;
+ /* Recall that all of the helpers return 64-bit results.
+ Which complicates things for sparcv8plus. */
+ if (SPARC64) {
+ /* We let the helper sign-extend SB and SW, but leave SL for here. */
+ if (is_64 && (memop & ~MO_BSWAP) == MO_SL) {
+ tcg_out_arithi(s, data, TCG_REG_O0, 0, SHIFT_SRA);
+ } else {
+ tcg_out_mov(s, TCG_TYPE_REG, data, TCG_REG_O0);
+ }
+ } else {
+ if (s_bits == MO_64) {
+ tcg_out_arithi(s, TCG_REG_O0, TCG_REG_O0, 32, SHIFT_SLLX);
+ tcg_out_arithi(s, TCG_REG_O1, TCG_REG_O1, 0, SHIFT_SRL);
+ tcg_out_arith(s, data, TCG_REG_O0, TCG_REG_O1, ARITH_OR);
+ } else if (is_64) {
+ /* Re-extend from 32-bit rather than reassembling when we
+ know the high register must be an extension. */
+ tcg_out_arithi(s, data, TCG_REG_O1, 0,
+ memop & MO_SIGN ? SHIFT_SRA : SHIFT_SRL);
+ } else {
+ tcg_out_mov(s, TCG_TYPE_I32, data, TCG_REG_O1);
}
- /* FALLTHRU */
- default:
- /* mov */
- tcg_out_mov(s, TCG_TYPE_REG, datalo, TCG_REG_O0);
- break;
}
- *label_ptr[1] |= INSN_OFF19((unsigned long)s->code_ptr -
- (unsigned long)label_ptr[1]);
+ *label_ptr |= INSN_OFF19((uintptr_t)s->code_ptr - (uintptr_t)label_ptr);
#else
if (SPARC64 && TARGET_LONG_BITS == 32) {
- tcg_out_arithi(s, TCG_REG_T1, addrlo, 0, SHIFT_SRL);
- addrlo = TCG_REG_T1;
- }
- if (!SPARC64 && s_bits == MO_64) {
- int reg64 = (datalo < 16 ? datalo : TCG_REG_O0);
-
- tcg_out_ldst_rr(s, reg64, addrlo,
- (GUEST_BASE ? TCG_GUEST_BASE_REG : TCG_REG_G0),
- qemu_ld_opc[memop]);
-
- tcg_out_arithi(s, datahi, reg64, 32, SHIFT_SRLX);
- if (reg64 != datalo) {
- tcg_out_mov(s, TCG_TYPE_I32, datalo, reg64);
- }
- } else {
- tcg_out_ldst_rr(s, datalo, addrlo,
- (GUEST_BASE ? TCG_GUEST_BASE_REG : TCG_REG_G0),
- qemu_ld_opc[memop]);
+ tcg_out_arithi(s, TCG_REG_T1, addr, 0, SHIFT_SRL);
+ addr = TCG_REG_T1;
}
+ tcg_out_ldst_rr(s, data, addr,
+ (GUEST_BASE ? TCG_GUEST_BASE_REG : TCG_REG_G0),
+ qemu_ld_opc[memop]);
#endif /* CONFIG_SOFTMMU */
}
-static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
+static void tcg_out_qemu_st(TCGContext *s, TCGReg data, TCGReg addr,
+ TCGMemOp memop, int memi)
{
- TCGReg addrlo, datalo, datahi, addrhi __attribute__((unused));
- TCGMemOp memop, s_bits;
-#if defined(CONFIG_SOFTMMU)
- TCGReg addrz, datafull, param;
+#ifdef CONFIG_SOFTMMU
+ TCGMemOp s_bits = memop & MO_SIZE;
+ TCGReg addrz, param;
uintptr_t func;
- int memi;
uint32_t *label_ptr;
-#endif
-
- datalo = *args++;
- datahi = (!SPARC64 && is64 ? *args++ : 0);
- addrlo = *args++;
- addrhi = (!SPARC64 && TARGET_LONG_BITS == 64 ? *args++ : 0);
- memop = *args++;
- s_bits = memop & MO_SIZE;
-#if defined(CONFIG_SOFTMMU)
- memi = *args++;
- addrz = tcg_out_tlb_load(s, addrlo, addrhi, memi, s_bits,
+ addrz = tcg_out_tlb_load(s, addr, memi, s_bits,
offsetof(CPUTLBEntry, addr_write));
- datafull = datalo;
- if (!SPARC64 && s_bits == MO_64) {
- /* Reconstruct the full 64-bit value. */
- tcg_out_arithi(s, TCG_REG_T1, datalo, 0, SHIFT_SRL);
- tcg_out_arithi(s, TCG_REG_O2, datahi, 32, SHIFT_SLLX);
- tcg_out_arith(s, TCG_REG_O2, TCG_REG_T1, TCG_REG_O2, ARITH_OR);
- datafull = TCG_REG_O2;
- }
-
/* The fast path is exactly one insn. Thus we can perform the entire
TLB Hit in the (annulled) delay slot of the branch over TLB Miss. */
/* beq,a,pt %[xi]cc, label0 */
@@ -1215,19 +1101,21 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
tcg_out_bpcc0(s, COND_E, BPCC_A | BPCC_PT
| (TARGET_LONG_BITS == 64 ? BPCC_XCC : BPCC_ICC), 0);
/* delay slot */
- tcg_out_ldst_rr(s, datafull, addrz, TCG_REG_O1, qemu_st_opc[memop]);
+ tcg_out_ldst_rr(s, data, addrz, TCG_REG_O1, qemu_st_opc[memop]);
/* TLB Miss. */
param = TCG_REG_O1;
- if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) {
- tcg_out_mov(s, TCG_TYPE_REG, param++, addrhi);
+ if (!SPARC64 && TARGET_LONG_BITS == 64) {
+ /* Skip the high-part; we'll perform the extract in the trampoline. */
+ param++;
}
- tcg_out_mov(s, TCG_TYPE_REG, param++, addrlo);
- if (TCG_TARGET_REG_BITS == 32 && s_bits == MO_64) {
- tcg_out_mov(s, TCG_TYPE_REG, param++, datahi);
+ tcg_out_mov(s, TCG_TYPE_REG, param++, addr);
+ if (!SPARC64 && s_bits == MO_64) {
+ /* Skip the high-part; we'll perform the extract in the trampoline. */
+ param++;
}
- tcg_out_mov(s, TCG_TYPE_REG, param++, datalo);
+ tcg_out_mov(s, TCG_TYPE_REG, param++, data);
func = qemu_st_trampoline[memop];
assert(func != 0);
@@ -1235,20 +1123,13 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
/* delay slot */
tcg_out_movi(s, TCG_TYPE_REG, param, memi);
- *label_ptr |= INSN_OFF19((unsigned long)s->code_ptr -
- (unsigned long)label_ptr);
+ *label_ptr |= INSN_OFF19((uintptr_t)s->code_ptr - (uintptr_t)label_ptr);
#else
if (SPARC64 && TARGET_LONG_BITS == 32) {
- tcg_out_arithi(s, TCG_REG_T1, addrlo, 0, SHIFT_SRL);
- addrlo = TCG_REG_T1;
- }
- if (!SPARC64 && s_bits == MO_64) {
- tcg_out_arithi(s, TCG_REG_T1, datalo, 0, SHIFT_SRL);
- tcg_out_arithi(s, TCG_REG_O2, datahi, 32, SHIFT_SLLX);
- tcg_out_arith(s, TCG_REG_O2, TCG_REG_T1, TCG_REG_O2, ARITH_OR);
- datalo = TCG_REG_O2;
+ tcg_out_arithi(s, TCG_REG_T1, addr, 0, SHIFT_SRL);
+ addr = TCG_REG_T1;
}
- tcg_out_ldst_rr(s, datalo, addrlo,
+ tcg_out_ldst_rr(s, data, addr,
(GUEST_BASE ? TCG_GUEST_BASE_REG : TCG_REG_G0),
qemu_st_opc[memop]);
#endif /* CONFIG_SOFTMMU */
@@ -1298,14 +1179,10 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
tcg_out_movi(s, TCG_TYPE_I32, args[0], (uint32_t)args[1]);
break;
-#if SPARC64
#define OP_32_64(x) \
glue(glue(case INDEX_op_, x), _i32): \
glue(glue(case INDEX_op_, x), _i64)
-#else
-#define OP_32_64(x) \
- glue(glue(case INDEX_op_, x), _i32)
-#endif
+
OP_32_64(ld8u):
tcg_out_ldst(s, args[0], args[1], args[2], LDUB);
break;
@@ -1319,9 +1196,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
tcg_out_ldst(s, args[0], args[1], args[2], LDSH);
break;
case INDEX_op_ld_i32:
-#if SPARC64
case INDEX_op_ld32u_i64:
-#endif
tcg_out_ldst(s, args[0], args[1], args[2], LDUW);
break;
OP_32_64(st8):
@@ -1331,9 +1206,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
tcg_out_ldst(s, args[0], args[1], args[2], STH);
break;
case INDEX_op_st_i32:
-#if SPARC64
case INDEX_op_st32_i64:
-#endif
tcg_out_ldst(s, args[0], args[1], args[2], STW);
break;
OP_32_64(add):
@@ -1400,19 +1273,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
args[2], const_args[2], args[3], const_args[3]);
break;
-#if !SPARC64
- case INDEX_op_brcond2_i32:
- tcg_out_brcond2_i32(s, args[4], args[0], args[1],
- args[2], const_args[2],
- args[3], const_args[3], args[5]);
- break;
- case INDEX_op_setcond2_i32:
- tcg_out_setcond2_i32(s, args[5], args[0], args[1], args[2],
- args[3], const_args[3],
- args[4], const_args[4]);
- break;
-#endif
-
case INDEX_op_add2_i32:
tcg_out_addsub2(s, args[0], args[1], args[2], args[3],
args[4], const_args[4], args[5], const_args[5],
@@ -1430,19 +1290,18 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
break;
case INDEX_op_qemu_ld_i32:
- tcg_out_qemu_ld(s, args, 0);
+ tcg_out_qemu_ld(s, args[0], args[1], args[2], args[3], false);
break;
case INDEX_op_qemu_ld_i64:
- tcg_out_qemu_ld(s, args, 1);
+ tcg_out_qemu_ld(s, args[0], args[1], args[2], args[3], true);
break;
case INDEX_op_qemu_st_i32:
- tcg_out_qemu_st(s, args, 0);
+ tcg_out_qemu_st(s, args[0], args[1], args[2], args[3]);
break;
case INDEX_op_qemu_st_i64:
- tcg_out_qemu_st(s, args, 1);
+ tcg_out_qemu_st(s, args[0], args[1], args[2], args[3]);
break;
-#if SPARC64
case INDEX_op_movi_i64:
tcg_out_movi(s, TCG_TYPE_I64, args[0], args[1]);
break;
@@ -1502,7 +1361,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
tcg_out_movcond_i64(s, args[5], args[0], args[1],
args[2], const_args[2], args[3], const_args[3]);
break;
-#endif
+
gen_arith:
tcg_out_arithc(s, args[0], args[1], args[2], const_args[2], c);
break;
@@ -1556,73 +1415,54 @@ static const TCGTargetOpDef sparc_op_defs[] = {
{ INDEX_op_setcond_i32, { "r", "rZ", "rJ" } },
{ INDEX_op_movcond_i32, { "r", "rZ", "rJ", "rI", "0" } },
-#if !SPARC64
- { INDEX_op_brcond2_i32, { "rZ", "rZ", "rJ", "rJ" } },
- { INDEX_op_setcond2_i32, { "r", "rZ", "rZ", "rJ", "rJ" } },
-#endif
-
{ INDEX_op_add2_i32, { "r", "r", "rZ", "rZ", "rJ", "rJ" } },
{ INDEX_op_sub2_i32, { "r", "r", "rZ", "rZ", "rJ", "rJ" } },
{ INDEX_op_mulu2_i32, { "r", "r", "rZ", "rJ" } },
-#if SPARC64
- { INDEX_op_mov_i64, { "r", "r" } },
- { INDEX_op_movi_i64, { "r" } },
- { INDEX_op_ld8u_i64, { "r", "r" } },
- { INDEX_op_ld8s_i64, { "r", "r" } },
- { INDEX_op_ld16u_i64, { "r", "r" } },
- { INDEX_op_ld16s_i64, { "r", "r" } },
- { INDEX_op_ld32u_i64, { "r", "r" } },
- { INDEX_op_ld32s_i64, { "r", "r" } },
- { INDEX_op_ld_i64, { "r", "r" } },
- { INDEX_op_st8_i64, { "rZ", "r" } },
- { INDEX_op_st16_i64, { "rZ", "r" } },
- { INDEX_op_st32_i64, { "rZ", "r" } },
- { INDEX_op_st_i64, { "rZ", "r" } },
-
- { INDEX_op_add_i64, { "r", "rZ", "rJ" } },
- { INDEX_op_mul_i64, { "r", "rZ", "rJ" } },
- { INDEX_op_div_i64, { "r", "rZ", "rJ" } },
- { INDEX_op_divu_i64, { "r", "rZ", "rJ" } },
- { INDEX_op_sub_i64, { "r", "rZ", "rJ" } },
- { INDEX_op_and_i64, { "r", "rZ", "rJ" } },
- { INDEX_op_andc_i64, { "r", "rZ", "rJ" } },
- { INDEX_op_or_i64, { "r", "rZ", "rJ" } },
- { INDEX_op_orc_i64, { "r", "rZ", "rJ" } },
- { INDEX_op_xor_i64, { "r", "rZ", "rJ" } },
-
- { INDEX_op_shl_i64, { "r", "rZ", "rJ" } },
- { INDEX_op_shr_i64, { "r", "rZ", "rJ" } },
- { INDEX_op_sar_i64, { "r", "rZ", "rJ" } },
-
- { INDEX_op_neg_i64, { "r", "rJ" } },
- { INDEX_op_not_i64, { "r", "rJ" } },
-
- { INDEX_op_ext32s_i64, { "r", "r" } },
- { INDEX_op_ext32u_i64, { "r", "r" } },
- { INDEX_op_trunc_shr_i32, { "r", "r" } },
-
- { INDEX_op_brcond_i64, { "rZ", "rJ" } },
- { INDEX_op_setcond_i64, { "r", "rZ", "rJ" } },
- { INDEX_op_movcond_i64, { "r", "rZ", "rJ", "rI", "0" } },
-#endif
-
-#if SPARC64
- { INDEX_op_qemu_ld_i32, { "r", "L" } },
- { INDEX_op_qemu_ld_i64, { "r", "L" } },
- { INDEX_op_qemu_st_i32, { "L", "L" } },
- { INDEX_op_qemu_st_i64, { "L", "L" } },
-#elif TARGET_LONG_BITS == 32
- { INDEX_op_qemu_ld_i32, { "r", "L" } },
- { INDEX_op_qemu_ld_i64, { "r", "r", "L" } },
- { INDEX_op_qemu_st_i32, { "L", "L" } },
- { INDEX_op_qemu_st_i64, { "L", "L", "L" } },
-#else
- { INDEX_op_qemu_ld_i32, { "r", "L", "L" } },
- { INDEX_op_qemu_ld_i64, { "L", "L", "L", "L" } },
- { INDEX_op_qemu_st_i32, { "L", "L", "L" } },
- { INDEX_op_qemu_st_i64, { "L", "L", "L", "L" } },
-#endif
+ { INDEX_op_mov_i64, { "R", "R" } },
+ { INDEX_op_movi_i64, { "R" } },
+ { INDEX_op_ld8u_i64, { "R", "r" } },
+ { INDEX_op_ld8s_i64, { "R", "r" } },
+ { INDEX_op_ld16u_i64, { "R", "r" } },
+ { INDEX_op_ld16s_i64, { "R", "r" } },
+ { INDEX_op_ld32u_i64, { "R", "r" } },
+ { INDEX_op_ld32s_i64, { "R", "r" } },
+ { INDEX_op_ld_i64, { "R", "r" } },
+ { INDEX_op_st8_i64, { "RZ", "r" } },
+ { INDEX_op_st16_i64, { "RZ", "r" } },
+ { INDEX_op_st32_i64, { "RZ", "r" } },
+ { INDEX_op_st_i64, { "RZ", "r" } },
+
+ { INDEX_op_add_i64, { "R", "RZ", "RJ" } },
+ { INDEX_op_mul_i64, { "R", "RZ", "RJ" } },
+ { INDEX_op_div_i64, { "R", "RZ", "RJ" } },
+ { INDEX_op_divu_i64, { "R", "RZ", "RJ" } },
+ { INDEX_op_sub_i64, { "R", "RZ", "RJ" } },
+ { INDEX_op_and_i64, { "R", "RZ", "RJ" } },
+ { INDEX_op_andc_i64, { "R", "RZ", "RJ" } },
+ { INDEX_op_or_i64, { "R", "RZ", "RJ" } },
+ { INDEX_op_orc_i64, { "R", "RZ", "RJ" } },
+ { INDEX_op_xor_i64, { "R", "RZ", "RJ" } },
+
+ { INDEX_op_shl_i64, { "R", "RZ", "RJ" } },
+ { INDEX_op_shr_i64, { "R", "RZ", "RJ" } },
+ { INDEX_op_sar_i64, { "R", "RZ", "RJ" } },
+
+ { INDEX_op_neg_i64, { "R", "RJ" } },
+ { INDEX_op_not_i64, { "R", "RJ" } },
+
+ { INDEX_op_ext32s_i64, { "R", "r" } },
+ { INDEX_op_ext32u_i64, { "R", "r" } },
+ { INDEX_op_trunc_shr_i32, { "r", "R" } },
+
+ { INDEX_op_brcond_i64, { "RZ", "RJ" } },
+ { INDEX_op_setcond_i64, { "R", "RZ", "RJ" } },
+ { INDEX_op_movcond_i64, { "R", "RZ", "RJ", "RI", "0" } },
+
+ { INDEX_op_qemu_ld_i32, { "r", "A" } },
+ { INDEX_op_qemu_ld_i64, { "R", "A" } },
+ { INDEX_op_qemu_st_i32, { "s", "A" } },
+ { INDEX_op_qemu_st_i64, { "S", "A" } },
{ -1 },
};
@@ -1630,9 +1470,8 @@ static const TCGTargetOpDef sparc_op_defs[] = {
static void tcg_target_init(TCGContext *s)
{
tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
-#if SPARC64
- tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff);
-#endif
+ tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, ALL_64);
+
tcg_regset_set32(tcg_target_call_clobber_regs, 0,
(1 << TCG_REG_G1) |
(1 << TCG_REG_G2) |
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
index 61fd6b8..8ce85f8 100644
--- a/tcg/sparc/tcg-target.h
+++ b/tcg/sparc/tcg-target.h
@@ -24,13 +24,7 @@
#ifndef TCG_TARGET_SPARC
#define TCG_TARGET_SPARC 1
-#if UINTPTR_MAX == UINT32_MAX
-# define TCG_TARGET_REG_BITS 32
-#elif UINTPTR_MAX == UINT64_MAX
-# define TCG_TARGET_REG_BITS 64
-#else
-# error Unknown pointer size for tcg target
-#endif
+#define TCG_TARGET_REG_BITS 64
#define TCG_TARGET_NB_REGS 32
@@ -76,7 +70,7 @@ typedef enum {
/* used for function call generation */
#define TCG_REG_CALL_STACK TCG_REG_O6
-#if TCG_TARGET_REG_BITS == 64
+#ifdef __arch64__
#define TCG_TARGET_STACK_BIAS 2047
#define TCG_TARGET_STACK_ALIGN 16
#define TCG_TARGET_CALL_STACK_OFFSET (128 + 6*8 + TCG_TARGET_STACK_BIAS)
@@ -86,7 +80,7 @@ typedef enum {
#define TCG_TARGET_CALL_STACK_OFFSET (64 + 4 + 6*4)
#endif
-#if TCG_TARGET_REG_BITS == 64
+#ifdef __arch64__
#define TCG_TARGET_EXTEND_ARGS 1
#endif
@@ -116,7 +110,6 @@ typedef enum {
#define TCG_TARGET_HAS_muluh_i32 0
#define TCG_TARGET_HAS_mulsh_i32 0
-#if TCG_TARGET_REG_BITS == 64
#define TCG_TARGET_HAS_trunc_shr_i32 1
#define TCG_TARGET_HAS_div_i64 1
#define TCG_TARGET_HAS_rem_i64 0
@@ -145,7 +138,6 @@ typedef enum {
#define TCG_TARGET_HAS_muls2_i64 0
#define TCG_TARGET_HAS_muluh_i64 0
#define TCG_TARGET_HAS_mulsh_i64 0
-#endif
#define TCG_TARGET_HAS_new_ldst 1
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 21ce9fb..e71f7a0 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -664,7 +664,36 @@ void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
int nb_rets;
TCGArg *nparam;
-#if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
+#if defined(__sparc__) && !defined(__arch64__) \
+ && !defined(CONFIG_TCG_INTERPRETER)
+ /* We have 64-bit values in one register, but need to pass as two
+ separate parameters. Split them. */
+ int orig_sizemask = sizemask;
+ int orig_nargs = nargs;
+ TCGv_i64 retl, reth;
+
+ TCGV_UNUSED_I64(retl);
+ TCGV_UNUSED_I64(reth);
+ if (sizemask != 0) {
+ TCGArg *split_args = __builtin_alloca(sizeof(TCGArg) * nargs * 2);
+ for (i = real_args = 0; i < nargs; ++i) {
+ int is_64bit = sizemask & (1 << (i+1)*2);
+ if (is_64bit) {
+ TCGv_i64 orig = MAKE_TCGV_I64(args[i]);
+ TCGv_i32 h = tcg_temp_new_i32();
+ TCGv_i32 l = tcg_temp_new_i32();
+ tcg_gen_extr_i64_i32(l, h, orig);
+ split_args[real_args++] = GET_TCGV_I32(h);
+ split_args[real_args++] = GET_TCGV_I32(l);
+ } else {
+ split_args[real_args++] = args[i];
+ }
+ }
+ nargs = real_args;
+ args = split_args;
+ sizemask = 0;
+ }
+#elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
for (i = 0; i < nargs; ++i) {
int is_64bit = sizemask & (1 << (i+1)*2);
int is_signed = sizemask & (2 << (i+1)*2);
@@ -684,8 +713,23 @@ void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
*s->gen_opc_ptr++ = INDEX_op_call;
nparam = s->gen_opparam_ptr++;
if (ret != TCG_CALL_DUMMY_ARG) {
-#if TCG_TARGET_REG_BITS < 64
- if (sizemask & 1) {
+#if defined(__sparc__) && !defined(__arch64__) \
+ && !defined(CONFIG_TCG_INTERPRETER)
+ if (orig_sizemask & 1) {
+ /* The 32-bit ABI is going to return the 64-bit value in
+ the %o0/%o1 register pair. Prepare for this by using
+ two return temporaries, and reassemble below. */
+ retl = tcg_temp_new_i64();
+ reth = tcg_temp_new_i64();
+ *s->gen_opparam_ptr++ = GET_TCGV_I64(reth);
+ *s->gen_opparam_ptr++ = GET_TCGV_I64(retl);
+ nb_rets = 2;
+ } else {
+ *s->gen_opparam_ptr++ = ret;
+ nb_rets = 1;
+ }
+#else
+ if (TCG_TARGET_REG_BITS < 64 && (sizemask & 1)) {
#ifdef HOST_WORDS_BIGENDIAN
*s->gen_opparam_ptr++ = ret + 1;
*s->gen_opparam_ptr++ = ret;
@@ -694,12 +738,11 @@ void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
*s->gen_opparam_ptr++ = ret + 1;
#endif
nb_rets = 2;
- } else
-#endif
- {
+ } else {
*s->gen_opparam_ptr++ = ret;
nb_rets = 1;
}
+#endif
} else {
nb_rets = 0;
}
@@ -749,7 +792,29 @@ void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
/* total parameters, needed to go backward in the instruction stream */
*s->gen_opparam_ptr++ = 1 + nb_rets + real_args + 3;
-#if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
+#if defined(__sparc__) && !defined(__arch64__) \
+ && !defined(CONFIG_TCG_INTERPRETER)
+ /* Free all of the parts we allocated above. */
+ for (i = real_args = 0; i < orig_nargs; ++i) {
+ int is_64bit = orig_sizemask & (1 << (i+1)*2);
+ if (is_64bit) {
+ TCGv_i32 h = MAKE_TCGV_I32(args[real_args++]);
+ TCGv_i32 l = MAKE_TCGV_I32(args[real_args++]);
+ tcg_temp_free_i32(h);
+ tcg_temp_free_i32(l);
+ } else {
+ real_args++;
+ }
+ }
+ if (orig_sizemask & 1) {
+ /* The 32-bit ABI returned two 32-bit pieces. Re-assemble them.
+ Note that describing these as TCGv_i64 eliminates an unnecessary
+ zero-extension that tcg_gen_concat_i32_i64 would create. */
+ tcg_gen_concat32_i64(MAKE_TCGV_I64(ret), retl, reth);
+ tcg_temp_free_i64(retl);
+ tcg_temp_free_i64(reth);
+ }
+#elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
for (i = 0; i < nargs; ++i) {
int is_64bit = sizemask & (1 << (i+1)*2);
if (!is_64bit) {
@@ -2411,6 +2476,7 @@ static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def,
ts = &s->temps[arg];
reg = tcg_target_call_oarg_regs[i];
assert(s->reg_to_temp[reg] == -1);
+
if (ts->fixed_reg) {
if (ts->reg != reg) {
tcg_out_mov(s, ts->type, ts->reg, reg);
commit a24fba935af42107f24212f8adbe44ec2b9bd09d
Author: Richard Henderson <rth at twiddle.net>
Date: Wed Mar 5 12:27:23 2014 -0800
tcg-sparc: Support trunc_shr_i32
Unlike a 64-bit shift op, allows the output to be in %l or %i registers
for sparcv8plus.
Signed-off-by: Richard Henderson <rth at twiddle.net>
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index f1226ab..4287bbe 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -1482,6 +1482,13 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
case INDEX_op_ext32u_i64:
tcg_out_arithi(s, args[0], args[1], 0, SHIFT_SRL);
break;
+ case INDEX_op_trunc_shr_i32:
+ if (args[2] == 0) {
+ tcg_out_mov(s, TCG_TYPE_I32, args[0], args[1]);
+ } else {
+ tcg_out_arithi(s, args[0], args[1], args[2], SHIFT_SRLX);
+ }
+ break;
case INDEX_op_brcond_i64:
tcg_out_brcond_i64(s, args[2], args[0], args[1], const_args[1],
@@ -1593,6 +1600,7 @@ static const TCGTargetOpDef sparc_op_defs[] = {
{ INDEX_op_ext32s_i64, { "r", "r" } },
{ INDEX_op_ext32u_i64, { "r", "r" } },
+ { INDEX_op_trunc_shr_i32, { "r", "r" } },
{ INDEX_op_brcond_i64, { "rZ", "rJ" } },
{ INDEX_op_setcond_i64, { "r", "rZ", "rJ" } },
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
index f44739f..61fd6b8 100644
--- a/tcg/sparc/tcg-target.h
+++ b/tcg/sparc/tcg-target.h
@@ -117,7 +117,7 @@ typedef enum {
#define TCG_TARGET_HAS_mulsh_i32 0
#if TCG_TARGET_REG_BITS == 64
-#define TCG_TARGET_HAS_trunc_shr_i32 0
+#define TCG_TARGET_HAS_trunc_shr_i32 1
#define TCG_TARGET_HAS_div_i64 1
#define TCG_TARGET_HAS_rem_i64 0
#define TCG_TARGET_HAS_rot_i64 0
commit 9f44adc5735fa65f0427dcc5206ee7aeda053b25
Author: Richard Henderson <rth at twiddle.net>
Date: Sun Sep 8 11:00:59 2013 -0700
tcg-sparc: Remove most uses of TCG_TARGET_REG_BITS
Replace with SPARC64 define. Soon even sparcv8plus will use
64-bit register as far as TCG is concerned.
Signed-off-by: Richard Henderson <rth at twiddle.net>
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 35089b8..f1226ab 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -61,6 +61,12 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
};
#endif
+#ifdef __arch64__
+# define SPARC64 1
+#else
+# define SPARC64 0
+#endif
+
/* Define some temporary registers. T2 is used for constant generation. */
#define TCG_REG_T1 TCG_REG_G1
#define TCG_REG_T2 TCG_REG_O7
@@ -402,9 +408,7 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
}
/* A 32-bit constant, or 32-bit zero-extended to 64-bits. */
- if (TCG_TARGET_REG_BITS == 32
- || type == TCG_TYPE_I32
- || (arg & ~0xffffffffu) == 0) {
+ if (type == TCG_TYPE_I32 || (arg & ~0xffffffffu) == 0) {
tcg_out_sethi(s, ret, arg);
if (arg & 0x3ff) {
tcg_out_arithi(s, ret, ret, arg & 0x3ff, ARITH_OR);
@@ -588,7 +592,7 @@ static void tcg_out_movcond_i32(TCGContext *s, TCGCond cond, TCGArg ret,
tcg_out_movcc(s, cond, MOVCC_ICC, ret, v1, v1const);
}
-#if TCG_TARGET_REG_BITS == 64
+#if SPARC64
static void tcg_out_brcond_i64(TCGContext *s, TCGCond cond, TCGArg arg1,
TCGArg arg2, int const_arg2, int label)
{
@@ -726,7 +730,7 @@ static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGArg ret,
}
}
-#if TCG_TARGET_REG_BITS == 64
+#if SPARC64
static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGArg ret,
TCGArg c1, TCGArg c2, int c2const)
{
@@ -858,7 +862,7 @@ static void build_trampolines(TCGContext *s)
qemu_ld_trampoline[i] = tramp;
/* Find the retaddr argument register. */
- ra = TCG_REG_O3 + (TARGET_LONG_BITS > TCG_TARGET_REG_BITS);
+ ra = TCG_REG_O3 + (!SPARC64 && TARGET_LONG_BITS == 64);
/* Set the retaddr operand. */
tcg_out_mov(s, TCG_TYPE_PTR, ra, TCG_REG_O7);
@@ -885,8 +889,8 @@ static void build_trampolines(TCGContext *s)
/* Find the retaddr argument. For 32-bit, this may be past the
last argument register, and need passing on the stack. */
ra = (TCG_REG_O4
- + (TARGET_LONG_BITS > TCG_TARGET_REG_BITS)
- + (TCG_TARGET_REG_BITS == 32 && (i & MO_SIZE) == MO_64));
+ + (!SPARC64 && TARGET_LONG_BITS == 64)
+ + (!SPARC64 && (i & MO_SIZE) == MO_64));
/* Set the retaddr operand. */
if (ra >= TCG_REG_O6) {
@@ -965,7 +969,7 @@ static TCGReg tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi,
TCGReg addr = addrlo;
int tlb_ofs;
- if (TCG_TARGET_REG_BITS == 32 && TARGET_LONG_BITS == 64) {
+ if (!SPARC64 && TARGET_LONG_BITS == 64) {
/* Assemble the 64-bit address in R0. */
tcg_out_arithi(s, r0, addrlo, 0, SHIFT_SRL);
tcg_out_arithi(s, r1, addrhi, 32, SHIFT_SLLX);
@@ -1007,7 +1011,7 @@ static TCGReg tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi,
tcg_out_cmp(s, r0, r2, 0);
/* If the guest address must be zero-extended, do so now. */
- if (TCG_TARGET_REG_BITS == 64 && TARGET_LONG_BITS == 32) {
+ if (SPARC64 && TARGET_LONG_BITS == 32) {
tcg_out_arithi(s, r0, addrlo, 0, SHIFT_SRL);
return r0;
}
@@ -1056,9 +1060,9 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
#endif
datalo = *args++;
- datahi = (TCG_TARGET_REG_BITS == 32 && is64 ? *args++ : 0);
+ datahi = (!SPARC64 && is64 ? *args++ : 0);
addrlo = *args++;
- addrhi = (TARGET_LONG_BITS > TCG_TARGET_REG_BITS ? *args++ : 0);
+ addrhi = (!SPARC64 && TARGET_LONG_BITS == 64 ? *args++ : 0);
memop = *args++;
s_bits = memop & MO_SIZE;
@@ -1067,7 +1071,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
addrz = tcg_out_tlb_load(s, addrlo, addrhi, memi, s_bits,
offsetof(CPUTLBEntry, addr_read));
- if (TCG_TARGET_REG_BITS == 32 && s_bits == MO_64) {
+ if (!SPARC64 && s_bits == MO_64) {
int reg64;
/* bne,pn %[xi]cc, label0 */
@@ -1149,11 +1153,11 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
*label_ptr[1] |= INSN_OFF19((unsigned long)s->code_ptr -
(unsigned long)label_ptr[1]);
#else
- if (TCG_TARGET_REG_BITS == 64 && TARGET_LONG_BITS == 32) {
+ if (SPARC64 && TARGET_LONG_BITS == 32) {
tcg_out_arithi(s, TCG_REG_T1, addrlo, 0, SHIFT_SRL);
addrlo = TCG_REG_T1;
}
- if (TCG_TARGET_REG_BITS == 32 && s_bits == MO_64) {
+ if (!SPARC64 && s_bits == MO_64) {
int reg64 = (datalo < 16 ? datalo : TCG_REG_O0);
tcg_out_ldst_rr(s, reg64, addrlo,
@@ -1184,9 +1188,9 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
#endif
datalo = *args++;
- datahi = (TCG_TARGET_REG_BITS == 32 && is64 ? *args++ : 0);
+ datahi = (!SPARC64 && is64 ? *args++ : 0);
addrlo = *args++;
- addrhi = (TARGET_LONG_BITS > TCG_TARGET_REG_BITS ? *args++ : 0);
+ addrhi = (!SPARC64 && TARGET_LONG_BITS == 64 ? *args++ : 0);
memop = *args++;
s_bits = memop & MO_SIZE;
@@ -1196,7 +1200,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
offsetof(CPUTLBEntry, addr_write));
datafull = datalo;
- if (TCG_TARGET_REG_BITS == 32 && s_bits == MO_64) {
+ if (!SPARC64 && s_bits == MO_64) {
/* Reconstruct the full 64-bit value. */
tcg_out_arithi(s, TCG_REG_T1, datalo, 0, SHIFT_SRL);
tcg_out_arithi(s, TCG_REG_O2, datahi, 32, SHIFT_SLLX);
@@ -1234,11 +1238,11 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
*label_ptr |= INSN_OFF19((unsigned long)s->code_ptr -
(unsigned long)label_ptr);
#else
- if (TCG_TARGET_REG_BITS == 64 && TARGET_LONG_BITS == 32) {
+ if (SPARC64 && TARGET_LONG_BITS == 32) {
tcg_out_arithi(s, TCG_REG_T1, addrlo, 0, SHIFT_SRL);
addrlo = TCG_REG_T1;
}
- if (TCG_TARGET_REG_BITS == 32 && s_bits == MO_64) {
+ if (!SPARC64 && s_bits == MO_64) {
tcg_out_arithi(s, TCG_REG_T1, datalo, 0, SHIFT_SRL);
tcg_out_arithi(s, TCG_REG_O2, datahi, 32, SHIFT_SLLX);
tcg_out_arith(s, TCG_REG_O2, TCG_REG_T1, TCG_REG_O2, ARITH_OR);
@@ -1294,7 +1298,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
tcg_out_movi(s, TCG_TYPE_I32, args[0], (uint32_t)args[1]);
break;
-#if TCG_TARGET_REG_BITS == 64
+#if SPARC64
#define OP_32_64(x) \
glue(glue(case INDEX_op_, x), _i32): \
glue(glue(case INDEX_op_, x), _i64)
@@ -1315,7 +1319,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
tcg_out_ldst(s, args[0], args[1], args[2], LDSH);
break;
case INDEX_op_ld_i32:
-#if TCG_TARGET_REG_BITS == 64
+#if SPARC64
case INDEX_op_ld32u_i64:
#endif
tcg_out_ldst(s, args[0], args[1], args[2], LDUW);
@@ -1327,7 +1331,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
tcg_out_ldst(s, args[0], args[1], args[2], STH);
break;
case INDEX_op_st_i32:
-#if TCG_TARGET_REG_BITS == 64
+#if SPARC64
case INDEX_op_st32_i64:
#endif
tcg_out_ldst(s, args[0], args[1], args[2], STW);
@@ -1396,7 +1400,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
args[2], const_args[2], args[3], const_args[3]);
break;
-#if TCG_TARGET_REG_BITS == 32
+#if !SPARC64
case INDEX_op_brcond2_i32:
tcg_out_brcond2_i32(s, args[4], args[0], args[1],
args[2], const_args[2],
@@ -1438,7 +1442,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
tcg_out_qemu_st(s, args, 1);
break;
-#if TCG_TARGET_REG_BITS == 64
+#if SPARC64
case INDEX_op_movi_i64:
tcg_out_movi(s, TCG_TYPE_I64, args[0], args[1]);
break;
@@ -1545,7 +1549,7 @@ static const TCGTargetOpDef sparc_op_defs[] = {
{ INDEX_op_setcond_i32, { "r", "rZ", "rJ" } },
{ INDEX_op_movcond_i32, { "r", "rZ", "rJ", "rI", "0" } },
-#if TCG_TARGET_REG_BITS == 32
+#if !SPARC64
{ INDEX_op_brcond2_i32, { "rZ", "rZ", "rJ", "rJ" } },
{ INDEX_op_setcond2_i32, { "r", "rZ", "rZ", "rJ", "rJ" } },
#endif
@@ -1554,7 +1558,7 @@ static const TCGTargetOpDef sparc_op_defs[] = {
{ INDEX_op_sub2_i32, { "r", "r", "rZ", "rZ", "rJ", "rJ" } },
{ INDEX_op_mulu2_i32, { "r", "r", "rZ", "rJ" } },
-#if TCG_TARGET_REG_BITS == 64
+#if SPARC64
{ INDEX_op_mov_i64, { "r", "r" } },
{ INDEX_op_movi_i64, { "r" } },
{ INDEX_op_ld8u_i64, { "r", "r" } },
@@ -1595,12 +1599,12 @@ static const TCGTargetOpDef sparc_op_defs[] = {
{ INDEX_op_movcond_i64, { "r", "rZ", "rJ", "rI", "0" } },
#endif
-#if TCG_TARGET_REG_BITS == 64
+#if SPARC64
{ INDEX_op_qemu_ld_i32, { "r", "L" } },
{ INDEX_op_qemu_ld_i64, { "r", "L" } },
{ INDEX_op_qemu_st_i32, { "L", "L" } },
{ INDEX_op_qemu_st_i64, { "L", "L" } },
-#elif TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
+#elif TARGET_LONG_BITS == 32
{ INDEX_op_qemu_ld_i32, { "r", "L" } },
{ INDEX_op_qemu_ld_i64, { "r", "r", "L" } },
{ INDEX_op_qemu_st_i32, { "L", "L" } },
@@ -1618,7 +1622,7 @@ static const TCGTargetOpDef sparc_op_defs[] = {
static void tcg_target_init(TCGContext *s)
{
tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
-#if TCG_TARGET_REG_BITS == 64
+#if SPARC64
tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff);
#endif
tcg_regset_set32(tcg_target_call_clobber_regs, 0,
@@ -1650,7 +1654,7 @@ static void tcg_target_init(TCGContext *s)
tcg_add_target_add_op_defs(sparc_op_defs);
}
-#if TCG_TARGET_REG_BITS == 64
+#if SPARC64
# define ELF_HOST_MACHINE EM_SPARCV9
#else
# define ELF_HOST_MACHINE EM_SPARC32PLUS
@@ -1660,7 +1664,7 @@ static void tcg_target_init(TCGContext *s)
typedef struct {
DebugFrameCIE cie;
DebugFrameFDEHeader fde;
- uint8_t fde_def_cfa[TCG_TARGET_REG_BITS == 64 ? 4 : 2];
+ uint8_t fde_def_cfa[SPARC64 ? 4 : 2];
uint8_t fde_win_save;
uint8_t fde_ret_save[3];
} DebugFrame;
@@ -1677,7 +1681,7 @@ static DebugFrame debug_frame = {
.fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, fde.cie_offset),
.fde_def_cfa = {
-#if TCG_TARGET_REG_BITS == 64
+#if SPARC64
12, 30, /* DW_CFA_def_cfa i6, 2047 */
(2047 & 0x7f) | 0x80, (2047 >> 7)
#else
commit 4bb7a41ed635960e1551e8b5a1aea9ee4d1758a3
Author: Richard Henderson <rth at twiddle.net>
Date: Mon Sep 9 17:03:24 2013 -0700
tcg: Add INDEX_op_trunc_shr_i32
Let the backend do something special for truncation.
Signed-off-by: Richard Henderson <rth at twiddle.net>
diff --git a/tcg/README b/tcg/README
index 776e925..a550ff1 100644
--- a/tcg/README
+++ b/tcg/README
@@ -314,6 +314,11 @@ This operation would be equivalent to
dest = (t1 & ~0x0f00) | ((t2 << 8) & 0x0f00)
+* trunc_shr_i32 t0, t1, pos
+
+For 64-bit hosts only, right shift the 64-bit input T1 by POS and
+truncate to 32-bit output T0. Depending on the host, this may be
+a simple mov/shift, or may require additional canonicalization.
********* Conditional moves
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
index eff1d68..a1d4322 100644
--- a/tcg/aarch64/tcg-target.h
+++ b/tcg/aarch64/tcg-target.h
@@ -68,6 +68,7 @@ typedef enum {
#define TCG_TARGET_HAS_muls2_i32 0
#define TCG_TARGET_HAS_muluh_i32 0
#define TCG_TARGET_HAS_mulsh_i32 0
+#define TCG_TARGET_HAS_trunc_shr_i32 0
#define TCG_TARGET_HAS_div_i64 1
#define TCG_TARGET_HAS_rem_i64 1
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index ababca0..dbeb16d 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/tcg-target.h
@@ -99,6 +99,7 @@ extern bool have_bmi1;
#define TCG_TARGET_HAS_mulsh_i32 0
#if TCG_TARGET_REG_BITS == 64
+#define TCG_TARGET_HAS_trunc_shr_i32 0
#define TCG_TARGET_HAS_div2_i64 1
#define TCG_TARGET_HAS_rot_i64 1
#define TCG_TARGET_HAS_ext8s_i64 1
diff --git a/tcg/ia64/tcg-target.h b/tcg/ia64/tcg-target.h
index 09c3ba8..d834beb 100644
--- a/tcg/ia64/tcg-target.h
+++ b/tcg/ia64/tcg-target.h
@@ -152,6 +152,7 @@ typedef enum {
#define TCG_TARGET_HAS_muluh_i64 0
#define TCG_TARGET_HAS_mulsh_i32 0
#define TCG_TARGET_HAS_mulsh_i64 0
+#define TCG_TARGET_HAS_trunc_shr_i32 0
#define TCG_TARGET_HAS_new_ldst 1
diff --git a/tcg/optimize.c b/tcg/optimize.c
index c447062..0302f4f 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -228,6 +228,7 @@ static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y)
case INDEX_op_shr_i32:
return (uint32_t)x >> (y & 31);
+ case INDEX_op_trunc_shr_i32:
case INDEX_op_shr_i64:
return (uint64_t)x >> (y & 63);
@@ -830,6 +831,10 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr,
}
break;
+ case INDEX_op_trunc_shr_i32:
+ mask = (uint64_t)temps[args[1]].mask >> args[2];
+ break;
+
CASE_OP_32_64(shl):
if (temps[args[2]].state == TCG_TEMP_CONST) {
tmp = temps[args[2]].val & (TCG_TARGET_REG_BITS - 1);
@@ -1021,6 +1026,17 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr,
}
goto do_default;
+ case INDEX_op_trunc_shr_i32:
+ if (temps[args[1]].state == TCG_TEMP_CONST) {
+ s->gen_opc_buf[op_index] = op_to_movi(op);
+ tmp = do_constant_folding(op, temps[args[1]].val, args[2]);
+ tcg_opt_gen_movi(gen_args, args[0], tmp);
+ gen_args += 2;
+ args += 3;
+ break;
+ }
+ goto do_default;
+
CASE_OP_32_64(add):
CASE_OP_32_64(sub):
CASE_OP_32_64(mul):
diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h
index 78bbf7a..3815b84 100644
--- a/tcg/ppc64/tcg-target.h
+++ b/tcg/ppc64/tcg-target.h
@@ -96,6 +96,7 @@ typedef enum {
#define TCG_TARGET_HAS_muls2_i32 0
#define TCG_TARGET_HAS_muluh_i32 0
#define TCG_TARGET_HAS_mulsh_i32 0
+#define TCG_TARGET_HAS_trunc_shr_i32 0
#define TCG_TARGET_HAS_div_i64 1
#define TCG_TARGET_HAS_rem_i64 0
diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h
index b3bfdcc..755c002 100644
--- a/tcg/s390/tcg-target.h
+++ b/tcg/s390/tcg-target.h
@@ -69,6 +69,7 @@ typedef enum TCGReg {
#define TCG_TARGET_HAS_muls2_i32 0
#define TCG_TARGET_HAS_muluh_i32 0
#define TCG_TARGET_HAS_mulsh_i32 0
+#define TCG_TARGET_HAS_trunc_shr_i32 0
#define TCG_TARGET_HAS_div2_i64 1
#define TCG_TARGET_HAS_rot_i64 1
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
index 4519c64..f44739f 100644
--- a/tcg/sparc/tcg-target.h
+++ b/tcg/sparc/tcg-target.h
@@ -117,6 +117,7 @@ typedef enum {
#define TCG_TARGET_HAS_mulsh_i32 0
#if TCG_TARGET_REG_BITS == 64
+#define TCG_TARGET_HAS_trunc_shr_i32 0
#define TCG_TARGET_HAS_div_i64 1
#define TCG_TARGET_HAS_rem_i64 0
#define TCG_TARGET_HAS_rot_i64 0
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index 6b8ee5d..6dbbb38 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -1624,9 +1624,20 @@ static inline void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg)
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
}
-static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg)
+static inline void tcg_gen_trunc_shr_i64_i32(TCGv_i32 ret, TCGv_i64 arg,
+ unsigned int count)
{
- tcg_gen_mov_i32(ret, TCGV_LOW(arg));
+ tcg_debug_assert(count < 64);
+ if (count >= 32) {
+ tcg_gen_shri_i32(ret, TCGV_HIGH(arg), count - 32);
+ } else if (count == 0) {
+ tcg_gen_mov_i32(ret, TCGV_LOW(arg));
+ } else {
+ TCGv_i64 t = tcg_temp_new_i64();
+ tcg_gen_shri_i64(t, arg, count);
+ tcg_gen_mov_i32(ret, TCGV_LOW(t));
+ tcg_temp_free_i64(t);
+ }
}
static inline void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
@@ -1727,11 +1738,21 @@ static inline void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg)
}
}
-/* Note: we assume the target supports move between 32 and 64 bit
- registers. This will probably break MIPS64 targets. */
-static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg)
+static inline void tcg_gen_trunc_shr_i64_i32(TCGv_i32 ret, TCGv_i64 arg,
+ unsigned int count)
{
- tcg_gen_mov_i32(ret, MAKE_TCGV_I32(GET_TCGV_I64(arg)));
+ tcg_debug_assert(count < 64);
+ if (TCG_TARGET_HAS_trunc_shr_i32) {
+ tcg_gen_op3i_i32(INDEX_op_trunc_shr_i32, ret,
+ MAKE_TCGV_I32(GET_TCGV_I64(arg)), count);
+ } else if (count == 0) {
+ tcg_gen_mov_i32(ret, MAKE_TCGV_I32(GET_TCGV_I64(arg)));
+ } else {
+ TCGv_i64 t = tcg_temp_new_i64();
+ tcg_gen_shri_i64(t, arg, count);
+ tcg_gen_mov_i32(ret, MAKE_TCGV_I32(GET_TCGV_I64(t)));
+ tcg_temp_free_i64(t);
+ }
}
/* Note: we assume the target supports move between 32 and 64 bit
@@ -2275,18 +2296,15 @@ static inline void tcg_gen_concat32_i64(TCGv_i64 dest, TCGv_i64 low,
tcg_gen_deposit_i64(dest, low, high, 32, 32);
}
+static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg)
+{
+ tcg_gen_trunc_shr_i64_i32(ret, arg, 0);
+}
+
static inline void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg)
{
-#if TCG_TARGET_REG_BITS == 32
- tcg_gen_mov_i32(lo, TCGV_LOW(arg));
- tcg_gen_mov_i32(hi, TCGV_HIGH(arg));
-#else
- TCGv_i64 t0 = tcg_temp_new_i64();
- tcg_gen_trunc_i64_i32(lo, arg);
- tcg_gen_shri_i64(t0, arg, 32);
- tcg_gen_trunc_i64_i32(hi, t0);
- tcg_temp_free_i64(t0);
-#endif
+ tcg_gen_trunc_shr_i64_i32(lo, arg, 0);
+ tcg_gen_trunc_shr_i64_i32(hi, arg, 32);
}
static inline void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg)
diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h
index d71707d..adb6ce1 100644
--- a/tcg/tcg-opc.h
+++ b/tcg/tcg-opc.h
@@ -147,6 +147,10 @@ DEF(rotl_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_rot_i64))
DEF(rotr_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_rot_i64))
DEF(deposit_i64, 1, 2, 2, IMPL64 | IMPL(TCG_TARGET_HAS_deposit_i64))
+DEF(trunc_shr_i32, 1, 1, 1,
+ IMPL(TCG_TARGET_HAS_trunc_shr_i32)
+ | (TCG_TARGET_REG_BITS == 32 ? TCG_OPF_NOT_PRESENT : 0))
+
DEF(brcond_i64, 0, 2, 2, TCG_OPF_BB_END | IMPL64)
DEF(ext8s_i64, 1, 1, 0, IMPL64 | IMPL(TCG_TARGET_HAS_ext8s_i64))
DEF(ext16s_i64, 1, 1, 0, IMPL64 | IMPL(TCG_TARGET_HAS_ext16s_i64))
diff --git a/tcg/tcg.h b/tcg/tcg.h
index 0bb6677..a6a2d06 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -66,6 +66,7 @@ typedef uint64_t TCGRegSet;
#if TCG_TARGET_REG_BITS == 32
/* Turn some undef macros into false macros. */
+#define TCG_TARGET_HAS_trunc_shr_i32 0
#define TCG_TARGET_HAS_div_i64 0
#define TCG_TARGET_HAS_rem_i64 0
#define TCG_TARGET_HAS_div2_i64 0
diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h
index f43492c..37719e8 100644
--- a/tcg/tci/tcg-target.h
+++ b/tcg/tci/tcg-target.h
@@ -82,6 +82,7 @@
#define TCG_TARGET_HAS_mulsh_i32 0
#if TCG_TARGET_REG_BITS == 64
+#define TCG_TARGET_HAS_trunc_shr_i32 0
#define TCG_TARGET_HAS_bswap16_i64 1
#define TCG_TARGET_HAS_bswap32_i64 1
#define TCG_TARGET_HAS_bswap64_i64 1
commit 71b926992e0e0a0da078873480c6fc1dd65af6fc
Author: Richard Henderson <rth at twiddle.net>
Date: Mon Sep 9 08:26:49 2013 -0700
tcg: Fix missed pointer size != TCG_TARGET_REG_BITS changes
Signed-off-by: Richard Henderson <rth at twiddle.net>
diff --git a/include/exec/def-helper.h b/include/exec/def-helper.h
index 73d51f9..255b58b 100644
--- a/include/exec/def-helper.h
+++ b/include/exec/def-helper.h
@@ -84,7 +84,7 @@
#define dh_is_64bit_noreturn 0
#define dh_is_64bit_i32 0
#define dh_is_64bit_i64 1
-#define dh_is_64bit_ptr (TCG_TARGET_REG_BITS == 64)
+#define dh_is_64bit_ptr (sizeof(void *) == 8)
#define dh_is_64bit(t) glue(dh_is_64bit_, dh_alias(t))
#define dh_is_signed_void 0
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index 8d4ff7d..6b8ee5d 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -2861,7 +2861,7 @@ static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
#define tcg_gen_muls2_tl tcg_gen_muls2_i32
#endif
-#if TCG_TARGET_REG_BITS == 32
+#if UINTPTR_MAX == UINT32_MAX
# define tcg_gen_ld_ptr(R, A, O) \
tcg_gen_ld_i32(TCGV_PTR_TO_NAT(R), (A), (O))
# define tcg_gen_discard_ptr(A) \
@@ -2883,4 +2883,4 @@ static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
tcg_gen_addi_i64(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), (B))
# define tcg_gen_ext_i32_ptr(R, A) \
tcg_gen_ext_i32_i64(TCGV_PTR_TO_NAT(R), (A))
-#endif /* TCG_TARGET_REG_BITS == 32 */
+#endif /* UINTPTR_MAX == UINT32_MAX */
commit f0e973601250a3f1579ff77230c419c562958fa8
Author: Fam Zheng <famz at redhat.com>
Date: Mon Apr 28 10:59:28 2014 +0800
mirror: Use DIV_ROUND_UP
Although bdrv_getlength() was just called above this, and checked for
error, it is better to just use the value we already get, and use
DIV_ROUND_UP.
Signed-off-by: Fam Zheng <famz at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/block/mirror.c b/block/mirror.c
index 36f4f8e..95366ad 100644
--- a/block/mirror.c
+++ b/block/mirror.c
@@ -329,7 +329,7 @@ static void coroutine_fn mirror_run(void *opaque)
return;
}
- length = (bdrv_getlength(bs) + s->granularity - 1) / s->granularity;
+ length = DIV_ROUND_UP(s->common.len, s->granularity);
s->in_flight_bitmap = bitmap_new(length);
/* If we have no backing file yet in the destination, we cannot let
commit 7db1689c35a6f7477c691c31232ec10725ba9dfe
Author: Jeff Cody <jcody at redhat.com>
Date: Fri Apr 25 17:02:32 2014 -0400
block: fix qemu-img --help invocation
This fixes a bug introduced in commit ac1307ab, that caused the
'--help' option to not be recognized as a valid command, and not
print any help.
Signed-off-by: Jeff Cody <jcody at redhat.com>
Reviewed-by: Eric Blake <eblake at redhat.com>
Signed-off-by: Kevin Wolf <kwolf at redhat.com>
diff --git a/qemu-img.c b/qemu-img.c
index 968b4c8..d884324 100644
--- a/qemu-img.c
+++ b/qemu-img.c
@@ -2789,6 +2789,12 @@ int main(int argc, char **argv)
{
const img_cmd_t *cmd;
const char *cmdname;
+ int c;
+ int option_index = 0;
+ static const struct option long_options[] = {
+ {"help", no_argument, 0, 'h'},
+ {0, 0, 0, 0}
+ };
#ifdef CONFIG_POSIX
signal(SIGPIPE, SIG_IGN);
@@ -2803,15 +2809,20 @@ int main(int argc, char **argv)
error_exit("Not enough arguments");
}
cmdname = argv[1];
- argc--; argv++;
/* find the command */
for(cmd = img_cmds; cmd->name != NULL; cmd++) {
if (!strcmp(cmdname, cmd->name)) {
- return cmd->handler(argc, argv);
+ return cmd->handler(argc - 1, argv + 1);
}
}
+ c = getopt_long(argc, argv, "h", long_options, &option_index);
+
+ if (c == 'h') {
+ help();
+ }
+
/* not found */
error_exit("Command not found: %s", cmdname);
}
commit a889bc2bb2a4eef105652be25eacfed74c9f1273
Author: Gerd Hoffmann <kraxel at redhat.com>
Date: Mon Apr 28 11:02:58 2014 +0200
add secondary-vga to display-vga test
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
diff --git a/tests/display-vga-test.c b/tests/display-vga-test.c
index 23be88f..17f5910 100644
--- a/tests/display-vga-test.c
+++ b/tests/display-vga-test.c
@@ -24,6 +24,18 @@ static void pci_stdvga(void)
qtest_end();
}
+static void pci_secondary(void)
+{
+ qtest_start("-vga none -device secondary-vga");
+ qtest_end();
+}
+
+static void pci_multihead(void)
+{
+ qtest_start("-vga none -device VGA -device secondary-vga");
+ qtest_end();
+}
+
int main(int argc, char **argv)
{
int ret;
@@ -32,6 +44,8 @@ int main(int argc, char **argv)
qtest_add_func("/display/pci/cirrus", pci_cirrus);
qtest_add_func("/display/pci/stdvga", pci_stdvga);
+ qtest_add_func("/display/pci/secondary", pci_secondary);
+ qtest_add_func("/display/pci/multihead", pci_multihead);
ret = g_test_run();
return ret;
commit 0850fd583f29c4ce35f83c511a2d9fd737909b53
Author: Gerd Hoffmann <kraxel at redhat.com>
Date: Mon Apr 28 11:01:13 2014 +0200
add display-vga test
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
diff --git a/tests/Makefile b/tests/Makefile
index 88f7105..c6b6614 100644
--- a/tests/Makefile
+++ b/tests/Makefile
@@ -113,6 +113,10 @@ check-qtest-pci-y += tests/tpci200-test$(EXESUF)
gcov-files-pci-y += hw/ipack/tpci200.c
check-qtest-pci-y += $(check-qtest-ipack-y)
gcov-files-pci-y += $(gcov-files-ipack-y)
+check-qtest-pci-y += tests/display-vga-test$(EXESUF)
+gcov-files-pci-y += hw/display/vga.c
+gcov-files-pci-y += hw/display/cirrus_vga.c
+gcov-files-pci-y += hw/display/vga-pci.c
check-qtest-i386-y = tests/endianness-test$(EXESUF)
check-qtest-i386-y += tests/fdc-test$(EXESUF)
@@ -280,6 +284,7 @@ tests/virtio-9p-test$(EXESUF): tests/virtio-9p-test.o
tests/virtio-serial-test$(EXESUF): tests/virtio-serial-test.o
tests/virtio-console-test$(EXESUF): tests/virtio-console-test.o
tests/tpci200-test$(EXESUF): tests/tpci200-test.o
+tests/display-vga-test$(EXESUF): tests/display-vga-test.o
tests/ipoctal232-test$(EXESUF): tests/ipoctal232-test.o
tests/qom-test$(EXESUF): tests/qom-test.o
tests/blockdev-test$(EXESUF): tests/blockdev-test.o $(libqos-pc-obj-y)
diff --git a/tests/display-vga-test.c b/tests/display-vga-test.c
new file mode 100644
index 0000000..23be88f
--- /dev/null
+++ b/tests/display-vga-test.c
@@ -0,0 +1,38 @@
+/*
+ * QTest testcase for vga cards
+ *
+ * Copyright (c) 2014 Red Hat, Inc
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#include <glib.h>
+#include <string.h>
+#include "libqtest.h"
+#include "qemu/osdep.h"
+
+static void pci_cirrus(void)
+{
+ qtest_start("-vga none -device cirrus-vga");
+ qtest_end();
+}
+
+static void pci_stdvga(void)
+{
+ qtest_start("-vga none -device VGA");
+ qtest_end();
+}
+
+int main(int argc, char **argv)
+{
+ int ret;
+
+ g_test_init(&argc, &argv, NULL);
+
+ qtest_add_func("/display/pci/cirrus", pci_cirrus);
+ qtest_add_func("/display/pci/stdvga", pci_stdvga);
+ ret = g_test_run();
+
+ return ret;
+}
commit 63e3e24db2e9eef8cf7e5f611c0a2e06dd9207c9
Author: Gerd Hoffmann <kraxel at redhat.com>
Date: Mon Nov 12 14:29:47 2012 +0100
vga: add secondary stdvga variant
Add a standard vga variant which doesn't occupy any legacy
resources and thus can easily be used as secondary (or legacy-free)
graphics adapter. Programming must be done using the MMIO bar.
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
diff --git a/docs/specs/standard-vga.txt b/docs/specs/standard-vga.txt
index 8a4c1e9..f82773e 100644
--- a/docs/specs/standard-vga.txt
+++ b/docs/specs/standard-vga.txt
@@ -5,9 +5,10 @@ QEMU Standard VGA
Exists in two variants, for isa and pci.
command line switches:
- -vga std [ picks isa for -M isapc, otherwise pci ]
- -device VGA [ pci variant ]
- -device isa-vga [ isa variant ]
+ -vga std [ picks isa for -M isapc, otherwise pci ]
+ -device VGA [ pci variant ]
+ -device isa-vga [ isa variant ]
+ -device secondary-vga [ legacy-free pci variant ]
PCI spec
@@ -31,9 +32,15 @@ PCI ROM Region:
Holds the vgabios (qemu 0.14+).
+The legacy-free variant has no ROM and has PCI_CLASS_DISPLAY_OTHER
+instead of PCI_CLASS_DISPLAY_VGA.
+
+
IO ports used
-------------
+Doesn't apply to the legacy-free pci variant, use the MMIO bar instead.
+
03c0 - 03df : standard vga ports
01ce : bochs vbe interface index port
01cf : bochs vbe interface data port (x86 only)
diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c
index ad49156..0865dc4 100644
--- a/hw/display/vga-pci.c
+++ b/hw/display/vga-pci.c
@@ -179,12 +179,51 @@ static int pci_std_vga_initfn(PCIDevice *dev)
return 0;
}
+static int pci_secondary_vga_initfn(PCIDevice *dev)
+{
+ PCIVGAState *d = DO_UPCAST(PCIVGAState, dev, dev);
+ VGACommonState *s = &d->vga;
+
+ /* vga + console init */
+ vga_common_init(s, OBJECT(dev), false);
+ s->con = graphic_console_init(DEVICE(dev), 0, s->hw_ops, s);
+
+ /* mmio bar */
+ memory_region_init(&d->mmio, OBJECT(dev), "vga.mmio", 4096);
+ memory_region_init_io(&d->ioport, OBJECT(dev), &pci_vga_ioport_ops, d,
+ "vga ioports remapped", PCI_VGA_IOPORT_SIZE);
+ memory_region_init_io(&d->bochs, OBJECT(dev), &pci_vga_bochs_ops, d,
+ "bochs dispi interface", PCI_VGA_BOCHS_SIZE);
+
+ memory_region_add_subregion(&d->mmio, PCI_VGA_IOPORT_OFFSET,
+ &d->ioport);
+ memory_region_add_subregion(&d->mmio, PCI_VGA_BOCHS_OFFSET,
+ &d->bochs);
+
+ pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->vram);
+ pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
+
+ return 0;
+}
+
+static void pci_secondary_vga_reset(DeviceState *dev)
+{
+ PCIVGAState *d = DO_UPCAST(PCIVGAState, dev.qdev, dev);
+
+ vga_common_reset(&d->vga);
+}
+
static Property vga_pci_properties[] = {
DEFINE_PROP_UINT32("vgamem_mb", PCIVGAState, vga.vram_size_mb, 16),
DEFINE_PROP_BIT("mmio", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_MMIO, true),
DEFINE_PROP_END_OF_LIST(),
};
+static Property secondary_pci_properties[] = {
+ DEFINE_PROP_UINT32("vgamem_mb", PCIVGAState, vga.vram_size_mb, 16),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static void vga_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -201,6 +240,20 @@ static void vga_class_init(ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
}
+static void secondary_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->init = pci_secondary_vga_initfn;
+ k->vendor_id = PCI_VENDOR_ID_QEMU;
+ k->device_id = PCI_DEVICE_ID_QEMU_VGA;
+ k->class_id = PCI_CLASS_DISPLAY_OTHER;
+ dc->vmsd = &vmstate_vga_pci;
+ dc->props = secondary_pci_properties;
+ dc->reset = pci_secondary_vga_reset;
+}
+
static const TypeInfo vga_info = {
.name = "VGA",
.parent = TYPE_PCI_DEVICE,
@@ -208,9 +261,17 @@ static const TypeInfo vga_info = {
.class_init = vga_class_init,
};
+static const TypeInfo secondary_info = {
+ .name = "secondary-vga",
+ .parent = TYPE_PCI_DEVICE,
+ .instance_size = sizeof(PCIVGAState),
+ .class_init = secondary_class_init,
+};
+
static void vga_register_types(void)
{
type_register_static(&vga_info);
+ type_register_static(&secondary_info);
}
type_init(vga_register_types)
diff --git a/hw/display/vga.c b/hw/display/vga.c
index 8891e0a..c4c3238 100644
--- a/hw/display/vga.c
+++ b/hw/display/vga.c
@@ -171,6 +171,10 @@ static void vga_update_memory_access(VGACommonState *s)
MemoryRegion *region, *old_region = s->chain4_alias;
hwaddr base, offset, size;
+ if (s->legacy_address_space == NULL) {
+ return;
+ }
+
s->chain4_alias = NULL;
if ((s->sr[VGA_SEQ_PLANE_WRITE] & VGA_SR02_ALL_PLANES) ==
commit e2bbfc8ee2aa82519da7de281305c3bea5431cf1
Author: Gerd Hoffmann <kraxel at redhat.com>
Date: Fri Oct 11 19:56:59 2013 +0200
vga: allow non-global vmstate
Need a way to opt-out from vga.vram being global vmstate, for
secondary vga cards. Add a bool parameter to vga_common_init
to support this.
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c
index 0d3127d..d1afc76 100644
--- a/hw/display/cirrus_vga.c
+++ b/hw/display/cirrus_vga.c
@@ -2913,7 +2913,7 @@ static void isa_cirrus_vga_realizefn(DeviceState *dev, Error **errp)
ISACirrusVGAState *d = ISA_CIRRUS_VGA(dev);
VGACommonState *s = &d->cirrus_vga.vga;
- vga_common_init(s, OBJECT(dev));
+ vga_common_init(s, OBJECT(dev), true);
cirrus_init_common(&d->cirrus_vga, OBJECT(dev), CIRRUS_ID_CLGD5430, 0,
isa_address_space(isadev),
isa_address_space_io(isadev));
@@ -2960,7 +2960,7 @@ static int pci_cirrus_vga_initfn(PCIDevice *dev)
int16_t device_id = pc->device_id;
/* setup VGA */
- vga_common_init(&s->vga, OBJECT(dev));
+ vga_common_init(&s->vga, OBJECT(dev), true);
cirrus_init_common(s, OBJECT(dev), device_id, 1, pci_address_space(dev),
pci_address_space_io(dev));
s->vga.con = graphic_console_init(DEVICE(dev), 0, s->vga.hw_ops, &s->vga);
diff --git a/hw/display/qxl.c b/hw/display/qxl.c
index 47bbf1f..e9c54d7 100644
--- a/hw/display/qxl.c
+++ b/hw/display/qxl.c
@@ -2061,7 +2061,7 @@ static int qxl_init_primary(PCIDevice *dev)
qxl->id = 0;
qxl_init_ramsize(qxl);
vga->vram_size_mb = qxl->vga.vram_size >> 20;
- vga_common_init(vga, OBJECT(dev));
+ vga_common_init(vga, OBJECT(dev), true);
vga_init(vga, OBJECT(dev),
pci_address_space(dev), pci_address_space_io(dev), false);
portio_list_init(qxl_vga_port_list, OBJECT(dev), qxl_vga_portio_list,
diff --git a/hw/display/vga-isa-mm.c b/hw/display/vga-isa-mm.c
index afc46b8..4efc222 100644
--- a/hw/display/vga-isa-mm.c
+++ b/hw/display/vga-isa-mm.c
@@ -132,7 +132,7 @@ int isa_vga_mm_init(hwaddr vram_base,
s = g_malloc0(sizeof(*s));
s->vga.vram_size_mb = VGA_RAM_SIZE >> 20;
- vga_common_init(&s->vga, NULL);
+ vga_common_init(&s->vga, NULL, true);
vga_mm_init(s, vram_base, ctrl_base, it_shift, address_space);
s->vga.con = graphic_console_init(NULL, 0, s->vga.hw_ops, s);
diff --git a/hw/display/vga-isa.c b/hw/display/vga-isa.c
index 1d9ea6b..2b480bd 100644
--- a/hw/display/vga-isa.c
+++ b/hw/display/vga-isa.c
@@ -56,7 +56,7 @@ static void vga_isa_realizefn(DeviceState *dev, Error **errp)
MemoryRegion *vga_io_memory;
const MemoryRegionPortio *vga_ports, *vbe_ports;
- vga_common_init(s, OBJECT(dev));
+ vga_common_init(s, OBJECT(dev), true);
s->legacy_address_space = isa_address_space(isadev);
vga_io_memory = vga_init_io(s, OBJECT(dev), &vga_ports, &vbe_ports);
isa_register_portio_list(isadev, 0x3b0, vga_ports, s, "vga");
diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c
index 574ea0e..ad49156 100644
--- a/hw/display/vga-pci.c
+++ b/hw/display/vga-pci.c
@@ -147,7 +147,7 @@ static int pci_std_vga_initfn(PCIDevice *dev)
VGACommonState *s = &d->vga;
/* vga + console init */
- vga_common_init(s, OBJECT(dev));
+ vga_common_init(s, OBJECT(dev), true);
vga_init(s, OBJECT(dev), pci_address_space(dev), pci_address_space_io(dev),
true);
diff --git a/hw/display/vga.c b/hw/display/vga.c
index 063319d..8891e0a 100644
--- a/hw/display/vga.c
+++ b/hw/display/vga.c
@@ -2252,7 +2252,7 @@ static const GraphicHwOps vga_ops = {
.text_update = vga_update_text,
};
-void vga_common_init(VGACommonState *s, Object *obj)
+void vga_common_init(VGACommonState *s, Object *obj, bool global_vmstate)
{
int i, j, v, b;
@@ -2289,7 +2289,7 @@ void vga_common_init(VGACommonState *s, Object *obj)
s->is_vbe_vmstate = 1;
memory_region_init_ram(&s->vram, obj, "vga.vram", s->vram_size);
- vmstate_register_ram_global(&s->vram);
+ vmstate_register_ram(&s->vram, global_vmstate ? NULL : DEVICE(obj));
xen_register_framebuffer(&s->vram);
s->vram_ptr = memory_region_get_ram_ptr(&s->vram);
s->get_bpp = vga_get_bpp;
diff --git a/hw/display/vga_int.h b/hw/display/vga_int.h
index e641890..d42ac92 100644
--- a/hw/display/vga_int.h
+++ b/hw/display/vga_int.h
@@ -177,7 +177,7 @@ static inline int c6_to_8(int v)
return (v << 2) | (b << 1) | b;
}
-void vga_common_init(VGACommonState *s, Object *obj);
+void vga_common_init(VGACommonState *s, Object *obj, bool global_vmstate);
void vga_init(VGACommonState *s, Object *obj, MemoryRegion *address_space,
MemoryRegion *address_space_io, bool init_vga_ports);
MemoryRegion *vga_init_io(VGACommonState *s, Object *obj,
diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c
index 6ae3348..9ba47e6 100644
--- a/hw/display/vmware_vga.c
+++ b/hw/display/vmware_vga.c
@@ -1207,7 +1207,7 @@ static void vmsvga_init(DeviceState *dev, struct vmsvga_state_s *s,
vmstate_register_ram_global(&s->fifo_ram);
s->fifo_ptr = memory_region_get_ram_ptr(&s->fifo_ram);
- vga_common_init(&s->vga, OBJECT(dev));
+ vga_common_init(&s->vga, OBJECT(dev), true);
vga_init(&s->vga, OBJECT(dev), address_space, io, true);
vmstate_register(NULL, 0, &vmstate_vga_common, &s->vga);
s->new_depth = 32;
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