[virglrenderer-devel] [PATCH 3/4] vrend_shader: move destination register translation
Gurchetan Singh
gurchetansingh at chromium.org
Tue May 8 22:24:38 UTC 2018
iter_instruction is a big function. Let's make it smaller
by moving some functionality.
One simplification that was made is assuming there's only one
destination register, as the TGSI spec says and various parts
of the code assume. If TGSI expands to have more than one
destination register, we can add that back in later.
v2: In certain cases, FLOAT_BITS_TO_UINT --> FLOAT_BITS_TO_INT (Elie)
Fix commit message
---
src/vrend_shader.c | 302 ++++++++++++++++++++++++---------------------
1 file changed, 164 insertions(+), 138 deletions(-)
diff --git a/src/vrend_shader.c b/src/vrend_shader.c
index e93d0c2..c7892fe 100644
--- a/src/vrend_shader.c
+++ b/src/vrend_shader.c
@@ -1099,11 +1099,11 @@ static int emit_clip_dist_movs(struct dump_ctx *ctx)
return 0;
}
-#define emit_arit_op2(op) snprintf(buf, 255, "%s = %s(%s((%s %s %s))%s);\n", dsts[0], get_string(dstconv), get_string(dtypeprefix), srcs[0], op, srcs[1], writemask)
-#define emit_op1(op) snprintf(buf, 255, "%s = %s(%s(%s(%s))%s);\n", dsts[0], get_string(dstconv), get_string(dtypeprefix), op, srcs[0], writemask)
-#define emit_compare(op) snprintf(buf, 255, "%s = %s(%s((%s(%s(%s), %s(%s))))%s);\n", dsts[0], get_string(dstconv), get_string(dtypeprefix), op, get_string(svec4), srcs[0], get_string(svec4), srcs[1], writemask)
+#define emit_arit_op2(op) snprintf(buf, 255, "%s = %s(%s((%s %s %s))%s);\n", dst, get_string(dstconv), get_string(dtypeprefix), srcs[0], op, srcs[1], writemask)
+#define emit_op1(op) snprintf(buf, 255, "%s = %s(%s(%s(%s))%s);\n", dst, get_string(dstconv), get_string(dtypeprefix), op, srcs[0], writemask)
+#define emit_compare(op) snprintf(buf, 255, "%s = %s(%s((%s(%s(%s), %s(%s))))%s);\n", dst, get_string(dstconv), get_string(dtypeprefix), op, get_string(svec4), srcs[0], get_string(svec4), srcs[1], writemask)
-#define emit_ucompare(op) snprintf(buf, 255, "%s = %s(uintBitsToFloat(%s(%s(%s(%s), %s(%s))%s) * %s(0xffffffff)));\n", dsts[0], get_string(dstconv), get_string(udstconv), op, get_string(svec4), srcs[0], get_string(svec4), srcs[1], writemask, get_string(udstconv))
+#define emit_ucompare(op) snprintf(buf, 255, "%s = %s(uintBitsToFloat(%s(%s(%s(%s), %s(%s))%s) * %s(0xffffffff)));\n", dst, get_string(dstconv), get_string(udstconv), op, get_string(svec4), srcs[0], get_string(svec4), srcs[1], writemask, get_string(udstconv))
static int emit_buf(struct dump_ctx *ctx, const char *buf)
{
@@ -1172,7 +1172,7 @@ static int translate_tex(struct dump_ctx *ctx,
struct tgsi_full_instruction *inst,
int sreg_index,
char srcs[4][255],
- char dsts[3][255],
+ char *dst,
const char *writemask,
const char *dstconv,
bool dst0_override_no_wm)
@@ -1277,7 +1277,7 @@ static int translate_tex(struct dump_ctx *ctx,
ctx->uses_txq_levels = true;
if (inst->Dst[0].Register.WriteMask & 0x7)
twm = ".w";
- snprintf(buf, 255, "%s%s = %s(textureQueryLevels(%s));\n", dsts[0], twm, dtypeprefix, srcs[sampler_index]);
+ snprintf(buf, 255, "%s%s = %s(textureQueryLevels(%s));\n", dst, twm, dtypeprefix, srcs[sampler_index]);
EMIT_BUF_WITH_RET(ctx, buf);
}
@@ -1312,7 +1312,7 @@ static int translate_tex(struct dump_ctx *ctx,
}
if (inst->Dst[0].Register.WriteMask & 0x7) {
- snprintf(buf, 255, "%s%s = %s(textureSize(%s%s))%s;\n", dsts[0], twm, dtypeprefix, srcs[sampler_index], bias, util_bitcount(inst->Dst[0].Register.WriteMask) > 1 ? writemask : "");
+ snprintf(buf, 255, "%s%s = %s(textureSize(%s%s))%s;\n", dst, twm, dtypeprefix, srcs[sampler_index], bias, util_bitcount(inst->Dst[0].Register.WriteMask) > 1 ? writemask : "");
EMIT_BUF_WITH_RET(ctx, buf);
}
@@ -1553,25 +1553,25 @@ static int translate_tex(struct dump_ctx *ctx,
}
}
if (inst->Instruction.Opcode == TGSI_OPCODE_TXF) {
- snprintf(buf, 255, "%s = %s(%s(texelFetch%s(%s, %s(%s%s)%s%s)%s));\n", dsts[0], dstconv, dtypeprefix, tex_ext, srcs[sampler_index], txfi, srcs[0], twm, bias, offbuf, dst0_override_no_wm ? "" : writemask);
+ snprintf(buf, 255, "%s = %s(%s(texelFetch%s(%s, %s(%s%s)%s%s)%s));\n", dst, dstconv, dtypeprefix, tex_ext, srcs[sampler_index], txfi, srcs[0], twm, bias, offbuf, dst0_override_no_wm ? "" : writemask);
} else if (ctx->cfg->glsl_version < 140 && ctx->uses_sampler_rect) {
/* rect is special in GLSL 1.30 */
if (inst->Texture.Texture == TGSI_TEXTURE_RECT)
- snprintf(buf, 255, "%s = texture2DRect(%s, %s.xy)%s;\n", dsts[0], srcs[sampler_index], srcs[0], writemask);
+ snprintf(buf, 255, "%s = texture2DRect(%s, %s.xy)%s;\n", dst, srcs[sampler_index], srcs[0], writemask);
else if (inst->Texture.Texture == TGSI_TEXTURE_SHADOWRECT)
- snprintf(buf, 255, "%s = shadow2DRect(%s, %s.xyz)%s;\n", dsts[0], srcs[sampler_index], srcs[0], writemask);
+ snprintf(buf, 255, "%s = shadow2DRect(%s, %s.xyz)%s;\n", dst, srcs[sampler_index], srcs[0], writemask);
} else if (is_shad && inst->Instruction.Opcode != TGSI_OPCODE_TG4) { /* TGSI returns 1.0 in alpha */
const char *cname = tgsi_proc_to_prefix(ctx->prog_type);
const struct tgsi_full_src_register *src = &inst->Src[sampler_index];
- snprintf(buf, 255, "%s = %s(%s(vec4(vec4(texture%s(%s, %s%s%s%s)) * %sshadmask%d + %sshadadd%d)%s));\n", dsts[0], dstconv, dtypeprefix, tex_ext, srcs[sampler_index], srcs[0], twm, offbuf, bias, cname, src->Register.Index, cname, src->Register.Index, writemask);
+ snprintf(buf, 255, "%s = %s(%s(vec4(vec4(texture%s(%s, %s%s%s%s)) * %sshadmask%d + %sshadadd%d)%s));\n", dst, dstconv, dtypeprefix, tex_ext, srcs[sampler_index], srcs[0], twm, offbuf, bias, cname, src->Register.Index, cname, src->Register.Index, writemask);
} else {
/* OpenGL ES do not support 1D texture
* so we use a 2D texture with a parameter set to 0.5
*/
if (ctx->cfg->use_gles && inst->Texture.Texture == TGSI_TEXTURE_1D) {
- snprintf(buf, 255, "%s = %s(%s(texture2D(%s, vec2(%s%s%s%s, 0.5))%s));\n", dsts[0], dstconv, dtypeprefix, srcs[sampler_index], srcs[0], twm, offbuf, bias, dst0_override_no_wm ? "" : writemask);
+ snprintf(buf, 255, "%s = %s(%s(texture2D(%s, vec2(%s%s%s%s, 0.5))%s));\n", dst, dstconv, dtypeprefix, srcs[sampler_index], srcs[0], twm, offbuf, bias, dst0_override_no_wm ? "" : writemask);
} else {
- snprintf(buf, 255, "%s = %s(%s(texture%s(%s, %s%s%s%s)%s));\n", dsts[0], dstconv, dtypeprefix, tex_ext, srcs[sampler_index], srcs[0], twm, offbuf, bias, dst0_override_no_wm ? "" : writemask);
+ snprintf(buf, 255, "%s = %s(%s(texture%s(%s, %s%s%s%s)%s));\n", dst, dstconv, dtypeprefix, tex_ext, srcs[sampler_index], srcs[0], twm, offbuf, bias, dst0_override_no_wm ? "" : writemask);
}
}
return emit_buf(ctx, buf);
@@ -1625,22 +1625,131 @@ create_swizzled_clipdist(struct dump_ctx *ctx,
snprintf(result, 255, "%s(vec4(%s,%s,%s,%s))", stypeprefix, clipdistvec[0], clipdistvec[1], clipdistvec[2], clipdistvec[3]);
}
+static int
+get_destination_info(struct dump_ctx *ctx,
+ const struct tgsi_full_instruction *inst,
+ enum vrend_type_conversion *dtypeprefix,
+ enum vrend_type_conversion *dstconv,
+ enum vrend_type_conversion *udstconv,
+ bool *dst_override_no_wm, char *dst,
+ char *writemask)
+{
+ const struct tgsi_full_dst_register *dst_reg;
+ enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(inst->Instruction.Opcode);
+
+ if (dtype == TGSI_TYPE_SIGNED || dtype == TGSI_TYPE_UNSIGNED)
+ ctx->has_ints = true;
+
+ if (inst->Instruction.Opcode == TGSI_OPCODE_TXQ) {
+ *dtypeprefix = INT_BITS_TO_FLOAT;
+ } else {
+ switch (dtype) {
+ case TGSI_TYPE_UNSIGNED:
+ *dtypeprefix = UINT_BITS_TO_FLOAT;
+ break;
+ case TGSI_TYPE_SIGNED:
+ *dtypeprefix = INT_BITS_TO_FLOAT;
+ break;
+ default:
+ break;
+ }
+ }
+
+ /*
+ * TGSI gurantees there's only one destination register
+ *
+ * "An opcode may have up to one destination register, known as dst, and between zero and three
+ * source registers, called src0 through src2, or simply src if there is only one."
+ */
+ dst_reg = &inst->Dst[0];
+ *dst_override_no_wm = false;
+ if (dst_reg->Register.WriteMask != TGSI_WRITEMASK_XYZW) {
+ int wm_idx = 0;
+ writemask[wm_idx++] = '.';
+ if (dst_reg->Register.WriteMask & 0x1)
+ writemask[wm_idx++] = 'x';
+ if (dst_reg->Register.WriteMask & 0x2)
+ writemask[wm_idx++] = 'y';
+ if (dst_reg->Register.WriteMask & 0x4)
+ writemask[wm_idx++] = 'z';
+ if (dst_reg->Register.WriteMask & 0x8)
+ writemask[wm_idx++] = 'w';
+
+ *dstconv = FLOAT + wm_idx - 2;
+ *udstconv = UINT + wm_idx - 2;
+ } else {
+ *dstconv = VEC4;
+ *udstconv = UVEC4;
+ }
+
+ if (dst_reg->Register.File == TGSI_FILE_OUTPUT) {
+ for (uint32_t j = 0; j < ctx->num_outputs; j++) {
+ if (ctx->outputs[j].first == dst_reg->Register.Index) {
+ if (ctx->glsl_ver_required >= 140 && ctx->outputs[j].name == TGSI_SEMANTIC_CLIPVERTEX) {
+ snprintf(dst, 255, "clipv_tmp");
+ } else if (ctx->outputs[j].name == TGSI_SEMANTIC_CLIPDIST) {
+ snprintf(dst, 255, "clip_dist_temp[%d]", ctx->outputs[j].sid);
+ } else if (ctx->outputs[j].name == TGSI_SEMANTIC_SAMPLEMASK) {
+ int idx;
+ switch (dst_reg->Register.WriteMask) {
+ case 0x1: idx = 0; break;
+ case 0x2: idx = 1; break;
+ case 0x4: idx = 2; break;
+ case 0x8: idx = 3; break;
+ default:
+ idx = 0;
+ break;
+ }
+ snprintf(dst, 255, "%s[%d]", ctx->outputs[j].glsl_name, idx);
+ if (ctx->outputs[j].is_int) {
+ *dtypeprefix = FLOAT_BITS_TO_INT;
+ *dstconv = INT;
+ }
+ } else {
+ snprintf(dst, 255, "%s%s", ctx->outputs[j].glsl_name, ctx->outputs[j].override_no_wm ? "" : writemask);
+ *dst_override_no_wm = ctx->outputs[j].override_no_wm;
+ if (ctx->outputs[j].is_int) {
+ if (dtypeprefix == TYPE_CONVERSION_NONE)
+ *dtypeprefix = FLOAT_BITS_TO_INT;
+ *dstconv = INT;
+ }
+ if (ctx->outputs[j].name == TGSI_SEMANTIC_PSIZE) {
+ *dstconv = FLOAT;
+ break;
+ }
+ }
+ }
+ }
+ }
+ else if (dst_reg->Register.File == TGSI_FILE_TEMPORARY) {
+ struct vrend_temp_range *range = find_temp_range(ctx, dst_reg->Register.Index);
+ if (!range)
+ return FALSE;
+ if (dst_reg->Register.Indirect) {
+ snprintf(dst, 255, "temp%d[addr0 + %d]%s", range->first, dst_reg->Register.Index - range->first, writemask);
+ } else
+ snprintf(dst, 255, "temp%d[%d]%s", range->first, dst_reg->Register.Index - range->first, writemask);
+ }
+
+ return 0;
+}
+
+
static boolean
iter_instruction(struct tgsi_iterate_context *iter,
struct tgsi_full_instruction *inst)
{
struct dump_ctx *ctx = (struct dump_ctx *)iter;
- char srcs[4][255], dsts[3][255], buf[512];
+ char srcs[4][255], dst[255], buf[512];
uint instno = ctx->instno++;
int i;
int j;
int sreg_index = 0;
char writemask[6] = {0};
- enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(inst->Instruction.Opcode);
enum tgsi_opcode_type stype = tgsi_opcode_infer_src_type(inst->Instruction.Opcode);
bool stprefix = false;
bool override_no_wm[4];
- bool dst_override_no_wm[2];
+ bool dst_override_no_wm;
char *sret;
int ret;
@@ -1650,25 +1759,9 @@ iter_instruction(struct tgsi_iterate_context *iter,
if (ctx->prog_type == -1)
ctx->prog_type = iter->processor.Processor;
- if (dtype == TGSI_TYPE_SIGNED || dtype == TGSI_TYPE_UNSIGNED ||
- stype == TGSI_TYPE_SIGNED || stype == TGSI_TYPE_UNSIGNED)
+ if (stype == TGSI_TYPE_SIGNED || stype == TGSI_TYPE_UNSIGNED)
ctx->has_ints = true;
- if (inst->Instruction.Opcode == TGSI_OPCODE_TXQ) {
- dtypeprefix = INT_BITS_TO_FLOAT;
- } else {
- switch (dtype) {
- case TGSI_TYPE_UNSIGNED:
- dtypeprefix = UINT_BITS_TO_FLOAT;
- break;
- case TGSI_TYPE_SIGNED:
- dtypeprefix = INT_BITS_TO_FLOAT;
- break;
- default:
- break;
- }
- }
-
switch (stype) {
case TGSI_TYPE_UNSIGNED:
stypeprefix = FLOAT_BITS_TO_UINT;
@@ -1694,77 +1787,10 @@ iter_instruction(struct tgsi_iterate_context *iter,
return FALSE;
}
}
- for (i = 0; i < inst->Instruction.NumDstRegs; i++) {
- const struct tgsi_full_dst_register *dst = &inst->Dst[i];
- dst_override_no_wm[i] = false;
- if (dst->Register.WriteMask != TGSI_WRITEMASK_XYZW) {
- int wm_idx = 0;
- writemask[wm_idx++] = '.';
- if (dst->Register.WriteMask & 0x1)
- writemask[wm_idx++] = 'x';
- if (dst->Register.WriteMask & 0x2)
- writemask[wm_idx++] = 'y';
- if (dst->Register.WriteMask & 0x4)
- writemask[wm_idx++] = 'z';
- if (dst->Register.WriteMask & 0x8)
- writemask[wm_idx++] = 'w';
-
- dstconv = FLOAT + wm_idx - 2;
- udstconv = UINT + wm_idx - 2;
- } else {
- dstconv = VEC4;
- udstconv = UVEC4;
- }
- if (dst->Register.File == TGSI_FILE_OUTPUT) {
- for (j = 0; j < ctx->num_outputs; j++) {
- if (ctx->outputs[j].first == dst->Register.Index) {
- if (ctx->glsl_ver_required >= 140 && ctx->outputs[j].name == TGSI_SEMANTIC_CLIPVERTEX) {
- snprintf(dsts[i], 255, "clipv_tmp");
- } else if (ctx->outputs[j].name == TGSI_SEMANTIC_CLIPDIST) {
- snprintf(dsts[i], 255, "clip_dist_temp[%d]", ctx->outputs[j].sid);
- } else if (ctx->outputs[j].name == TGSI_SEMANTIC_SAMPLEMASK) {
- int idx;
- switch (dst->Register.WriteMask) {
- case 0x1: idx = 0; break;
- case 0x2: idx = 1; break;
- case 0x4: idx = 2; break;
- case 0x8: idx = 3; break;
- default:
- idx = 0;
- break;
- }
- snprintf(dsts[i], 255, "%s[%d]", ctx->outputs[j].glsl_name, idx);
- if (ctx->outputs[j].is_int) {
- dtypeprefix = FLOAT_BITS_TO_INT;
- dstconv = INT;
- }
- } else {
- snprintf(dsts[i], 255, "%s%s", ctx->outputs[j].glsl_name, ctx->outputs[j].override_no_wm ? "" : writemask);
- dst_override_no_wm[i] = ctx->outputs[j].override_no_wm;
- if (ctx->outputs[j].is_int) {
- if (dtypeprefix == TYPE_CONVERSION_NONE)
- dtypeprefix = FLOAT_BITS_TO_INT;
- dstconv = INT;
- }
- if (ctx->outputs[j].name == TGSI_SEMANTIC_PSIZE) {
- dstconv = FLOAT;
- break;
- }
- }
- }
- }
- }
- else if (dst->Register.File == TGSI_FILE_TEMPORARY) {
- struct vrend_temp_range *range = find_temp_range(ctx, dst->Register.Index);
- if (!range)
- return FALSE;
- if (dst->Register.Indirect) {
- snprintf(dsts[i], 255, "temp%d[addr0 + %d]%s", range->first, dst->Register.Index - range->first, writemask);
- } else
- snprintf(dsts[i], 255, "temp%d[%d]%s", range->first, dst->Register.Index - range->first, writemask);
- }
- }
+ ret = get_destination_info(ctx, inst, &dtypeprefix, &dstconv, &udstconv, &dst_override_no_wm, dst, writemask);
+ if (ret)
+ return FALSE;
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *src = &inst->Src[i];
@@ -1951,39 +1977,39 @@ iter_instruction(struct tgsi_iterate_context *iter,
}
switch (inst->Instruction.Opcode) {
case TGSI_OPCODE_SQRT:
- snprintf(buf, 255, "%s = sqrt(vec4(%s))%s;\n", dsts[0], srcs[0], writemask);
+ snprintf(buf, 255, "%s = sqrt(vec4(%s))%s;\n", dst, srcs[0], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_LRP:
- snprintf(buf, 255, "%s = mix(vec4(%s), vec4(%s), vec4(%s))%s;\n", dsts[0], srcs[2], srcs[1], srcs[0], writemask);
+ snprintf(buf, 255, "%s = mix(vec4(%s), vec4(%s), vec4(%s))%s;\n", dst, srcs[2], srcs[1], srcs[0], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_DP2:
- snprintf(buf, 255, "%s = %s(dot(vec2(%s), vec2(%s)));\n", dsts[0], get_string(dstconv), srcs[0], srcs[1]);
+ snprintf(buf, 255, "%s = %s(dot(vec2(%s), vec2(%s)));\n", dst, get_string(dstconv), srcs[0], srcs[1]);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_DP3:
- snprintf(buf, 255, "%s = %s(dot(vec3(%s), vec3(%s)));\n", dsts[0], get_string(dstconv), srcs[0], srcs[1]);
+ snprintf(buf, 255, "%s = %s(dot(vec3(%s), vec3(%s)));\n", dst, get_string(dstconv), srcs[0], srcs[1]);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_DP4:
- snprintf(buf, 255, "%s = %s(dot(vec4(%s), vec4(%s)));\n", dsts[0], get_string(dstconv), srcs[0], srcs[1]);
+ snprintf(buf, 255, "%s = %s(dot(vec4(%s), vec4(%s)));\n", dst, get_string(dstconv), srcs[0], srcs[1]);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_DPH:
- snprintf(buf, 255, "%s = %s(dot(vec4(vec3(%s), 1.0), vec4(%s)));\n", dsts[0], get_string(dstconv), srcs[0], srcs[1]);
+ snprintf(buf, 255, "%s = %s(dot(vec4(vec3(%s), 1.0), vec4(%s)));\n", dst, get_string(dstconv), srcs[0], srcs[1]);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_MAX:
case TGSI_OPCODE_IMAX:
case TGSI_OPCODE_UMAX:
- snprintf(buf, 255, "%s = %s(%s(max(%s, %s)));\n", dsts[0], get_string(dstconv), get_string(dtypeprefix), srcs[0], srcs[1]);
+ snprintf(buf, 255, "%s = %s(%s(max(%s, %s)));\n", dst, get_string(dstconv), get_string(dtypeprefix), srcs[0], srcs[1]);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_MIN:
case TGSI_OPCODE_IMIN:
case TGSI_OPCODE_UMIN:
- snprintf(buf, 255, "%s = %s(%s(min(%s, %s)));\n", dsts[0], get_string(dstconv), get_string(dtypeprefix), srcs[0], srcs[1]);
+ snprintf(buf, 255, "%s = %s(%s(min(%s, %s)));\n", dst, get_string(dstconv), get_string(dtypeprefix), srcs[0], srcs[1]);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_ABS:
@@ -2017,12 +2043,12 @@ iter_instruction(struct tgsi_iterate_context *iter,
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_DST:
- snprintf(buf, 512, "%s = vec4(1.0, %s.y * %s.y, %s.z, %s.w);\n", dsts[0],
+ snprintf(buf, 512, "%s = vec4(1.0, %s.y * %s.y, %s.z, %s.w);\n", dst,
srcs[0], srcs[1], srcs[0], srcs[1]);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_LIT:
- snprintf(buf, 512, "%s = %s(vec4(1.0, max(%s.x, 0.0), step(0.0, %s.x) * pow(max(0.0, %s.y), clamp(%s.w, -128.0, 128.0)), 1.0)%s);\n", dsts[0], get_string(dstconv), srcs[0], srcs[0], srcs[0], srcs[0], writemask);
+ snprintf(buf, 512, "%s = %s(vec4(1.0, max(%s.x, 0.0), step(0.0, %s.x) * pow(max(0.0, %s.y), clamp(%s.w, -128.0, 128.0)), 1.0)%s);\n", dst, get_string(dstconv), srcs[0], srcs[0], srcs[0], srcs[0], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_EX2:
@@ -2034,11 +2060,11 @@ iter_instruction(struct tgsi_iterate_context *iter,
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_EXP:
- snprintf(buf, 512, "%s = %s(vec4(pow(2.0, floor(%s.x)), %s.x - floor(%s.x), exp2(%s.x), 1.0)%s);\n", dsts[0], get_string(dstconv), srcs[0], srcs[0], srcs[0], srcs[0], writemask);
+ snprintf(buf, 512, "%s = %s(vec4(pow(2.0, floor(%s.x)), %s.x - floor(%s.x), exp2(%s.x), 1.0)%s);\n", dst, get_string(dstconv), srcs[0], srcs[0], srcs[0], srcs[0], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_LOG:
- snprintf(buf, 512, "%s = %s(vec4(floor(log2(%s.x)), %s.x / pow(2.0, floor(log2(%s.x))), log2(%s.x), 1.0)%s);\n", dsts[0], get_string(dstconv), srcs[0], srcs[0], srcs[0], srcs[0], writemask);
+ snprintf(buf, 512, "%s = %s(vec4(floor(log2(%s.x)), %s.x / pow(2.0, floor(log2(%s.x))), log2(%s.x), 1.0)%s);\n", dst, get_string(dstconv), srcs[0], srcs[0], srcs[0], srcs[0], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_COS:
@@ -2050,7 +2076,7 @@ iter_instruction(struct tgsi_iterate_context *iter,
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_SCS:
- snprintf(buf, 255, "%s = %s(vec4(cos(%s.x), sin(%s.x), 0, 1)%s);\n", dsts[0], get_string(dstconv),
+ snprintf(buf, 255, "%s = %s(vec4(cos(%s.x), sin(%s.x), 0, 1)%s);\n", dst, get_string(dstconv),
srcs[0], srcs[0], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
@@ -2063,7 +2089,7 @@ iter_instruction(struct tgsi_iterate_context *iter,
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_RCP:
- snprintf(buf, 255, "%s = %s(1.0/(%s));\n", dsts[0], get_string(dstconv), srcs[0]);
+ snprintf(buf, 255, "%s = %s(1.0/(%s));\n", dst, get_string(dstconv), srcs[0]);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_FLR:
@@ -2095,11 +2121,11 @@ iter_instruction(struct tgsi_iterate_context *iter,
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_RSQ:
- snprintf(buf, 255, "%s = %s(inversesqrt(%s.x));\n", dsts[0], get_string(dstconv), srcs[0]);
+ snprintf(buf, 255, "%s = %s(inversesqrt(%s.x));\n", dst, get_string(dstconv), srcs[0]);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_MOV:
- snprintf(buf, 255, "%s = %s(%s(%s%s));\n", dsts[0], get_string(dstconv), get_string(dtypeprefix), srcs[0], override_no_wm[0] ? "" : writemask);
+ snprintf(buf, 255, "%s = %s(%s(%s%s));\n", dst, get_string(dstconv), get_string(dtypeprefix), srcs[0], override_no_wm[0] ? "" : writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_ADD:
@@ -2107,7 +2133,7 @@ iter_instruction(struct tgsi_iterate_context *iter,
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_UADD:
- snprintf(buf, 255, "%s = %s(%s(ivec4((uvec4(%s) + uvec4(%s))))%s);\n", dsts[0], get_string(dstconv), get_string(dtypeprefix), srcs[0], srcs[1], writemask);
+ snprintf(buf, 255, "%s = %s(%s(ivec4((uvec4(%s) + uvec4(%s))))%s);\n", dst, get_string(dstconv), get_string(dtypeprefix), srcs[0], srcs[1], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_SUB:
@@ -2123,19 +2149,19 @@ iter_instruction(struct tgsi_iterate_context *iter,
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_UMUL:
- snprintf(buf, 255, "%s = %s(%s((uvec4(%s) * uvec4(%s)))%s);\n", dsts[0], get_string(dstconv), get_string(dtypeprefix), srcs[0], srcs[1], writemask);
+ snprintf(buf, 255, "%s = %s(%s((uvec4(%s) * uvec4(%s)))%s);\n", dst, get_string(dstconv), get_string(dtypeprefix), srcs[0], srcs[1], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_UMOD:
- snprintf(buf, 255, "%s = %s(%s((uvec4(%s) %% uvec4(%s)))%s);\n", dsts[0], get_string(dstconv), get_string(dtypeprefix), srcs[0], srcs[1], writemask);
+ snprintf(buf, 255, "%s = %s(%s((uvec4(%s) %% uvec4(%s)))%s);\n", dst, get_string(dstconv), get_string(dtypeprefix), srcs[0], srcs[1], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_IDIV:
- snprintf(buf, 255, "%s = %s(%s((ivec4(%s) / ivec4(%s)))%s);\n", dsts[0], get_string(dstconv), get_string(dtypeprefix), srcs[0], srcs[1], writemask);
+ snprintf(buf, 255, "%s = %s(%s((ivec4(%s) / ivec4(%s)))%s);\n", dst, get_string(dstconv), get_string(dtypeprefix), srcs[0], srcs[1], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_UDIV:
- snprintf(buf, 255, "%s = %s(%s((uvec4(%s) / uvec4(%s)))%s);\n", dsts[0], get_string(dstconv), get_string(dtypeprefix), srcs[0], srcs[1], writemask);
+ snprintf(buf, 255, "%s = %s(%s((uvec4(%s) / uvec4(%s)))%s);\n", dst, get_string(dstconv), get_string(dtypeprefix), srcs[0], srcs[1], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_ISHR:
@@ -2148,11 +2174,11 @@ iter_instruction(struct tgsi_iterate_context *iter,
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_MAD:
- snprintf(buf, 255, "%s = %s((%s * %s + %s)%s);\n", dsts[0], get_string(dstconv), srcs[0], srcs[1], srcs[2], writemask);
+ snprintf(buf, 255, "%s = %s((%s * %s + %s)%s);\n", dst, get_string(dstconv), srcs[0], srcs[1], srcs[2], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_UMAD:
- snprintf(buf, 255, "%s = %s(%s((%s * %s + %s)%s));\n", dsts[0], get_string(dstconv), get_string(dtypeprefix), srcs[0], srcs[1], srcs[2], writemask);
+ snprintf(buf, 255, "%s = %s(%s((%s * %s + %s)%s));\n", dst, get_string(dstconv), get_string(dtypeprefix), srcs[0], srcs[1], srcs[2], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_OR:
@@ -2183,32 +2209,32 @@ iter_instruction(struct tgsi_iterate_context *iter,
case TGSI_OPCODE_TXP:
case TGSI_OPCODE_TXQ:
case TGSI_OPCODE_LODQ:
- ret = translate_tex(ctx, inst, sreg_index, srcs, dsts, writemask, get_string(dstconv), dst_override_no_wm[0]);
+ ret = translate_tex(ctx, inst, sreg_index, srcs, dst, writemask, get_string(dstconv), dst_override_no_wm);
if (ret)
return FALSE;
break;
case TGSI_OPCODE_I2F:
- snprintf(buf, 255, "%s = %s(ivec4(%s)%s);\n", dsts[0], get_string(dstconv), srcs[0], writemask);
+ snprintf(buf, 255, "%s = %s(ivec4(%s)%s);\n", dst, get_string(dstconv), srcs[0], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_U2F:
- snprintf(buf, 255, "%s = %s(uvec4(%s)%s);\n", dsts[0], get_string(dstconv), srcs[0], writemask);
+ snprintf(buf, 255, "%s = %s(uvec4(%s)%s);\n", dst, get_string(dstconv), srcs[0], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_F2I:
- snprintf(buf, 255, "%s = %s(%s(ivec4(%s))%s);\n", dsts[0], get_string(dstconv), get_string(dtypeprefix), srcs[0], writemask);
+ snprintf(buf, 255, "%s = %s(%s(ivec4(%s))%s);\n", dst, get_string(dstconv), get_string(dtypeprefix), srcs[0], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_F2U:
- snprintf(buf, 255, "%s = %s(%s(uvec4(%s))%s);\n", dsts[0], get_string(dstconv), get_string(dtypeprefix), srcs[0], writemask);
+ snprintf(buf, 255, "%s = %s(%s(uvec4(%s))%s);\n", dst, get_string(dstconv), get_string(dtypeprefix), srcs[0], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_NOT:
- snprintf(buf, 255, "%s = %s(uintBitsToFloat(~(uvec4(%s))));\n", dsts[0], get_string(dstconv), srcs[0]);
+ snprintf(buf, 255, "%s = %s(uintBitsToFloat(~(uvec4(%s))));\n", dst, get_string(dstconv), srcs[0]);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_INEG:
- snprintf(buf, 255, "%s = %s(intBitsToFloat(-(ivec4(%s))));\n", dsts[0], get_string(dstconv), srcs[0]);
+ snprintf(buf, 255, "%s = %s(intBitsToFloat(-(ivec4(%s))));\n", dst, get_string(dstconv), srcs[0]);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_SEQ:
@@ -2250,15 +2276,15 @@ iter_instruction(struct tgsi_iterate_context *iter,
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_POW:
- snprintf(buf, 255, "%s = %s(pow(%s, %s));\n", dsts[0], get_string(dstconv), srcs[0], srcs[1]);
+ snprintf(buf, 255, "%s = %s(pow(%s, %s));\n", dst, get_string(dstconv), srcs[0], srcs[1]);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_CMP:
- snprintf(buf, 255, "%s = mix(%s, %s, greaterThanEqual(%s, vec4(0.0)))%s;\n", dsts[0], srcs[1], srcs[2], srcs[0], writemask);
+ snprintf(buf, 255, "%s = mix(%s, %s, greaterThanEqual(%s, vec4(0.0)))%s;\n", dst, srcs[1], srcs[2], srcs[0], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_UCMP:
- snprintf(buf, 512, "%s = mix(%s, %s, notEqual(floatBitsToUint(%s), uvec4(0.0)))%s;\n", dsts[0], srcs[2], srcs[1], srcs[0], writemask);
+ snprintf(buf, 512, "%s = mix(%s, %s, notEqual(floatBitsToUint(%s), uvec4(0.0)))%s;\n", dst, srcs[2], srcs[1], srcs[0], writemask);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_END:
@@ -2292,7 +2318,7 @@ iter_instruction(struct tgsi_iterate_context *iter,
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_XPD:
- snprintf(buf, 255, "%s = %s(cross(vec3(%s), vec3(%s)));\n", dsts[0], get_string(dstconv), srcs[0], srcs[1]);
+ snprintf(buf, 255, "%s = %s(cross(vec3(%s), vec3(%s)));\n", dst, get_string(dstconv), srcs[0], srcs[1]);
EMIT_BUF_WITH_RET(ctx, buf);
break;
case TGSI_OPCODE_BGNLOOP:
@@ -2332,7 +2358,7 @@ iter_instruction(struct tgsi_iterate_context *iter,
}
if (inst->Instruction.Saturate) {
- snprintf(buf, 255, "%s = clamp(%s, 0.0, 1.0);\n", dsts[0], dsts[0]);
+ snprintf(buf, 255, "%s = clamp(%s, 0.0, 1.0);\n", dst, dst);
EMIT_BUF_WITH_RET(ctx, buf);
}
return TRUE;
--
2.17.0.441.gb46fe60e1d-goog
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