[virglrenderer-devel] coherent memory access for virgl

Gerd Hoffmann kraxel at redhat.com
Tue Sep 4 12:15:49 UTC 2018


  Hi,

> > Also: how frequently will these objects be allocated/freed?
> > 
> > I suspect GL_ARB_buffer_storage not so often.
> > 
> > But vulkan?  It probably wants pretty much everything allocated that
> > way.  I expect it to be designed with the memory management capabilities
> > of modern GPUs in mind.  Don't know much about vulkan though ...
> 
> It's a good practice to suballocate because allocation is considered
> expensive, but I guess that doesn't automatically mean that we can make
> allocations 10x slower...

So the mesa driver will ask for larger chunks and then hand out small
allocations from that, right?  Would something like this be enough?

    struct virtio_gpu_resource_create_coherent {
	struct virtio_gpu_ctrl_hdr hdr;
	uint32_t resource_id;
	uint32_t flags;
	uint64_t offset; /* into pci bar */
	uint64_t size;
    };

Or would we need the individual allocations be visible at virtio level,
so we can tell virglrenderer, with something like this:

    struct virtio_gpu_pool_create_coherent {
	struct virtio_gpu_ctrl_hdr hdr;
	uint32_t pool_id;
	uint32_t flags;
	uint64_t offset; /* into pci bar */
	uint64_t size;
    };

    struct virtio_gpu_resource_create_coherent {
	struct virtio_gpu_ctrl_hdr hdr;
	uint32_t pool_id;
	uint32_t resource_id;
	uint64_t offset; /* into pool */
	uint64_t size;
    };

Who will do the actual allocations?  I expect we need new virglrenderer
functions for that?

> > I can look into this once I'm done with the vacation backlog.
> 
> Do you want any help with prototyping this?

So far I have just a single patch adding a (not yet used) pci bar.

https://git.kraxel.org/cgit/qemu/log/?h=sirius/virtio-gpu-hostmap

Before continuing I need a more clear picture how the allocation
workflow is going to work (see questions above), for both
GL_ARB_buffer_storage and vulkan.  So, yes, help with that is welcome.

cheers,
  Gerd



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