<div dir="ltr"><div dir="ltr">On Thu, Jan 21, 2021 at 9:58 PM <<a href="mailto:Leo.YS.Chen@acer.com">Leo.YS.Chen@acer.com</a>> wrote:<br></div><div class="gmail_quote"><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">





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<p class="MsoNormal"><span lang="EN-US">Hi ,<u></u><u></u></span></p>
<p class="MsoNormal"><span lang="EN-US"><u></u> <u></u></span></p>
<p class="MsoNormal"><span lang="EN-US">I am software engineer from Acer.<u></u><u></u></span></p>
<p class="MsoNormal"><span lang="EN-US">I am studying mesa's virgl now.<u></u><u></u></span></p>
<p class="MsoNormal"><span lang="EN-US">I want to know more detail about architecture of mesa's virgl.
<u></u><u></u></span></p>
<p class="MsoNormal"><span lang="EN-US">Could you give me the flowchart or graph architecture of virgl?</span></p></div></div></blockquote><div>There is a simple diagram at</div><div><br></div><div>  <a href="https://gitlab.freedesktop.org/virgl/virglrenderer/-/issues/175">https://gitlab.freedesktop.org/virgl/virglrenderer/-/issues/175</a></div><div><br></div><div>But you should be able to find better materials such as</div><div><br></div><div>  <a href="https://archive.fosdem.org/2019/schedule/event/virtual_gpu/attachments/slides/3353/export/events/attachments/virtual_gpu/slides/3353/Virgl_Presentation_FOSDEM2019.pdf">https://archive.fosdem.org/2019/schedule/event/virtual_gpu/attachments/slides/3353/export/events/attachments/virtual_gpu/slides/3353/Virgl_Presentation_FOSDEM2019.pdf</a></div><div><br></div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div lang="ZH-TW"><div><p class="MsoNormal"><span lang="EN-US"><u></u><u></u></span></p>
<p class="MsoNormal"><span lang="EN-US"><u></u> <u></u></span></p>
<p class="MsoNormal"><span lang="EN-US">Thank you very much.<u></u><u></u></span></p>
<p class="MsoNormal"><span lang="EN-US"><u></u> <u></u></span></p>
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