[V7 42/45] drm/amd/display: add 3D LUT colorop
Leo Li
sunpeng.li at amd.com
Thu Feb 13 18:21:04 UTC 2025
On 2024-12-19 23:33, Alex Hung wrote:
> This adds support for a 3D LUT.
>
> The color pipeline now consists of the following colorops:
> 1. 1D curve colorop
> 2. Multiplier
> 3. 3x4 CTM
> 4. 1D curve colorop
> 5. 1D LUT
> 6. 3D LUT
> 7. 1D curve colorop
> 8. 1D LUT
>
> Signed-off-by: Alex Hung <alex.hung at amd.com>
> ---
> v7:
> - Simplify 3D LUT according to drm_colorop changes (Simon Ser)
>
> .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 100 +++++++++++++++++-
> .../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 19 ++++
> 2 files changed, 116 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> index 54ec12c1352f..5e8c5c0657c4 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> @@ -1282,7 +1282,8 @@ __set_dm_plane_colorop_multiplier(struct drm_plane_state *plane_state,
> static int
> __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state,
> struct dc_plane_state *dc_plane_state,
> - struct drm_colorop *colorop)
> + struct drm_colorop *colorop,
> + bool *enabled)
> {
> struct drm_colorop *old_colorop;
> struct drm_colorop_state *colorop_state = NULL, *new_colorop_state;
> @@ -1310,6 +1311,7 @@ __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state,
> tf->tf = default_tf = amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type);
> tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE;
> __set_output_tf(tf, 0, 0, false);
> + *enabled = true;
> }
>
> /* 1D LUT - SHAPER LUT */
> @@ -1337,8 +1339,88 @@ __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state,
> shaper_size = shaper_lut != NULL ? shaper_size : 0;
>
> /* Custom LUT size must be the same as supported size */
> - if (shaper_size == colorop->lut_size)
> + if (shaper_size == colorop->lut_size) {
> __set_output_tf(tf, shaper_lut, shaper_size, false);
> + *enabled = true;
> + }
> + }
> +
> + return 0;
> +}
> +
> +/* __set_colorop_3dlut - set DRM 3D LUT to DC stream
> + * @drm_lut3d: user 3D LUT
> + * @drm_lut3d_size: size of 3D LUT
> + * @lut3d: DC 3D LUT
> + *
> + * Map user 3D LUT data to DC 3D LUT and all necessary bits to program it
> + * on DCN accordingly.
> + */
> +static void __set_colorop_3dlut(const struct drm_color_lut *drm_lut3d,
> + uint32_t drm_lut3d_size,
> + struct dc_3dlut *lut)
> +{
> + if (!drm_lut3d_size)
> + return;
> +
> + lut->state.bits.initialized = 0;
> +
> + /* Only supports 17x17x17 3D LUT (12-bit) now */
> + lut->lut_3d.use_12bits = true;
> + lut->lut_3d.use_tetrahedral_9 = false;
> +
> + lut->state.bits.initialized = 1;
> + __drm_3dlut_to_dc_3dlut(drm_lut3d, drm_lut3d_size, &lut->lut_3d,
> + lut->lut_3d.use_tetrahedral_9, 12);
> +
> +}
> +
> +static int
> +__set_dm_plane_colorop_3dlut(struct drm_plane_state *plane_state,
> + struct dc_plane_state *dc_plane_state,
> + struct drm_colorop *colorop,
> + bool shaper_enabled)
> +{
> + struct drm_colorop *old_colorop;
> + struct drm_colorop_state *colorop_state = NULL, *new_colorop_state;
> + struct dc_transfer_func *tf = &dc_plane_state->in_shaper_func;
> + struct drm_atomic_state *state = plane_state->state;
> + const struct amdgpu_device *adev = drm_to_adev(colorop->dev);
> + const struct drm_device *dev = colorop->dev;
> + const struct drm_color_lut *lut3d;
> + uint32_t lut3d_size;
> + int i = 0;
> +
> + /* 3D LUT */
> + old_colorop = colorop;
> + for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
> + if (new_colorop_state->colorop == old_colorop &&
> + new_colorop_state->colorop->type == DRM_COLOROP_3D_LUT) {
> + colorop_state = new_colorop_state;
> + break;
> + }
> + }
> +
> + if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_3D_LUT) {
> + if (!adev->dm.dc->caps.color.dpp.hw_3d_lut) {
> + drm_dbg(dev, "3D LUT is not supported by hardware\n");
> + return 0;
Should an error be returned instead?
-Leo
> + }
> +
> + drm_dbg(dev, "3D LUT colorop with ID: %d\n", colorop->base.id);
> + lut3d = __extract_blob_lut(colorop_state->data, &lut3d_size);
> + lut3d_size = lut3d != NULL ? lut3d_size : 0;
> + __set_colorop_3dlut(lut3d, lut3d_size, &dc_plane_state->lut3d_func);
> +
> + /* 3D LUT requires shaper. If shaper colorop is bypassed, enable shaper curve
> + * with TRANSFER_FUNCTION_LINEAR
> + */
> + if (!shaper_enabled) {
> + tf->type = TF_TYPE_DISTRIBUTED_POINTS;
> + tf->tf = TRANSFER_FUNCTION_LINEAR;
> + tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE;
> + __set_output_tf(tf, NULL, 0, false);
> + }
Is it possible for an atomic state to have a 3DLUT colorop_state, but not any
shaper colorop_states? For example, say a previous commit enabled the shaper,
and the current commit enables the 3DLUT without any shaper updates?
If so, `shaper_enabled` may not get set to 'true' by
`__set_dm_plane_colorop_shaper` for the current commit, and the previously
programmed shaper would get overwritten by this logic here.
If this is actually an issue, inspect the current shaper state -- if a new one
isn't there -- should work.
- Leo
> }
>
> return 0;
> @@ -1467,6 +1549,7 @@ amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state,
> {
> struct drm_colorop *colorop = plane_state->color_pipeline;
> struct drm_device *dev = plane_state->plane->dev;
> + bool shaper_enabled = false;
> int ret;
>
> /* 1D Curve - DEGAM TF */
> @@ -1506,7 +1589,7 @@ amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state,
> return -EINVAL;
> }
>
> - ret = __set_dm_plane_colorop_shaper(plane_state, dc_plane_state, colorop);
> + ret = __set_dm_plane_colorop_shaper(plane_state, dc_plane_state, colorop, &shaper_enabled);
> if (ret)
> return ret;
>
> @@ -1515,6 +1598,17 @@ amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state,
> if (!colorop)
> return -EINVAL;
>
> + /* 3D LUT */
> + colorop = colorop->next;
> + if (!colorop) {
> + drm_dbg(dev, "no 3D LUT colorop found\n");
> + return -EINVAL;
> + }
> +
> + ret = __set_dm_plane_colorop_3dlut(plane_state, dc_plane_state, colorop, shaper_enabled);
> + if (ret)
> + return ret;
> +
> /* 1D Curve & LUT - BLND TF & LUT */
> colorop = colorop->next;
> if (!colorop) {
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c
> index ec94ff887886..e03e6044f937 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c
> @@ -49,6 +49,8 @@ const u64 amdgpu_dm_supported_blnd_tfs =
>
> #define MAX_COLOR_PIPELINE_OPS 10
>
> +#define LUT3D_SIZE 17
> +
> int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list)
> {
> struct drm_colorop *ops[MAX_COLOR_PIPELINE_OPS];
> @@ -145,6 +147,23 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr
>
> i++;
>
> + /* 3D LUT */
> + ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
> + if (!ops[i]) {
> + DRM_ERROR("KMS: Failed to allocate colorop\n");
> + ret = -ENOMEM;
> + goto cleanup;
> + }
> +
> + ret = drm_colorop_3dlut_init(dev, ops[i], plane, LUT3D_SIZE,
> + DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL, true);
> + if (ret)
> + goto cleanup;
> +
> + drm_colorop_set_next_property(ops[i-1], ops[i]);
> +
> + i++;
> +
> /* 1D curve - BLND TF */
> ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
> if (!ops[i]) {
More information about the wayland-devel
mailing list