<div dir="ltr">Hi all<div><br></div><div>Thank you for your feedback.</div><div><br></div><div>From your opinions, the drm backend r<span style="font-family:Calibri,sans-serif;font-size:11pt">eserve primary plane for each CRTC to avoid the failure
in hotplug cases. However, as weston already enabled DRM_CLIENT_CAP_ATOMIC and
DRM_CLIENT_CAP_UNIVERSAL_PLANES, the concept of primary/overlay is no necessary
</span><a href="https://www.kernel.org/doc/html/latest/gpu/drm-kms.html#c.drm_plane_type" style="font-family:Calibri,sans-serif;font-size:11pt;color:rgb(5,99,193)">https://www.kernel.org/doc/html/latest/gpu/drm-kms.html#c.drm_plane_type</a><span style="font-family:Calibri,sans-serif;font-size:11pt">:</span></div><div>
<p class="MsoNormal" style="margin:0in 0in 0.0001pt;font-size:11pt;font-family:Calibri,sans-serif"> </p>
<p class="MsoNormal" style="margin:0in 0in 0.0001pt 0.5in;font-size:11pt;font-family:Calibri,sans-serif"><span style="font-size:12pt;font-family:"Times New Roman",serif;color:black;background:rgb(252,252,252)">For
historical reasons not all planes are made the same. This enumeration is used
to tell the different types of planes apart to implement the different uapi
semantics for them. For userspace which is universal plane aware and which is
using that atomic IOCTL there's no difference between these planes (beyong what
the driver and hardware can support of course).</span></p>
<p class="MsoNormal" style="margin:0in 0in 0.0001pt;font-size:11pt;font-family:Calibri,sans-serif"> </p>
<p class="MsoNormal" style="margin:0in 0in 0.0001pt;font-size:11pt;font-family:Calibri,sans-serif">So weston should add the proper way to handle the case when
output B is newly connected while output A is using up all planes, e.g. trigger
a repaint for output A with less plane staged if new output B is hotplugged.
This will optimize the general performance of weston and avoid h/w resource
waste.</p>
<p class="MsoNormal" style="margin:0in 0in 0.0001pt;font-size:11pt;font-family:Calibri,sans-serif"> </p>
<p class="MsoNormal" style="margin:0in 0in 0.0001pt;font-size:11pt;font-family:Calibri,sans-serif">It’s popular that the number of CRTCs is more than the
number of outputs. A typical use case is DP-MST, where there could be multiple
outputs in the daisy chain but total link rate is limited, e.g. H/W can either
support 2 monitors with 4K output, or 4 monitors with 2K output. 4 CRTCs will
be created at boot to support the 4 monitors with 2K output use case, but for 2
monitors with 4K output use case two planes will be completely wasted.</p><p class="MsoNormal" style="margin:0in 0in 0.0001pt;font-size:11pt;font-family:Calibri,sans-serif"><br></p><p class="MsoNormal" style="margin:0in 0in 0.0001pt;font-size:11pt;font-family:Calibri,sans-serif">Thank you!</p><p class="MsoNormal" style="margin:0in 0in 0.0001pt;font-size:11pt;font-family:Calibri,sans-serif"><br></p><p class="MsoNormal" style="margin:0in 0in 0.0001pt;font-size:11pt;font-family:Calibri,sans-serif">Best Regards</p><p class="MsoNormal" style="margin:0in 0in 0.0001pt;font-size:11pt;font-family:Calibri,sans-serif">Nancy</p></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">Pekka Paalanen <<a href="mailto:ppaalanen@gmail.com">ppaalanen@gmail.com</a>> 于2019年9月18日周三 下午3:54写道:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">On Tue, 17 Sep 2019 10:02:44 +0000<br>
Simon Ser <<a href="mailto:contact@emersion.fr" target="_blank">contact@emersion.fr</a>> wrote:<br>
<br>
> On Tuesday, September 17, 2019 12:29 PM, Pekka Paalanen <<a href="mailto:ppaalanen@gmail.com" target="_blank">ppaalanen@gmail.com</a>> wrote:<br>
> <br>
> > On Tue, 17 Sep 2019 19:50:01 +1200<br>
> > Scott Anderson <a href="mailto:scott.anderson@collabora.com" target="_blank">scott.anderson@collabora.com</a> wrote:<br>
> > <br>
> > > On 17/09/19 7:38 pm, zou lan wrote:<br>
> > > <br>
> > > > Hi Daniel & all<br>
> > > > I find the function drm_output_prepare_overlay_view() only use the plane<br>
> > > > type of WDRM_PLANE_TYPE_OVERLAY. it could be a waste for some planes of<br>
> > > > type WDRM_PLANE_TYPE_PRIMARY if the universal planes is enable.<br>
> > > > For example, the kernel define 6 crtcs, and each crtc will have one<br>
> > > > primary type plane, but not all of the crtcs are used by weston_output.<br>
> > > > Some crtcs may never used, if we reserve all the primary type planes as<br>
> > > > scanout plane, that could waste some of them.<br>
> > > > Could the open source drm backend modify the logic of judge the overlay<br>
> > > > plane? let the primary plane equal to overlay plane or judge in<br>
> > > > drm_output_prepare_overlay_view(), if the plane is not used by outputs,<br>
> > > > it could be used by overlay?<br>
> > > > Thank you!<br>
> > > > Best regards<br>
> > > > Nancy<br>
> > > > Hi, <br>
> > ><br>
> > > As far as I'm aware, the kernel never advertises more than one primary<br>
> > > plane per CRTC and they're never possible to be used with multiple<br>
> > > CRTCs:<br>
> > > <a href="https://www.kernel.org/doc/html/latest/gpu/drm-kms.html#plane-abstraction" rel="noreferrer" target="_blank">https://www.kernel.org/doc/html/latest/gpu/drm-kms.html#plane-abstraction</a><br>
> > > <br>
> > > > All drivers should provide one primary plane per CRTC to avoid<br>
> > > > surprising userspace too much <br>
> > ><br>
> > > Perhaps that restriction is not as strict as I interpret it to be, but<br>
> > > I'm not aware of anything which does not have a one-to-one relationship<br>
> > > between primary planes and CRTCs. <br>
> ><br>
> > If the kernel actually did expose multiple primary planes on the same<br>
> > CRTC, they would also need zpos property to tell their stacking order,<br>
> > and Weston needs to use it (which it does not yet).<br>
> ><br>
> > However, given the special expectations that all userspace likely has<br>
> > for primary planes, the kernel driver might be better exposing more<br>
> > planes of type OVERLAY while internally mapping them to the "other<br>
> > primary planes".<br>
> ><br>
> > However, that would still pose a problem, that userspace would need to<br>
> > know to disable some/all overlay planes when activating a new output<br>
> > fails and try again with the hope that a primary plane was made<br>
> > available under the hood. That would be pretty special. So it is<br>
> > possible that exposing the additional planes would break existing<br>
> > userspace for hotplug output activation under special circumstances<br>
> > (overlay planes used on old outputs). <br>
> <br>
> I don't think that's an issue. Enabling overlay planes can fail for a<br>
> lot of other reasons, including for instance bandwidth limitations.<br>
<br>
Sure, an overlay plane failing is not an issue. A primary plane failing<br>
when no overlays on *that* CRTC are in used is an issue.<br>
<br>
To clarify, let's assume we have outputs A and B, and CRTCs A and B<br>
respectively.<br>
<br>
Output A is active, using one primary plane and three overlays on CRTC<br>
A. Output B is off.<br>
<br>
Output B needs to be activated. It needs a primary plane on CRTC B.<br>
However, no primary planes are actually usable, because output A is<br>
using them all. The compositor probably does not guess that it needs to<br>
stop using overlays on output A to be able to turn output B on.(*)<br>
<br>
If previously it was impossible for output A to use up all primary<br>
planes, enabling output B always succeeded. If the kernel driver then<br>
offers all primary planes on all CRTCs, allowing CRTC A to use them all<br>
up, then enabling output B will fail. By definition, this is a kernel<br>
induced regression: it used to work, then you upgraded the kernel, and<br>
now it doesn't work.<br>
<br>
(*) Or should it guess? If we think of global bandwidth limitations, it<br>
probably should. But if it doesn't, we are still facing a situation<br>
where the kernel regressed, because userspace stopped working.<br>
<br>
<br>
Thanks,<br>
pq<br>
</blockquote></div>