[Bug 1306] radeon segfault

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https://freedesktop.org/bugzilla/show_bug.cgi?id=1306        
   

kem at freedesktop.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |hyu at ati.com,
                   |                            |kem at freedesktop.org




------- Additional Comments From kem at freedesktop.org  2004-10-18 20:53 -------
Copied from my comments in the Red Hat bug for those interested in hearing what
the patches in comment #1 does.  Note this is a workaround, and when a proper
fix is available, it should be applied.

Here's the problem:

Previously, the PanelXRes and PanelYRes were either read from the BIOS or were
left as 0 (if no BIOS was detected).  Then, in RADEONUpdatePanelSize(), the max
panel size was found and the timing parameters were initialized, which worked
fine for this ppc system.

Now, the PanelXRes and PanelYRes are either read from the BIOS or are read from
the registers.  Note that the other timing parameters (in particular the
DotClock) are not initialized when reading from the registers.  Then, when
RADEONUpdatePanelSize() is called, the max panel size is already set, so none of
the other timing parameters are initialized here either (or anywhere else for
that matter), which appears to be why the new code fails for this ppc system.

The patch changes the test from < to <= in RADEONUpdatePanelSize() and then
tests to make sure that only the first set of timings for the panel size read
from the registers will be used -- this mimics the way the previous code worked.
 The only problem with this code occurs when the registers hold invalid panel
size params, which do not match any of the monitor's DDC info.  This should
never happen; however, if it does, then the only solution in this case is to
explicitly set the panel size in the config file.
        
   
   
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