xf86-video-ati: Branch 'master' - 2 commits
Dave Airlie
airlied at kemper.freedesktop.org
Sat Dec 2 10:51:03 EET 2006
src/radeon.h | 3
src/radeon_display.c | 181 +++++++++++++++++++++++++++++----------------------
src/radeon_driver.c | 100 ++++++++++++++++------------
src/radeon_probe.h | 6 +
4 files changed, 167 insertions(+), 123 deletions(-)
New commits:
diff-tree f22fd02bc7f7ef67e33c9bd93eae2d7488669b5e (from 13efd1f75fbd29a4d1f69d7d5a5bb2b8d90ad820)
Author: Dave Airlie <airlied at linux.ie>
Date: Sat Dec 2 19:48:00 2006 +1100
make CRTCs malloc'ed rather than part of Ent
This is leading towards randr-1.2 believe me :-)
diff --git a/src/radeon.h b/src/radeon.h
index 3592b2b..922afa5 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -904,6 +904,7 @@ extern void RADEONBlank(ScrnInfoP
extern void RADEONDisplayPowerManagementSet(ScrnInfoPtr pScrn,
int PowerManagementMode,
int flags);
+extern Bool RADEONAllocateControllers(ScrnInfoPtr pScrn);
extern int RADEONValidateMergeModes(ScrnInfoPtr pScrn);
extern int RADEONValidateDDCModes(ScrnInfoPtr pScrn1, char **ppModeName,
diff --git a/src/radeon_display.c b/src/radeon_display.c
index 1029652..76dfc49 100644
--- a/src/radeon_display.c
+++ b/src/radeon_display.c
@@ -942,10 +942,10 @@ void RADEONSetupConnectors(ScrnInfoPtr p
pRADEONEnt->PortInfo[i].TMDSType = TMDS_UNKNOWN;
pRADEONEnt->PortInfo[i].ConnectorType = CONNECTOR_NONE;
}
- pRADEONEnt->Controller[0].IsUsed = FALSE;
- pRADEONEnt->Controller[1].IsUsed = FALSE;
- pRADEONEnt->Controller[0].IsActive = FALSE;
- pRADEONEnt->Controller[1].IsActive = FALSE;
+ pRADEONEnt->Controller[0]->IsUsed = FALSE;
+ pRADEONEnt->Controller[1]->IsUsed = FALSE;
+ pRADEONEnt->Controller[0]->IsActive = FALSE;
+ pRADEONEnt->Controller[1]->IsActive = FALSE;
if (!RADEONGetConnectorInfoFromBIOS(pScrn) ||
((pRADEONEnt->PortInfo[0].DDCType == 0) &&
@@ -1207,8 +1207,8 @@ static void RADEONQueryConnectedDisplays
pRADEONEnt->PortInfo[1].TMDSType = TMDS_UNKNOWN;
pRADEONEnt->PortInfo[1].ConnectorType = CONNECTOR_NONE;
- pRADEONEnt->Controller[0].pPort = &pRADEONEnt->PortInfo[0];
- pRADEONEnt->Controller[1].pPort = &pRADEONEnt->PortInfo[1];
+ pRADEONEnt->Controller[0]->pPort = &pRADEONEnt->PortInfo[0];
+ pRADEONEnt->Controller[1]->pPort = &pRADEONEnt->PortInfo[1];
return;
}
@@ -1273,56 +1273,56 @@ Bool RADEONMapControllers(ScrnInfoPtr pS
if (!info->IsSecondary) {
RADEONQueryConnectedDisplays(pScrn);
- pRADEONEnt->Controller[0].pPort = &(pRADEONEnt->PortInfo[0]);
- pRADEONEnt->Controller[1].pPort = &(pRADEONEnt->PortInfo[1]);
+ pRADEONEnt->Controller[0]->pPort = &(pRADEONEnt->PortInfo[0]);
+ pRADEONEnt->Controller[1]->pPort = &(pRADEONEnt->PortInfo[1]);
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Port1:\n Monitor -- %s\n Connector -- %s\n DAC Type -- %s\n TMDS Type -- %s\n DDC Type -- %s\n",
- MonTypeName[pRADEONEnt->Controller[0].pPort->MonType+1],
+ MonTypeName[pRADEONEnt->Controller[0]->pPort->MonType+1],
info->IsAtomBios ?
- ConnectorTypeNameATOM[pRADEONEnt->Controller[0].pPort->ConnectorType]:
- ConnectorTypeName[pRADEONEnt->Controller[0].pPort->ConnectorType],
- DACTypeName[pRADEONEnt->Controller[0].pPort->DACType+1],
- TMDSTypeName[pRADEONEnt->Controller[0].pPort->TMDSType+1],
- DDCTypeName[pRADEONEnt->Controller[0].pPort->DDCType]);
+ ConnectorTypeNameATOM[pRADEONEnt->Controller[0]->pPort->ConnectorType]:
+ ConnectorTypeName[pRADEONEnt->Controller[0]->pPort->ConnectorType],
+ DACTypeName[pRADEONEnt->Controller[0]->pPort->DACType+1],
+ TMDSTypeName[pRADEONEnt->Controller[0]->pPort->TMDSType+1],
+ DDCTypeName[pRADEONEnt->Controller[0]->pPort->DDCType]);
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Port2:\n Monitor -- %s\n Connector -- %s\n DAC Type -- %s\n TMDS Type -- %s\n DDC Type -- %s\n",
- MonTypeName[pRADEONEnt->Controller[1].pPort->MonType+1],
+ MonTypeName[pRADEONEnt->Controller[1]->pPort->MonType+1],
info->IsAtomBios ?
- ConnectorTypeNameATOM[pRADEONEnt->Controller[1].pPort->ConnectorType]:
- ConnectorTypeName[pRADEONEnt->Controller[1].pPort->ConnectorType],
- DACTypeName[pRADEONEnt->Controller[1].pPort->DACType+1],
- TMDSTypeName[pRADEONEnt->Controller[1].pPort->TMDSType+1],
- DDCTypeName[pRADEONEnt->Controller[1].pPort->DDCType]);
+ ConnectorTypeNameATOM[pRADEONEnt->Controller[1]->pPort->ConnectorType]:
+ ConnectorTypeName[pRADEONEnt->Controller[1]->pPort->ConnectorType],
+ DACTypeName[pRADEONEnt->Controller[1]->pPort->DACType+1],
+ TMDSTypeName[pRADEONEnt->Controller[1]->pPort->TMDSType+1],
+ DDCTypeName[pRADEONEnt->Controller[1]->pPort->DDCType]);
/* no display detected on primary port*/
- if (pRADEONEnt->Controller[0].pPort->MonType == MT_NONE) {
- if (pRADEONEnt->Controller[1].pPort->MonType != MT_NONE) {
+ if (pRADEONEnt->Controller[0]->pPort->MonType == MT_NONE) {
+ if (pRADEONEnt->Controller[1]->pPort->MonType != MT_NONE) {
/* Only one detected on secondary, let it to be primary */
- pRADEONEnt->Controller[0].pPort = &(pRADEONEnt->PortInfo[1]);
- pRADEONEnt->Controller[1].pPort = &(pRADEONEnt->PortInfo[0]);
+ pRADEONEnt->Controller[0]->pPort = &(pRADEONEnt->PortInfo[1]);
+ pRADEONEnt->Controller[1]->pPort = &(pRADEONEnt->PortInfo[0]);
head_reversed = TRUE;
} else {
/* None detected, Default to a CRT connected */
- pRADEONEnt->Controller[0].pPort->MonType = MT_CRT;
+ pRADEONEnt->Controller[0]->pPort->MonType = MT_CRT;
}
}
- if ((pRADEONEnt->Controller[0].pPort->MonType == MT_LCD) &&
- (pRADEONEnt->Controller[1].pPort->MonType == MT_CRT)) {
+ if ((pRADEONEnt->Controller[0]->pPort->MonType == MT_LCD) &&
+ (pRADEONEnt->Controller[1]->pPort->MonType == MT_CRT)) {
if (!(INREG(RADEON_LVDS_GEN_CNTL) & RADEON_LVDS_ON)) {
/* LCD is switched off, don't turn it on, otherwise it may casue lockup due to SS issue. */
- pRADEONEnt->Controller[0].pPort = &(pRADEONEnt->PortInfo[1]);
- pRADEONEnt->Controller[1].pPort = &(pRADEONEnt->PortInfo[0]);
- pRADEONEnt->Controller[1].pPort->MonType = MT_NONE;
+ pRADEONEnt->Controller[0]->pPort = &(pRADEONEnt->PortInfo[1]);
+ pRADEONEnt->Controller[1]->pPort = &(pRADEONEnt->PortInfo[0]);
+ pRADEONEnt->Controller[1]->pPort->MonType = MT_NONE;
head_reversed = TRUE;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "LCD is switched off, only CRT will be used\n");
}
}
- if ((pRADEONEnt->Controller[0].pPort->MonType != MT_NONE) &&
- (pRADEONEnt->Controller[1].pPort->MonType != MT_NONE)) {
+ if ((pRADEONEnt->Controller[0]->pPort->MonType != MT_NONE) &&
+ (pRADEONEnt->Controller[1]->pPort->MonType != MT_NONE)) {
if (xf86ReturnOptValBool(info->Options, OPTION_REVERSE_DISPLAY, FALSE)) {
if (info->IsMobility) {
/* Don't reverse display for mobility chips, as only CRTC1 path has RMX which
@@ -1330,47 +1330,47 @@ Bool RADEONMapControllers(ScrnInfoPtr pS
*/
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Reverse Display cannot be used for mobility chip\n");
} else {
- pRADEONEnt->Controller[0].pPort = &(pRADEONEnt->PortInfo[1]);
- pRADEONEnt->Controller[1].pPort = &(pRADEONEnt->PortInfo[0]);
+ pRADEONEnt->Controller[0]->pPort = &(pRADEONEnt->PortInfo[1]);
+ pRADEONEnt->Controller[1]->pPort = &(pRADEONEnt->PortInfo[0]);
head_reversed = TRUE;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Primary and Secondary mapping is reversed\n");
}
}
}
- if (pRADEONEnt->HasSecondary && pRADEONEnt->Controller[1].pPort->MonType == MT_NONE) {
+ if (pRADEONEnt->HasSecondary && pRADEONEnt->Controller[1]->pPort->MonType == MT_NONE) {
pRADEONEnt->HasSecondary = FALSE;
}
}
if(pRADEONEnt->HasCRTC2) {
if(info->IsSecondary) {
- pRADEONEnt->Controller[1].binding = 2;
- info->DisplayType = pRADEONEnt->Controller[1].pPort->MonType;
- pScrn->monitor->DDC = pRADEONEnt->Controller[1].pPort->MonInfo;
+ pRADEONEnt->Controller[1]->binding = 2;
+ info->DisplayType = pRADEONEnt->Controller[1]->pPort->MonType;
+ pScrn->monitor->DDC = pRADEONEnt->Controller[1]->pPort->MonInfo;
} else {
- pRADEONEnt->Controller[0].binding = 1;
- info->DisplayType = pRADEONEnt->Controller[0].pPort->MonType;
- pScrn->monitor->DDC = pRADEONEnt->Controller[0].pPort->MonInfo;
+ pRADEONEnt->Controller[0]->binding = 1;
+ info->DisplayType = pRADEONEnt->Controller[0]->pPort->MonType;
+ pScrn->monitor->DDC = pRADEONEnt->Controller[0]->pPort->MonInfo;
}
if(!pRADEONEnt->HasSecondary) {
- info->MergeType = pRADEONEnt->Controller[1].pPort->MonType;
+ info->MergeType = pRADEONEnt->Controller[1]->pPort->MonType;
if (info->MergeType)
- pRADEONEnt->Controller[1].binding = 1;
+ pRADEONEnt->Controller[1]->binding = 1;
}
} else {
- if (pRADEONEnt->Controller[0].pPort->MonType == MT_NONE)
- pRADEONEnt->Controller[0].pPort->MonType = MT_CRT;
- info->DisplayType = pRADEONEnt->Controller[0].pPort->MonType;
- pScrn->monitor->DDC = pRADEONEnt->Controller[0].pPort->MonInfo;
- pRADEONEnt->Controller[1].pPort->MonType = MT_NONE;
- pRADEONEnt->Controller[1].binding = 1;
+ if (pRADEONEnt->Controller[0]->pPort->MonType == MT_NONE)
+ pRADEONEnt->Controller[0]->pPort->MonType = MT_CRT;
+ info->DisplayType = pRADEONEnt->Controller[0]->pPort->MonType;
+ pScrn->monitor->DDC = pRADEONEnt->Controller[0]->pPort->MonInfo;
+ pRADEONEnt->Controller[1]->pPort->MonType = MT_NONE;
+ pRADEONEnt->Controller[1]->binding = 1;
}
if (!info->IsSecondary) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "---- Primary Head: Port%d ---- \n", head_reversed?2:1);
- if (pRADEONEnt->Controller[1].pPort->MonType != MT_NONE)
+ if (pRADEONEnt->Controller[1]->pPort->MonType != MT_NONE)
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "---- Secondary Head: Port%d ----\n", head_reversed?1:2);
else
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "---- Secondary Head: Not used ----\n");
@@ -1673,7 +1673,7 @@ void RADEONInitDispBandwidth2(ScrnInfoPt
*/
if ((info->DispPriority == 2) && IS_R300_VARIANT) {
CARD32 mc_init_misc_lat_timer = INREG(R300_MC_INIT_MISC_LAT_TIMER);
- if (pRADEONEnt->Controller[1].IsActive) {
+ if (pRADEONEnt->Controller[1]->IsActive) {
mc_init_misc_lat_timer |= 0x1100; /* display 0 and 1 */
} else {
mc_init_misc_lat_timer |= 0x0100; /* display 0 only */
@@ -1688,7 +1688,7 @@ void RADEONInitDispBandwidth2(ScrnInfoPt
if (pRADEONEnt->pSecondaryScrn) {
if (info->IsSecondary) return;
info2 = RADEONPTR(pRADEONEnt->pSecondaryScrn);
- } else if (pRADEONEnt->Controller[1].binding == 1) info2 = info;
+ } else if (pRADEONEnt->Controller[1]->binding == 1) info2 = info;
/*
* Determine if there is enough bandwidth for current display mode
@@ -1956,7 +1956,7 @@ void RADEONInitDispBandwidth(ScrnInfoPtr
if (pRADEONEnt->pSecondaryScrn) {
if (info->IsSecondary) return;
info2 = RADEONPTR(pRADEONEnt->pSecondaryScrn);
- } else if (pRADEONEnt->Controller[1].binding == 1) info2 = info;
+ } else if (pRADEONEnt->Controller[1]->binding == 1) info2 = info;
mode1 = info->CurrentLayout.mode;
if (info->MergedFB) {
@@ -1977,19 +1977,19 @@ static void RADEONBlankSet(ScrnInfoPtr p
unsigned char *RADEONMMIO = info->MMIO;
RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
- switch(pRADEONEnt->Controller[controller].pPort->MonType) {
+ switch(pRADEONEnt->Controller[controller]->pPort->MonType) {
case MT_LCD:
OUTREGP(RADEON_LVDS_GEN_CNTL, RADEON_LVDS_DISPLAY_DIS, ~RADEON_LVDS_DISPLAY_DIS);
break;
case MT_CRT:
if ((info->ChipFamily == CHIP_FAMILY_R200) &&
- (pRADEONEnt->Controller[controller].pPort->DACType == DAC_TVDAC))
+ (pRADEONEnt->Controller[controller]->pPort->DACType == DAC_TVDAC))
OUTREGP(RADEON_FP2_GEN_CNTL, RADEON_FP2_BLANK_EN, ~RADEON_FP2_BLANK_EN);
break;
case MT_DFP:
- if (pRADEONEnt->Controller[controller].pPort->TMDSType == TMDS_EXT)
+ if (pRADEONEnt->Controller[controller]->pPort->TMDSType == TMDS_EXT)
OUTREGP(RADEON_FP2_GEN_CNTL, RADEON_FP2_BLANK_EN, ~RADEON_FP2_BLANK_EN);
else
OUTREGP(RADEON_FP_GEN_CNTL, RADEON_FP_BLANK_EN, ~RADEON_FP_BLANK_EN);
@@ -2023,7 +2023,7 @@ void RADEONBlank(ScrnInfoPtr pScrn)
if (!pRADEONEnt->HasCRTC2) return;
- if (pRADEONEnt->Controller[1].binding == 1) {
+ if (pRADEONEnt->Controller[1]->binding == 1) {
RADEONBlankSet(pScrn, 1);
OUTREGP (RADEON_CRTC2_GEN_CNTL,
RADEON_CRTC2_DISP_DIS |
@@ -2054,17 +2054,17 @@ static void RADEONUnblankSet(ScrnInfoPtr
unsigned char *RADEONMMIO = info->MMIO;
RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
- switch(pRADEONEnt->Controller[controller].pPort->MonType) {
+ switch(pRADEONEnt->Controller[controller]->pPort->MonType) {
case MT_LCD:
OUTREGP(RADEON_LVDS_GEN_CNTL, 0, ~RADEON_LVDS_DISPLAY_DIS);
break;
case MT_CRT:
if ((info->ChipFamily == CHIP_FAMILY_R200) &&
- (pRADEONEnt->Controller[controller].pPort->DACType == DAC_TVDAC))
+ (pRADEONEnt->Controller[controller]->pPort->DACType == DAC_TVDAC))
OUTREGP(RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_BLANK_EN);
break;
case MT_DFP:
- if (pRADEONEnt->Controller[controller].pPort->TMDSType == TMDS_EXT)
+ if (pRADEONEnt->Controller[controller]->pPort->TMDSType == TMDS_EXT)
OUTREGP(RADEON_FP2_GEN_CNTL, 0, ~RADEON_FP2_BLANK_EN);
else
OUTREGP(RADEON_FP_GEN_CNTL, 0, ~RADEON_FP_BLANK_EN);
@@ -2092,7 +2092,7 @@ void RADEONUnblank(ScrnInfoPtr pScrn)
if (!pRADEONEnt->HasCRTC2) return;
- if (pRADEONEnt->Controller[1].binding == 1) {
+ if (pRADEONEnt->Controller[1]->binding == 1) {
RADEONUnblankSet(pScrn, 1);
OUTREGP(RADEON_CRTC2_GEN_CNTL, 0,
~(RADEON_CRTC2_DISP_DIS |
@@ -2119,9 +2119,9 @@ static void RADEONDPMSSetOn(ScrnInfoPtr
RADEONTmdsType TmdsType;
RADEONDacType DacType;
- MonType = pRADEONEnt->Controller[controller].pPort->MonType;
- TmdsType = pRADEONEnt->Controller[controller].pPort->TMDSType;
- DacType = pRADEONEnt->Controller[controller].pPort->DACType;
+ MonType = pRADEONEnt->Controller[controller]->pPort->MonType;
+ TmdsType = pRADEONEnt->Controller[controller]->pPort->TMDSType;
+ DacType = pRADEONEnt->Controller[controller]->pPort->DACType;
switch(MonType) {
case MT_LCD:
@@ -2158,9 +2158,9 @@ static void RADEONDPMSSetOff(ScrnInfoPtr
RADEONDacType DacType;
unsigned long tmpPixclksCntl;
- MonType = pRADEONEnt->Controller[controller].pPort->MonType;
- TmdsType = pRADEONEnt->Controller[controller].pPort->TMDSType;
- DacType = pRADEONEnt->Controller[controller].pPort->DACType;
+ MonType = pRADEONEnt->Controller[controller]->pPort->MonType;
+ TmdsType = pRADEONEnt->Controller[controller]->pPort->TMDSType;
+ DacType = pRADEONEnt->Controller[controller]->pPort->DACType;
switch(MonType) {
case MT_LCD:
@@ -2231,7 +2231,7 @@ void RADEONDisplayPowerManagementSet(Scr
if (info->IsSecondary)
OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask2);
else {
- if (pRADEONEnt->Controller[1].binding == 1)
+ if (pRADEONEnt->Controller[1]->binding == 1)
OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask2);
OUTREGP(RADEON_CRTC_EXT_CNTL, 0, ~mask1);
}
@@ -2244,7 +2244,7 @@ void RADEONDisplayPowerManagementSet(Scr
(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS),
~mask2);
else {
- if (pRADEONEnt->Controller[1].binding == 1)
+ if (pRADEONEnt->Controller[1]->binding == 1)
OUTREGP(RADEON_CRTC2_GEN_CNTL,
(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS),
~mask2);
@@ -2261,7 +2261,7 @@ void RADEONDisplayPowerManagementSet(Scr
(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS),
~mask2);
else {
- if (pRADEONEnt->Controller[1].binding == 1)
+ if (pRADEONEnt->Controller[1]->binding == 1)
OUTREGP(RADEON_CRTC2_GEN_CNTL,
(RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS),
~mask2);
@@ -2276,7 +2276,7 @@ void RADEONDisplayPowerManagementSet(Scr
if (info->IsSecondary)
OUTREGP(RADEON_CRTC2_GEN_CNTL, mask2, ~mask2);
else {
- if (pRADEONEnt->Controller[1].binding == 1)
+ if (pRADEONEnt->Controller[1]->binding == 1)
OUTREGP(RADEON_CRTC2_GEN_CNTL, mask2, ~mask2);
OUTREGP(RADEON_CRTC_EXT_CNTL, mask1, ~mask1);
}
@@ -2285,14 +2285,14 @@ void RADEONDisplayPowerManagementSet(Scr
if (PowerManagementMode == DPMSModeOn) {
RADEONDPMSSetOn(pScrn, info->IsSecondary ? 1 : 0);
- if (pRADEONEnt->Controller[1].binding == 1)
+ if (pRADEONEnt->Controller[1]->binding == 1)
RADEONDPMSSetOn(pScrn, 1);
} else if ((PowerManagementMode == DPMSModeOff) ||
(PowerManagementMode == DPMSModeSuspend) ||
(PowerManagementMode == DPMSModeStandby)) {
RADEONDPMSSetOff(pScrn, info->IsSecondary ? 1 : 0);
- if (pRADEONEnt->Controller[1].binding == 1)
+ if (pRADEONEnt->Controller[1]->binding == 1)
RADEONDPMSSetOff(pScrn, 1);
}
}
@@ -2301,3 +2301,28 @@ void RADEONDisplayPowerManagementSet(Scr
if (info->CPStarted) DRIUnlock(pScrn->pScreen);
#endif
}
+
+Bool RADEONAllocateControllers(ScrnInfoPtr pScrn)
+{
+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
+ int num_crtc;
+
+ if (pRADEONEnt->Controller[0])
+ return TRUE;
+
+ pRADEONEnt->Controller[0] = xcalloc(sizeof(RADEONController), 1);
+ if (!pRADEONEnt->Controller[0])
+ return FALSE;
+
+ if (!pRADEONEnt->HasCRTC2)
+ return TRUE;
+
+ pRADEONEnt->Controller[1] = xcalloc(sizeof(RADEONController), 1);
+ if (!pRADEONEnt->Controller[1])
+ {
+ xfree(pRADEONEnt->Controller[0]);
+ return FALSE;
+ }
+
+ return TRUE;
+}
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 7dcfbb2..405d96f 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -2020,7 +2020,7 @@ static Bool RADEONPreInitModes(ScrnInfoP
xf86ReturnOptValBool(info->Options, OPTION_DDC_MODE, FALSE);
/* don't use RMX if we have a dual-tmds panels */
- if (pRADEONEnt->Controller[1].pPort->MonType == MT_DFP)
+ if (pRADEONEnt->Controller[1]->pPort->MonType == MT_DFP)
info->ddc_mode = TRUE;
/* don't use RMX if we are Dell Server */
if (info->IsDellServer)
@@ -2031,7 +2031,7 @@ static Bool RADEONPreInitModes(ScrnInfoP
"Validating modes on %s head ---------\n",
info->IsSecondary ? "Secondary" : "Primary");
- if (!pRADEONEnt->Controller[0].pPort->MonInfo && !pRADEONEnt->Controller[1].pPort->MonInfo && info->ddc_mode) {
+ if (!pRADEONEnt->Controller[0]->pPort->MonInfo && !pRADEONEnt->Controller[1]->pPort->MonInfo && info->ddc_mode) {
info->ddc_mode = FALSE;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"No DDC data available, DDCMode option is dismissed\n");
@@ -2238,7 +2238,7 @@ static Bool RADEONPreInitModes(ScrnInfoP
xf86SetCrtcForModes(pScrn, 0);
if (pRADEONEnt->HasCRTC2) {
- if (pRADEONEnt->Controller[1].binding == 1) {
+ if (pRADEONEnt->Controller[1]->binding == 1) {
/* If we have 2 screens from the config file, we don't need
* to do clone thing, let each screen handles one head.
@@ -2267,7 +2267,7 @@ static Bool RADEONPreInitModes(ScrnInfoP
}
xf86PrintModes(pScrn);
- if(pRADEONEnt->Controller[1].binding == 1) {
+ if(pRADEONEnt->Controller[1]->binding == 1) {
xf86SetCrtcForModes(info->CRT2pScrn, INTERLACE_HALVE_V);
@@ -2819,6 +2819,11 @@ static Bool RADEONPreInitXv(ScrnInfoPtr
static Bool RADEONPreInitControllers(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10)
{
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+
+ if (!info->IsSecondary)
+ RADEONAllocateControllers(pScrn);
+
RADEONGetBIOSInfo(pScrn, pInt10);
RADEONSetupConnectors(pScrn);
@@ -5062,8 +5067,8 @@ static void RADEONRestoreMode(ScrnInfoPt
{
RADEONInfoPtr info = RADEONPTR(pScrn);
RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
- RADEONController* pCRTC1 = &pRADEONEnt->Controller[0];
- RADEONController* pCRTC2 = &pRADEONEnt->Controller[1];
+ RADEONController* pCRTC1 = pRADEONEnt->Controller[0];
+ RADEONController* pCRTC2 = pRADEONEnt->Controller[1];
RADEONTRACE(("RADEONRestoreMode(%p)\n", restore));
@@ -5790,9 +5795,9 @@ static Bool RADEONInitCrtcRegisters(Scrn
RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
- pRADEONEnt->Controller[0].IsUsed = TRUE;
- pRADEONEnt->Controller[0].IsActive = TRUE;
- pRADEONEnt->Controller[0].pCurMode = mode;
+ pRADEONEnt->Controller[0]->IsUsed = TRUE;
+ pRADEONEnt->Controller[0]->IsActive = TRUE;
+ pRADEONEnt->Controller[0]->pCurMode = mode;
switch (info->CurrentLayout.pixel_code) {
case 4: format = 1; break;
@@ -5936,18 +5941,18 @@ static Bool RADEONInitCrtcRegisters(Scrn
RADEON_HORZ_AUTO_RATIO_INC);
}
- if (pRADEONEnt->Controller[0].pPort->MonType == MT_CRT) {
- if (pRADEONEnt->Controller[0].pPort->DACType == DAC_PRIMARY) {
+ if (pRADEONEnt->Controller[0]->pPort->MonType == MT_CRT) {
+ if (pRADEONEnt->Controller[0]->pPort->DACType == DAC_PRIMARY) {
RADEONInitDACRegisters(pScrn, save, mode, TRUE);
} else {
RADEONInitDAC2Registers(pScrn, save, mode, TRUE);
}
- } else if (pRADEONEnt->Controller[0].pPort->MonType == MT_LCD) {
+ } else if (pRADEONEnt->Controller[0]->pPort->MonType == MT_LCD) {
RADEONInitRMXRegisters(pScrn, save, mode);
RADEONInitLVDSRegisters(pScrn, save, mode, TRUE);
- } else if (pRADEONEnt->Controller[0].pPort->MonType == MT_DFP) {
+ } else if (pRADEONEnt->Controller[0]->pPort->MonType == MT_DFP) {
RADEONInitRMXRegisters(pScrn, save, mode);
- if (pRADEONEnt->Controller[0].pPort->TMDSType == TMDS_INT) {
+ if (pRADEONEnt->Controller[0]->pPort->TMDSType == TMDS_INT) {
RADEONInitFPRegisters(pScrn, save, mode, TRUE);
} else {
RADEONInitFP2Registers(pScrn, save, mode, TRUE);
@@ -5988,9 +5993,9 @@ static Bool RADEONInitCrtc2Registers(Scr
if (info->IsSecondary)
info0 = RADEONPTR(pRADEONEnt->pPrimaryScrn);
- pRADEONEnt->Controller[1].IsUsed = TRUE;
- pRADEONEnt->Controller[1].IsActive = TRUE;
- pRADEONEnt->Controller[1].pCurMode = mode;
+ pRADEONEnt->Controller[1]->IsUsed = TRUE;
+ pRADEONEnt->Controller[1]->IsActive = TRUE;
+ pRADEONEnt->Controller[1]->pCurMode = mode;
switch (info->CurrentLayout.pixel_code) {
case 4: format = 1; break;
@@ -6082,16 +6087,16 @@ static Bool RADEONInitCrtc2Registers(Scr
save->fp_h2_sync_strt_wid = save->crtc2_h_sync_strt_wid;
save->fp_v2_sync_strt_wid = save->crtc2_v_sync_strt_wid;
- if (pRADEONEnt->Controller[1].pPort->MonType == MT_CRT) {
- if (pRADEONEnt->Controller[1].pPort->DACType == DAC_PRIMARY) {
+ if (pRADEONEnt->Controller[1]->pPort->MonType == MT_CRT) {
+ if (pRADEONEnt->Controller[1]->pPort->DACType == DAC_PRIMARY) {
RADEONInitDACRegisters(pScrn, save, mode, FALSE);
} else {
RADEONInitDAC2Registers(pScrn, save, mode, FALSE);
}
- } else if (pRADEONEnt->Controller[1].pPort->MonType == MT_LCD) {
+ } else if (pRADEONEnt->Controller[1]->pPort->MonType == MT_LCD) {
RADEONInitLVDSRegisters(pScrn, save, mode, FALSE);
- } else if (pRADEONEnt->Controller[1].pPort->MonType == MT_DFP) {
- if (pRADEONEnt->Controller[1].pPort->TMDSType == TMDS_INT) {
+ } else if (pRADEONEnt->Controller[1]->pPort->MonType == MT_DFP) {
+ if (pRADEONEnt->Controller[1]->pPort->TMDSType == TMDS_INT) {
RADEONInitFPRegisters(pScrn, save, mode, FALSE);
} else {
RADEONInitFP2Registers(pScrn, save, mode, FALSE);
@@ -7005,7 +7010,7 @@ RADEONGetMergedFBOptions(ScrnInfoPtr pSc
info->MergedFB = FALSE;
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Failed to detect secondary monitor, MergedFB/Clone mode disabled\n");
- } else if (!pRADEONEnt->Controller[1].pPort->MonInfo) {
+ } else if (!pRADEONEnt->Controller[1]->pPort->MonInfo) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Failed to detect secondary monitor DDC, default HSync and VRefresh used\n");
default_range = TRUE;
@@ -7171,7 +7176,7 @@ RADEONGetMergedFBOptions(ScrnInfoPtr pSc
}
/* xf86SetDDCproperties(info->CRT2pScrn, pRADEONEnt->MonInfo2); */
- info->CRT2pScrn->monitor->DDC = pRADEONEnt->Controller[1].pPort->MonInfo;
+ info->CRT2pScrn->monitor->DDC = pRADEONEnt->Controller[1]->pPort->MonInfo;
if (default_range) {
RADEONStrToRanges(info->CRT2pScrn->monitor->hsync, default_hsync, MAX_HSYNC);
RADEONStrToRanges(info->CRT2pScrn->monitor->vrefresh, default_vrefresh, MAX_VREFRESH);
diff --git a/src/radeon_probe.h b/src/radeon_probe.h
index 9946cf8..34dad61 100644
--- a/src/radeon_probe.h
+++ b/src/radeon_probe.h
@@ -121,6 +121,8 @@ typedef struct
RADEONConnector* pPort;
} RADEONController;
+#define RADEON_MAX_CRTC 2
+
typedef struct
{
Bool HasSecondary;
@@ -138,7 +140,7 @@ typedef struct
Bool ReversedDAC; /* TVDAC used as primary dac */
Bool ReversedTMDS; /* DDC_DVI is used for external TMDS */
RADEONConnector PortInfo[2];
- RADEONController Controller[2];
+ RADEONController *Controller[RADEON_MAX_CRTC]; /* pointer to a controller */
} RADEONEntRec, *RADEONEntPtr;
/* radeon_probe.c */
diff-tree 13efd1f75fbd29a4d1f69d7d5a5bb2b8d90ad820 (from 3933b86390eb2f4198d490acd4914fb470c40f47)
Author: Dave Airlie <airlied at linux.ie>
Date: Sat Dec 2 19:16:41 2006 +1100
move HasCRTC2 to pRADEONEnt from info
diff --git a/src/radeon.h b/src/radeon.h
index 646b742..3592b2b 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -442,7 +442,7 @@ typedef struct {
RADEONMonitorType DisplayType; /* Monitor connected on */
RADEONDDCType DDCType;
RADEONConnectorType ConnectorType;
- Bool HasCRTC2; /* All cards except original Radeon */
+
Bool IsMobility; /* Mobile chips for laptops */
Bool IsIGP; /* IGP chips */
Bool HasSingleDAC; /* only TVDAC on chip */
diff --git a/src/radeon_display.c b/src/radeon_display.c
index 9c8a3db..1029652 100644
--- a/src/radeon_display.c
+++ b/src/radeon_display.c
@@ -1005,7 +1005,7 @@ void RADEONSetupConnectors(ScrnInfoPtr p
pRADEONEnt->PortInfo[1].DACType = DAC_TVDAC;
pRADEONEnt->PortInfo[0].DACType = DAC_PRIMARY;
}
- } else if (!info->HasCRTC2) {
+ } else if (!pRADEONEnt->HasCRTC2) {
pRADEONEnt->PortInfo[0].DACType = DAC_PRIMARY;
}
@@ -1182,7 +1182,7 @@ static void RADEONQueryConnectedDisplays
if (pRADEONEnt->PortInfo[0].MonType == MT_UNKNOWN || pRADEONEnt->PortInfo[1].MonType == MT_UNKNOWN) {
- if ((!info->HasCRTC2) && (pRADEONEnt->PortInfo[0].MonType == MT_UNKNOWN)) {
+ if ((!pRADEONEnt->HasCRTC2) && (pRADEONEnt->PortInfo[0].MonType == MT_UNKNOWN)) {
if((pRADEONEnt->PortInfo[0].MonType = RADEONDisplayDDCConnected(pScrn, DDC_DVI,
&pRADEONEnt->PortInfo[0])));
else if((pRADEONEnt->PortInfo[0].MonType = RADEONDisplayDDCConnected(pScrn, DDC_VGA,
@@ -1343,7 +1343,7 @@ Bool RADEONMapControllers(ScrnInfoPtr pS
}
}
- if(info->HasCRTC2) {
+ if(pRADEONEnt->HasCRTC2) {
if(info->IsSecondary) {
pRADEONEnt->Controller[1].binding = 2;
info->DisplayType = pRADEONEnt->Controller[1].pPort->MonType;
@@ -2021,7 +2021,7 @@ void RADEONBlank(ScrnInfoPtr pScrn)
RADEON_CRTC_VSYNC_DIS |
RADEON_CRTC_HSYNC_DIS));
- if (!info->HasCRTC2) return;
+ if (!pRADEONEnt->HasCRTC2) return;
if (pRADEONEnt->Controller[1].binding == 1) {
RADEONBlankSet(pScrn, 1);
@@ -2090,7 +2090,7 @@ void RADEONUnblank(ScrnInfoPtr pScrn)
RADEON_CRTC_VSYNC_DIS |
RADEON_CRTC_HSYNC_DIS));
- if (!info->HasCRTC2) return;
+ if (!pRADEONEnt->HasCRTC2) return;
if (pRADEONEnt->Controller[1].binding == 1) {
RADEONUnblankSet(pScrn, 1);
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 686c782..7dcfbb2 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -816,6 +816,7 @@ static int RADEONDiv(int n, int d)
static Bool RADEONProbePLLParameters(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
RADEONPLLPtr pll = &info->pll;
unsigned char *RADEONMMIO = info->MMIO;
unsigned char ppll_div_sel;
@@ -1018,6 +1019,7 @@ static Bool RADEONProbePLLParameters(Scr
static void RADEONGetClockInfo(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR (pScrn);
+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
RADEONPLLPtr pll = &info->pll;
double min_dotclock;
@@ -1067,7 +1069,7 @@ static void RADEONGetClockInfo(ScrnInfoP
info->mclk = 200.00;
}
- if (info->ChipFamily == CHIP_FAMILY_RV100 && !info->HasCRTC2) {
+ if (info->ChipFamily == CHIP_FAMILY_RV100 && !pRADEONEnt->HasCRTC2) {
/* Avoid RN50 corruption due to memory bandwidth starvation.
* 18 is an empirical value based on the databook and Windows driver.
*
@@ -1289,6 +1291,7 @@ static void RADEONInitMemoryMap(ScrnInfo
static void RADEONGetVRamType(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
CARD32 tmp;
@@ -1312,7 +1315,7 @@ static void RADEONGetVRamType(ScrnInfoPt
(info->ChipFamily == CHIP_FAMILY_RS200)){
if (tmp & RV100_HALF_MODE) info->RamWidth = 32;
else info->RamWidth = 64;
- if (!info->HasCRTC2) {
+ if (!pRADEONEnt->HasCRTC2) {
info->RamWidth /= 4;
info->IsDDR = TRUE;
}
@@ -1496,6 +1499,7 @@ static Bool RADEONPreInitVRAM(ScrnInfoPt
static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
EntityInfoPtr pEnt = info->pEnt;
GDevPtr dev = pEnt->device;
unsigned char *RADEONMMIO = info->MMIO;
@@ -1532,7 +1536,7 @@ static Bool RADEONPreInitChipType(ScrnIn
pScrn->chipset,
info->Chipset);
- info->HasCRTC2 = TRUE;
+ pRADEONEnt->HasCRTC2 = TRUE;
info->IsMobility = FALSE;
info->IsIGP = FALSE;
info->IsDellServer = FALSE;
@@ -1546,7 +1550,7 @@ static Bool RADEONPreInitChipType(ScrnIn
case PCI_CHIP_RN50_515E: /* RN50 is based on the RV100 but 3D isn't guaranteed to work. YMMV. */
case PCI_CHIP_RN50_5969:
- info->HasCRTC2 = FALSE;
+ pRADEONEnt->HasCRTC2 = FALSE;
case PCI_CHIP_RV100_QY:
case PCI_CHIP_RV100_QZ:
info->ChipFamily = CHIP_FAMILY_RV100;
@@ -1777,7 +1781,7 @@ static Bool RADEONPreInitChipType(ScrnIn
default:
/* Original Radeon/7200 */
info->ChipFamily = CHIP_FAMILY_RADEON;
- info->HasCRTC2 = FALSE;
+ pRADEONEnt->HasCRTC2 = FALSE;
}
@@ -2233,7 +2237,7 @@ static Bool RADEONPreInitModes(ScrnInfoP
xf86SetCrtcForModes(pScrn, 0);
- if (info->HasCRTC2) {
+ if (pRADEONEnt->HasCRTC2) {
if (pRADEONEnt->Controller[1].binding == 1) {
/* If we have 2 screens from the config file, we don't need
@@ -4234,6 +4238,7 @@ static void RADEONRestoreMemMapRegisters
RADEONSavePtr restore)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
int timeout;
@@ -4275,7 +4280,7 @@ static void RADEONRestoreMemMapRegisters
& ~(RADEON_CRTC_CUR_EN | RADEON_CRTC_ICON_EN))
| RADEON_CRTC_DISP_REQ_EN_B | RADEON_CRTC_EXT_DISP_EN);
- if (info->HasCRTC2) {
+ if (pRADEONEnt->HasCRTC2) {
crtc2_gen_cntl = INREG(RADEON_CRTC2_GEN_CNTL);
RADEONWaitForVerticalSync2(pScrn);
OUTREG(RADEON_CRTC2_GEN_CNTL,
@@ -4344,7 +4349,7 @@ static void RADEONRestoreMemMapRegisters
}
usleep(1000);
}
- if (info->HasCRTC2) {
+ if (pRADEONEnt->HasCRTC2) {
OUTREG(RADEON_CRTC2_OFFSET_CNTL, RADEON_CRTC2_OFFSET_FLIP_CNTL);
OUTREG(RADEON_CRTC2_OFFSET, 0);
OUTREG(RADEON_CUR2_OFFSET, 0);
@@ -4363,7 +4368,7 @@ static void RADEONRestoreMemMapRegisters
RADEONTRACE(("Updating display base addresses...\n"));
OUTREG(RADEON_DISPLAY_BASE_ADDR, restore->display_base_addr);
- if (info->HasCRTC2)
+ if (pRADEONEnt->HasCRTC2)
OUTREG(RADEON_DISPLAY2_BASE_ADDR, restore->display2_base_addr);
OUTREG(RADEON_OV0_BASE_ADDR, restore->ov0_base_addr);
(void)INREG(RADEON_OV0_BASE_ADDR);
@@ -4439,6 +4444,7 @@ static void RADEONRestoreCommonRegisters
RADEONSavePtr restore)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
OUTREG(RADEON_OVR_CLR, restore->ovr_clr);
@@ -4458,7 +4464,7 @@ static void RADEONRestoreCommonRegisters
* problem only occurs on RV style chips, typically when a FP and
* CRT are connected.
*/
- if (info->HasCRTC2 &&
+ if (pRADEONEnt->HasCRTC2 &&
!info->IsSwitching &&
info->ChipFamily != CHIP_FAMILY_R200 &&
!IS_R300_VARIANT) {
@@ -4481,6 +4487,7 @@ static void RADEONRestoreFBDevRegisters(
{
#ifdef XF86DRI
RADEONInfoPtr info = RADEONPTR(pScrn);
+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
/* Restore register for vertical blank interrupts */
@@ -4491,7 +4498,7 @@ static void RADEONRestoreFBDevRegisters(
/* Restore registers for page flipping */
if (info->allowPageFlip) {
OUTREG(RADEON_CRTC_OFFSET_CNTL, restore->crtc_offset_cntl);
- if (info->HasCRTC2) {
+ if (pRADEONEnt->HasCRTC2) {
OUTREG(RADEON_CRTC2_OFFSET_CNTL, restore->crtc2_offset_cntl);
}
}
@@ -4610,6 +4617,7 @@ static void RADEONRestoreCrtc2Registers(
static void RADEONRestoreFPRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
OUTREG(RADEON_TMDS_PLL_CNTL, restore->tmds_pll_cntl);
@@ -4621,7 +4629,7 @@ static void RADEONRestoreFPRegisters(Scr
/* old AIW Radeon has some BIOS initialization problem
* with display buffer underflow, only occurs to DFP
*/
- if (!info->HasCRTC2)
+ if (!pRADEONEnt->HasCRTC2)
OUTREG(RADEON_GRPH_BUFFER_CNTL,
INREG(RADEON_GRPH_BUFFER_CNTL) & ~0x7f0000);
@@ -5060,7 +5068,7 @@ static void RADEONRestoreMode(ScrnInfoPt
RADEONTRACE(("RADEONRestoreMode(%p)\n", restore));
/* For Non-dual head card, we don't have private field in the Entity */
- if (!info->HasCRTC2) {
+ if (!pRADEONEnt->HasCRTC2) {
RADEONRestoreMemMapRegisters(pScrn, restore);
RADEONRestoreCommonRegisters(pScrn, restore);
RADEONRestoreCrtcRegisters(pScrn, restore);
@@ -5173,6 +5181,7 @@ static void RADEONSaveFBDevRegisters(Scr
{
#ifdef XF86DRI
RADEONInfoPtr info = RADEONPTR(pScrn);
+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
/* Save register for vertical blank interrupts */
@@ -5183,7 +5192,7 @@ static void RADEONSaveFBDevRegisters(Scr
/* Save registers for page flipping */
if (info->allowPageFlip) {
save->crtc_offset_cntl = INREG(RADEON_CRTC_OFFSET_CNTL);
- if (info->HasCRTC2) {
+ if (pRADEONEnt->HasCRTC2) {
save->crtc2_offset_cntl = INREG(RADEON_CRTC2_OFFSET_CNTL);
}
}
@@ -5543,6 +5552,7 @@ static void RADEONInitFPRegisters(ScrnIn
DisplayModePtr mode, BOOL IsPrimary)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
int i;
CARD32 tmp = save->tmds_pll_cntl & 0xfffff;
@@ -5565,7 +5575,7 @@ static void RADEONInitFPRegisters(ScrnIn
save->tmds_transmitter_cntl &= ~(RADEON_TMDS_TRANSMITTER_PLLRST);
- if (IS_R300_VARIANT || (info->ChipFamily == CHIP_FAMILY_R200) || !info->HasCRTC2)
+ if (IS_R300_VARIANT || (info->ChipFamily == CHIP_FAMILY_R200) || !pRADEONEnt->HasCRTC2)
save->tmds_transmitter_cntl &= ~(RADEON_TMDS_TRANSMITTER_PLLEN);
else /* weird, RV chips got this bit reversed? */
save->tmds_transmitter_cntl |= (RADEON_TMDS_TRANSMITTER_PLLEN);
@@ -7198,11 +7208,12 @@ static void RADEONForceSomeClocks(ScrnIn
static void RADEONSetDynamicClock(ScrnInfoPtr pScrn, int mode)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
CARD32 tmp;
switch(mode) {
case 0: /* Turn everything OFF (ForceON to everything)*/
- if ( !info->HasCRTC2 ) {
+ if ( !pRADEONEnt->HasCRTC2 ) {
tmp = INPLL(pScrn, RADEON_SCLK_CNTL);
tmp |= (RADEON_SCLK_FORCE_CP | RADEON_SCLK_FORCE_HDP |
RADEON_SCLK_FORCE_DISP1 | RADEON_SCLK_FORCE_TOP |
@@ -7270,7 +7281,7 @@ static void RADEONSetDynamicClock(ScrnIn
tmp |= (RADEON_SCLK_FORCE_CP | RADEON_SCLK_FORCE_E2);
tmp |= RADEON_SCLK_FORCE_SE;
- if ( !info->HasCRTC2 ) {
+ if ( !pRADEONEnt->HasCRTC2 ) {
tmp |= ( RADEON_SCLK_FORCE_RB |
RADEON_SCLK_FORCE_TDM |
RADEON_SCLK_FORCE_TAM |
@@ -7342,7 +7353,7 @@ static void RADEONSetDynamicClock(ScrnIn
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Dynamic Clock Scaling Disabled\n");
break;
case 1:
- if (!info->HasCRTC2) {
+ if (!pRADEONEnt->HasCRTC2) {
tmp = INPLL(pScrn, RADEON_SCLK_CNTL);
if ((INREG(RADEON_CONFIG_CNTL) & RADEON_CFG_ATI_REV_ID_MASK) >
RADEON_CFG_ATI_REV_A13) {
diff --git a/src/radeon_probe.h b/src/radeon_probe.h
index bdc80fd..9946cf8 100644
--- a/src/radeon_probe.h
+++ b/src/radeon_probe.h
@@ -124,7 +124,7 @@ typedef struct
typedef struct
{
Bool HasSecondary;
-
+ Bool HasCRTC2; /* All cards except original Radeon */
/*
* The next two are used to make sure CRTC2 is restored before CRTC_EXT,
* otherwise it could lead to blank screens.
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