xf86-video-intel: Branch 'modesetting-keithp' - src/i830_display.c

[Keith Packard]

 src/i830_display.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

New commits:
diff-tree beb89163d73376e70870e6e2a6b19863f3a058b1 (from 997e8c9bb4235cab1fff4738387df9afcbea0a03)
Author: Keith Packard <keithp at mandolin.keithp.com>
Date:   Sun Nov 5 19:06:45 2006 -0800

    DSPSURF must be page aligned. Place intra-screen offset in DSPBASE.
    
    DSPASURF/DSPBSURF can only take page aligned values, ignoring
    the lower order bits. So, place the offset for the output
    within the frame buffer in the DSPABASE/DSPBBASE registers instead.

diff --git a/src/i830_display.c b/src/i830_display.c
index 077e318..6804a4d 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -268,8 +268,8 @@ i830PipeSetBase(ScrnInfoPtr pScrn, int p
     }
 
     if (IS_I965G(pI830)) {
-	OUTREG(dspbase, 0);
-	OUTREG(dspsurf, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
+	OUTREG(dspbase, ((y * pScrn->displayWidth + x) * pI830->cpp));
+	OUTREG(dspsurf, Start);
     } else {
 	OUTREG(dspbase, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
     }