xf86-video-intel: Branch 'modesetting' - src/i830_display.c

[Eric Anholt]

 src/i830_display.c |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletion(-)

New commits:
diff-tree d51555fba4e57c059fd184c1e54822d7e5b62a2f (from dd1dcfab0ab0f2d0c25077fa663209e2762f26e8)
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Nov 10 14:40:40 2006 -0800

    Fix clock range for single-channel LVDS.

diff --git a/src/i830_display.c b/src/i830_display.c
index 3603660..f661c4e 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -189,7 +189,10 @@ i830FindBestPLL(ScrnInfoPtr pScrn, int p
 	min_p1 = 1;
 	max_p1 = 8;
 	if (i830PipeHasType (pScrn, pipe, I830_OUTPUT_LVDS)) {
-	    if (target < 200000) /* XXX: Is this the right cutoff? */
+	    /* The single-channel range is 25-112Mhz, and dual-channel
+	     * is 80-224Mhz.  Prefer single channel as much as possible.
+	     */
+	    if (target < 112000)
 		p2 = 14;
 	    else
 		p2 = 7;