xf86-video-intel: Branch 'refs/remotes/origin/intel-batchbuffer' - 4 commits - src/dri_bufmgr.h src/i830_display.c src/i830_memory.c src/intel_bufmgr_ttm.c

[Jesse Barnes]

 src/dri_bufmgr.h       |    1 +
 src/i830_display.c     |    1 +
 src/i830_memory.c      |    2 +-
 src/intel_bufmgr_ttm.c |    1 +
 4 files changed, 4 insertions(+), 1 deletion(-)

New commits:
commit 619786c07f0546732a80b88d9038e45688616b96
Author: Keith Packard <keithp at koto.keithp.com>
Date:   Fri Nov 2 10:57:06 2007 -0700

    header file additions

diff --git a/src/dri_bufmgr.h b/src/dri_bufmgr.h
index 57bc715..acf8891 100644
--- a/src/dri_bufmgr.h
+++ b/src/dri_bufmgr.h
@@ -34,6 +34,7 @@
 
 #ifndef _DRI_BUFMGR_H_
 #define _DRI_BUFMGR_H_
+#include <stdint.h>
 #include <xf86drm.h>
 
 #include "xf86str.h"
diff --git a/src/intel_bufmgr_ttm.c b/src/intel_bufmgr_ttm.c
index ccc93f4..ceb0b92 100644
--- a/src/intel_bufmgr_ttm.c
+++ b/src/intel_bufmgr_ttm.c
@@ -39,6 +39,7 @@
 #include <unistd.h>
 #include "errno.h"
 #include "dri_bufmgr.h"
+#include <xf86mm.h>
 
 #include "i915_drm.h"
 
commit c885328f1d8e65b28688bb199294022cfd9e77d2
Merge: 62281b1... b434c1a...
Author: Keith Packard <keithp at koto.keithp.com>
Date:   Fri Nov 2 10:36:02 2007 -0700

    Merge branch 'master' into intel-batchbuffer

commit b434c1a437c407de88396b219560649c2dae82b2
Author: Jesse Barnes <jesse.barnes at intel.com>
Date:   Thu Nov 1 12:06:07 2007 -0700

    Framebuffer compression fix: front buffer may not be at fence 0
    
    Fix a long standing bug in the framebuffer compression code (thanks to
    Pierre Willenbrock!) that prevented FBC from working correctly if the front
    buffer was anywhere but fence register 0.

diff --git a/src/i830_display.c b/src/i830_display.c
index a99b4a5..d988b86 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -611,6 +611,7 @@ i830_enable_fb_compression(xf86CrtcPtr crtc)
     fbc_ctl |= (compressed_stride & 0xff) << FBC_CTL_STRIDE_SHIFT;
     fbc_ctl |= (interval & 0x2fff) << FBC_CTL_INTERVAL_SHIFT;
     fbc_ctl |= FBC_CTL_UNCOMPRESSIBLE;
+    fbc_ctl |= pI830->front_buffer->fence_nr;
     OUTREG(FBC_CONTROL, fbc_ctl);
 
     xf86DrvMsg(pScrn->scrnIndex, X_INFO, "fbc enabled on plane %c\n", plane ?
commit 50d3693a6862028e50bc5ba8c788e7ea573c3eb8
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date:   Thu Nov 1 22:22:27 2007 +0800

    Fix allocation reset for really not free BO allocator

diff --git a/src/i830_memory.c b/src/i830_memory.c
index d9f8a26..7b89c40 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -322,7 +322,7 @@ i830_reset_allocations(ScrnInfoPtr pScrn)
 	}
 #endif	
 
-	i830_free_memory(pScrn, pI830->memory_list->next);
+	i830_free_memory(pScrn, mem);
     }
 
     /* Free any allocations in buffer objects */