xf86-video-intel: Branch 'xvmc-i915' - 38 commits - configure.ac man/intel.man src/bios_reader/Makefile.am src/common.h src/i810_dri.c src/i810_driver.c src/i810.h src/i810_reg.h src/i830_bios.c src/i830_debug.c src/i830_display.c src/i830_dri.c src/i830_driver.c src/i830_exa.c src/i830.h src/i830_lvds.c src/i830_memory.c src/i830_quirks.c src/i830_tv.c src/i830_video.c src/i830_video.h src/i830_xaa.c src/i915_render.c src/i915_video.c src/i965_render.c src/i965_video.c src/Makefile.am src/xvmc/I810XvMC.h
Zhenyu Wang
zhen at kemper.freedesktop.org
Wed Sep 5 19:37:56 PDT 2007
configure.ac | 11 +
man/intel.man | 2
src/Makefile.am | 2
src/bios_reader/Makefile.am | 2
src/common.h | 61 +++++++----
src/i810.h | 11 +
src/i810_dri.c | 20 +++
src/i810_driver.c | 244 +++++++++++++++++++++++++++++++++++++++++++-
src/i810_reg.h | 14 ++
src/i830.h | 63 ++++++-----
src/i830_bios.c | 4
src/i830_debug.c | 32 +++++
src/i830_display.c | 164 ++++++++++++++---------------
src/i830_dri.c | 46 ++++++--
src/i830_driver.c | 190 ++++++++++++++++++++++++++++++----
src/i830_exa.c | 61 +++++++++--
src/i830_lvds.c | 4
src/i830_memory.c | 165 ++++++++---------------------
src/i830_quirks.c | 28 +++--
src/i830_tv.c | 78 ++++++++++----
src/i830_video.c | 179 +++++++++-----------------------
src/i830_video.h | 14 --
src/i830_xaa.c | 110 ++++++++++---------
src/i915_render.c | 36 ++++--
src/i915_video.c | 16 --
src/i965_render.c | 26 ++++
src/i965_video.c | 3
src/xvmc/I810XvMC.h | 1
28 files changed, 1029 insertions(+), 558 deletions(-)
New commits:
diff-tree 27aa66d6b987b657a0b014703cd7a25b5cef83d9 (from parents)
Merge: 8ffa0028fa54828f039af23f36a7f9f4554fa79b 2a8592f2ebcba86b1127aa889155d58a3dc186ca
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Thu Sep 6 10:36:19 2007 +0800
Merge branch 'master' into xvmc-i915
Conflicts:
src/i830.h
src/i830_memory.c
diff --cc src/i830.h
index d6e8fec,4f176f8..630440b
@@@ -746,11 -742,8 +749,13 @@@
return TRUE;
}
+ Bool i830_pixmap_tiled(PixmapPtr p);
+
+/* i915 XvMC */
+Bool I915XvMCInit(ScreenPtr, XF86VideoAdaptorPtr);
+Bool I915XvMCScreenInit(ScreenPtr);
+unsigned long I915XvMCPutImageSize(ScrnInfoPtr);
+
extern const int I830PatternROP[16];
extern const int I830CopyROP[16];
diff --cc src/i830_memory.c
index c094d5d,3da489d..9579a53
@@@ -1716,61 -1682,3 +1682,22 @@@
return maxPages * 4;
}
+
- #ifdef I830_USE_XAA
- /**
- * Allocates memory from the XF86 linear allocator, but also purges
- * memory if possible to cause the allocation to succeed.
- */
- FBLinearPtr
- i830_xf86AllocateOffscreenLinear(ScreenPtr pScreen, int length,
- int granularity,
- MoveLinearCallbackProcPtr moveCB,
- RemoveLinearCallbackProcPtr removeCB,
- pointer privData)
- {
- FBLinearPtr linear;
- int max_size;
-
- linear = xf86AllocateOffscreenLinear(pScreen, length, granularity, moveCB,
- removeCB, privData);
- if (linear != NULL)
- return linear;
-
- /* The above allocation didn't succeed, so purge unlocked stuff and try
- * again.
- */
- xf86QueryLargestOffscreenLinear(pScreen, &max_size, granularity,
- PRIORITY_EXTREME);
-
- if (max_size < length)
- return NULL;
-
- xf86PurgeUnlockedOffscreenAreas(pScreen);
-
- linear = xf86AllocateOffscreenLinear(pScreen, length, granularity, moveCB,
- removeCB, privData);
-
- return linear;
- }
-
- #endif
-
+/*
+ * Allocate memory for MC compensation
+ */
+Bool i830_allocate_xvmc_buffer(ScrnInfoPtr pScrn, const char *name,
+ i830_memory **buffer, unsigned long size,
+ int flags)
+{
+ *buffer = i830_allocate_memory(pScrn, name, size,
+ GTT_PAGE_SIZE, flags);
+
+ if (!*buffer) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "Failed to allocate memory for %s.\n", name);
+ return FALSE;
+ }
+
+ return TRUE;
+}
diff-tree 8ffa0028fa54828f039af23f36a7f9f4554fa79b (from parents)
Merge: 79854ed906e278275b25444fb56882b83470f5ea 02ad9cee330fb5fb0008ad6f74e74e8d8a1fc36e
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Thu Sep 6 10:34:01 2007 +0800
Merge branch 'xvmc-i915' of git+ssh://zhen@git.freedesktop.org/git/xorg/driver/xf86-video-intel into xvmc-i915
diff-tree 2a8592f2ebcba86b1127aa889155d58a3dc186ca (from 7fd9a98178cdebda4213796fdc452a8a265a1197)
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Wed Sep 5 14:52:56 2007 +0800
Fix G33 GTT stolen mem range
G33 GTT table lives in seperate stolen mem with
graphics data stolen mem.
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 9fa231d..983be76 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -483,6 +483,9 @@ I830DetectMemory(ScrnInfoPtr pScrn)
range = gtt_size + 4;
if (IS_I85X(pI830) || IS_I865G(pI830) || IS_I9XX(pI830)) {
+ /* G33 has seperate GTT stolen mem */
+ if (IS_G33CLASS(pI830))
+ range = 0;
switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
case I855_GMCH_GMS_STOLEN_1M:
memsize = MB(1) - KB(range);
diff-tree 7fd9a98178cdebda4213796fdc452a8a265a1197 (from c6e637cd683dc60567b3b4f69b7f2b4c338c89ea)
Author: Keith Packard <keithp at koto.keithp.com>
Date: Tue Aug 28 16:00:01 2007 -0700
Don't set supported TV formats until after RandR initialized.
The TV format property cannot be configured until RandR has been
initialized.
diff --git a/src/i830_tv.c b/src/i830_tv.c
index d86e984..940250e 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -1507,6 +1507,9 @@ i830_tv_format_configure_property (xf86O
int num_atoms = 0;
int i;
+ if (!output->randr_output)
+ return Success;
+
for (i = 0; i < NUM_TV_MODES; i++)
if (!tv_modes[i].component_only || dev_priv->type == TV_TYPE_COMPONENT)
current_atoms[num_atoms++] = tv_format_name_atoms[i];
diff-tree c6e637cd683dc60567b3b4f69b7f2b4c338c89ea (from ddd6053987b9ca9bd3722ddbdfd412a3d8d252cf)
Author: Keith Packard <keithp at koto.keithp.com>
Date: Tue Aug 28 12:17:15 2007 -0700
Limit TV formats to those supported by current connection
diff --git a/src/i830_exa.c b/src/i830_exa.c
index fa50da0..273c626 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -124,7 +124,7 @@ i830_pixmap_tiled(PixmapPtr pPixmap)
return FALSE;
}
-Bool
+static Bool
i830_exa_pixmap_is_offscreen(PixmapPtr pPixmap)
{
ScrnInfoPtr pScrn = xf86Screens[pPixmap->drawable.pScreen->myNum];
diff --git a/src/i830_tv.c b/src/i830_tv.c
index c90d41e..d86e984 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -1264,14 +1264,13 @@ static const DisplayModeRec reported_mod
* \return TRUE if TV is connected.
* \return FALSE if TV is disconnected.
*/
-static void
+static int
i830_tv_detect_type (xf86CrtcPtr crtc,
xf86OutputPtr output)
{
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
I830OutputPrivatePtr intel_output = output->driver_private;
- struct i830_tv_priv *dev_priv = intel_output->dev_priv;
CARD32 tv_ctl, save_tv_ctl;
CARD32 tv_dac, save_tv_dac;
int type = TV_TYPE_UNKNOWN;
@@ -1337,9 +1336,14 @@ i830_tv_detect_type (xf86CrtcPtr crtc
type = TV_TYPE_NONE;
}
- dev_priv->type = type;
+ return type;
}
+#ifdef RANDR_12_INTERFACE
+static int
+i830_tv_format_configure_property (xf86OutputPtr output);
+#endif
+
/**
* Detect the TV connection.
*
@@ -1354,17 +1358,26 @@ i830_tv_detect(xf86OutputPtr output)
I830OutputPrivatePtr intel_output = output->driver_private;
struct i830_tv_priv *dev_priv = intel_output->dev_priv;
int dpms_mode;
+ int type = dev_priv->type;
mode = reported_modes[0];
xf86SetModeCrtc (&mode, INTERLACE_HALVE_V);
crtc = i830GetLoadDetectPipe (output, &mode, &dpms_mode);
if (crtc)
{
- i830_tv_detect_type (crtc, output);
+ type = i830_tv_detect_type (crtc, output);
i830ReleaseLoadDetectPipe (output, dpms_mode);
}
- switch (dev_priv->type) {
+ if (type != dev_priv->type)
+ {
+ dev_priv->type = type;
+#ifdef RANDR_12_INTERFACE
+ i830_tv_format_configure_property (output);
+#endif
+ }
+
+ switch (type) {
case TV_TYPE_NONE:
return XF86OutputStatusDisconnected;
case TV_TYPE_UNKNOWN:
@@ -1477,6 +1490,32 @@ i830_tv_format_set_property (xf86OutputP
return err == Success;
}
+
+/**
+ * Configure the TV_FORMAT property to list only supported formats
+ *
+ * Unless the connector is component, list only the formats supported by
+ * svideo and composite
+ */
+
+static int
+i830_tv_format_configure_property (xf86OutputPtr output)
+{
+ I830OutputPrivatePtr intel_output = output->driver_private;
+ struct i830_tv_priv *dev_priv = intel_output->dev_priv;
+ Atom current_atoms[NUM_TV_MODES];
+ int num_atoms = 0;
+ int i;
+
+ for (i = 0; i < NUM_TV_MODES; i++)
+ if (!tv_modes[i].component_only || dev_priv->type == TV_TYPE_COMPONENT)
+ current_atoms[num_atoms++] = tv_format_name_atoms[i];
+
+ return RRConfigureOutputProperty(output->randr_output, tv_format_atom,
+ TRUE, FALSE, FALSE,
+ num_atoms, (INT32 *) current_atoms);
+}
+
#endif /* RANDR_12_INTERFACE */
static void
@@ -1500,10 +1539,8 @@ i830_tv_create_resources(xf86OutputPtr o
strlen (tv_modes[i].name),
TRUE);
- err = RRConfigureOutputProperty(output->randr_output, tv_format_atom,
- TRUE, FALSE, FALSE,
- NUM_TV_MODES, (INT32 *) tv_format_name_atoms);
-
+ err = i830_tv_format_configure_property (output);
+
if (err != 0) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"RRConfigureOutputProperty error, %d\n", err);
diff --git a/src/xvmc/I810XvMC.h b/src/xvmc/I810XvMC.h
index ba8c792..dc2cab8 100644
--- a/src/xvmc/I810XvMC.h
+++ b/src/xvmc/I810XvMC.h
@@ -41,6 +41,7 @@ THE USE OR OTHER DEALINGS IN THE SOFTWAR
/* #define XVMC_DEBUG(x) do {x; }while(0); */
#define XVMC_DEBUG(x)
+#include <stdint.h>
#include "xf86drm.h"
#include "i810_common.h"
#include <X11/Xlibint.h>
diff-tree ddd6053987b9ca9bd3722ddbdfd412a3d8d252cf (from 3fbbd0afde49c53a5a8661f75c8c8c4be3020c30)
Author: Keith Packard <keithp at koto.keithp.com>
Date: Tue Aug 28 12:30:46 2007 -0700
Add register defines for hw binning
diff --git a/src/i810_reg.h b/src/i810_reg.h
index 03e10d6..598fc8c 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -346,19 +346,33 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN
#define IPEIR 0x2088
#define IPEHR 0x208C
#define INST_DONE 0x2090
+#define SCPD0 0x209c /* debug */
#define INST_PS 0x20c4
#define IPEIR_I965 0x2064 /* i965 */
#define IPEHR_I965 0x2068 /* i965 */
#define INST_DONE_I965 0x206c
#define INST_PS_I965 0x2070
+
+/* Current active ring head address:
+ */
#define ACTHD 0x2074
+
+/* Current primary/secondary DMA fetch addresses:
+ */
#define DMA_FADD_P 0x2078
+#define DMA_FADD_S 0x20d4
#define INST_DONE_1 0x207c
#define CACHE_MODE_0 0x2120
#define CACHE_MODE_1 0x2124
#define MI_ARB_STATE 0x20e4
+/* Start addresses for each of the primary rings:
+ */
+#define PR0_STR 0x20f0
+#define PR1_STR 0x20f4
+#define PR2_STR 0x20f8
+
#define WIZ_CTL 0x7c00
#define WIZ_CTL_SINGLE_SUBSPAN (1<<6)
#define WIZ_CTL_IGNORE_STALLS (1<<5)
diff-tree 3fbbd0afde49c53a5a8661f75c8c8c4be3020c30 (from 0fdbf64b34e4114c2b89d696b268b9c7464f1efd)
Author: Michel Dänzer <michel at tungstengraphics.com>
Date: Tue Aug 28 17:48:20 2007 +0200
Fix build against pre-pci-rework xserver.
diff --git a/src/common.h b/src/common.h
index cfe00fc..40ea038 100644
--- a/src/common.h
+++ b/src/common.h
@@ -444,7 +444,9 @@ extern int I810_DEBUG;
#define PIPE_NAME(n) ('A' + (n))
+#if XSERVER_LIBPCIACCESS
struct pci_device *
intel_host_bridge (void);
+#endif
#endif /* _INTEL_COMMON_H_ */
diff-tree 0fdbf64b34e4114c2b89d696b268b9c7464f1efd (from 3411eb0dbae470b910af3116a4ab960c821b9b20)
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Tue Aug 28 21:56:21 2007 +0800
Fix i915 a8 color buffer blending
From spec, i915 engine uses green channel when reading from 8bit
color buffer for blending, and also writes back green channel.
Fix blend factor in dest alpha case by using dest color instead.
Now rendercheck can pass a8 tests.
diff --git a/src/i915_render.c b/src/i915_render.c
index 7546dfd..ca85bf7 100644
--- a/src/i915_render.c
+++ b/src/i915_render.c
@@ -123,6 +123,17 @@ static CARD32 i915_get_blend_cntl(int op
sblend = BLENDFACT_ZERO;
}
+ /* i915 engine reads 8bit color buffer into green channel in cases
+ like color buffer blending .etc, and also writes back green channel.
+ So with dst_alpha blend we should use color factor. See spec on
+ "8-bit rendering" */
+ if ((dst_format == PICT_a8) && i915_blend_op[op].dst_alpha) {
+ if (sblend == BLENDFACT_DST_ALPHA)
+ sblend = BLENDFACT_DST_COLR;
+ else if (sblend == BLENDFACT_INV_DST_ALPHA)
+ sblend = BLENDFACT_INV_DST_COLR;
+ }
+
/* If the source alpha is being used, then we should only be in a case
* where the source blend factor is 0, and the source blend value is the
* mask channels multiplied by the source picture's alpha.
diff-tree 3411eb0dbae470b910af3116a4ab960c821b9b20 (from 387fed6daa7426e4a85d30ba7cf608b5f41d24bb)
Author: Keith Packard <keithp at koto.keithp.com>
Date: Sun Aug 26 23:09:01 2007 -0700
i830_driver.c changes for libpciaccess.
Change to use libpciaccess APIs, including computing and using BAR indices
for various mapping activities.
diff --git a/src/i830_driver.c b/src/i830_driver.c
index ab42fd9..9fa231d 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -201,6 +201,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "dri.h"
#include <sys/ioctl.h>
#include <errno.h>
+#ifdef XF86DRI_MM
+#include "xf86mm.h"
+#endif
#endif
#ifdef I830_USE_EXA
@@ -418,16 +421,23 @@ static int
I830DetectMemory(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
+#if !XSERVER_LIBPCIACCESS
PCITAG bridge;
- CARD16 gmch_ctrl;
+#endif
+ uint16_t gmch_ctrl;
int memsize = 0, gtt_size;
int range;
#if 0
VbeInfoBlock *vbeInfo;
#endif
+#if XSERVER_LIBPCIACCESS
+ struct pci_device *bridge = intel_host_bridge ();
+ pci_device_cfg_read_u16(bridge, & gmch_ctrl, I830_GMCH_CTRL);
+#else
bridge = pciTag(0, 0, 0); /* This is always the host bridge */
gmch_ctrl = pciReadWord(bridge, I830_GMCH_CTRL);
+#endif
if (IS_I965G(pI830)) {
/* The 965 may have a GTT that is actually larger than is necessary
@@ -543,9 +553,52 @@ I830DetectMemory(ScrnInfoPtr pScrn)
static Bool
I830MapMMIO(ScrnInfoPtr pScrn)
{
+#if XSERVER_LIBPCIACCESS
+ int err;
+ struct pci_device *device;
+#else
int mmioFlags;
+#endif
I830Ptr pI830 = I830PTR(pScrn);
+#if XSERVER_LIBPCIACCESS
+ pI830->GTTBase = NULL;
+ device = pI830->PciInfo;
+ err = pci_device_map_region (device, pI830->mmio_bar, TRUE);
+ if (err)
+ {
+ xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+ "Unable to map mmio BAR. %s (%d)\n",
+ strerror (err), err);
+ return FALSE;
+ }
+ pI830->MMIOBase = device->regions[pI830->mmio_bar].memory;
+ pI830->gtt_bar = -1;
+
+ /* XXX GTT aperture base needs figuring out */
+ if (IS_I9XX(pI830))
+ {
+ if (IS_I965G(pI830))
+ {
+ pI830->GTTBase = (unsigned char *) pI830->MMIOBase + (512 * 1024);
+ }
+ else
+ {
+ pI830->gtt_bar = 3;
+ err = pci_device_map_region (device, pI830->gtt_bar, TRUE);
+ if (err)
+ {
+ xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+ "Unable to map GTT BAR. %s (%d)\n",
+ strerror (err), err);
+ pI830->GTTBase = NULL;
+ }
+ else
+ pI830->GTTBase = device->regions[pI830->gtt_bar].memory;
+ }
+ }
+#else
+
#if !defined(__alpha__)
mmioFlags = VIDMEM_MMIO | VIDMEM_READSIDEEFFECT;
#else
@@ -585,6 +638,7 @@ I830MapMMIO(ScrnInfoPtr pScrn)
*/
pI830->GTTBase = NULL;
}
+#endif /* else HAVE_PCI_ACCESS */
return TRUE;
}
@@ -594,6 +648,10 @@ I830MapMem(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
long i;
+#if XSERVER_LIBPCIACCESS
+ struct pci_device *const device = pI830->PciInfo;
+ int err;
+#endif
for (i = 2; i < pI830->FbMapSize; i <<= 1) ;
pI830->FbMapSize = i;
@@ -601,11 +659,24 @@ I830MapMem(ScrnInfoPtr pScrn)
if (!I830MapMMIO(pScrn))
return FALSE;
+#if XSERVER_LIBPCIACCESS
+ err = pci_device_map_region (device, pI830->fb_bar, TRUE);
+ if (err)
+ {
+ xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+ "Unable to map frame buffer BAR. %s (%d)\n",
+ strerror (err), err);
+ return FALSE;
+ }
+ pI830->FbBase = device->regions[pI830->fb_bar].memory;
+ pI830->FbMapSize = device->regions[pI830->fb_bar].size;
+#else
pI830->FbBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
pI830->PciTag,
pI830->LinearAddr, pI830->FbMapSize);
if (!pI830->FbBase)
return FALSE;
+#endif
if (I830IsPrimary(pScrn) && pI830->LpRing->mem != NULL) {
pI830->LpRing->virtual_start =
@@ -620,16 +691,31 @@ I830UnmapMMIO(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
+#if XSERVER_LIBPCIACCESS
+ pci_device_unmap_region (pI830->PciInfo, pI830->mmio_bar);
+#else
xf86UnMapVidMem(pScrn->scrnIndex, (pointer) pI830->MMIOBase,
I810_REG_SIZE);
+#endif
pI830->MMIOBase = NULL;
if (IS_I9XX(pI830)) {
if (IS_I965G(pI830))
+ {
+#if XSERVER_LIBPCIACCESS
+ ;
+#else
xf86UnMapVidMem(pScrn->scrnIndex, pI830->GTTBase, 512 * 1024);
- else {
+#endif
+ }
+ else
+ {
+#if XSERVER_LIBPCIACCESS
+ pci_device_unmap_region (pI830->PciInfo, pI830->gtt_bar);
+#else
xf86UnMapVidMem(pScrn->scrnIndex, pI830->GTTBase,
pI830->FbMapSize / 1024);
+#endif
}
}
}
@@ -927,6 +1013,7 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
const char *chipname;
int num_pipe;
int max_width, max_height;
+ uint32_t capid;
if (pScrn->numEntities != 1)
return FALSE;
@@ -971,8 +1058,10 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
return FALSE;
pI830->PciInfo = xf86GetPciInfoForEntity(pI830->pEnt->index);
+#if !XSERVER_LIBPCIACCESS
pI830->PciTag = pciTag(pI830->PciInfo->bus, pI830->PciInfo->device,
pI830->PciInfo->func);
+#endif
/* Allocate an entity private if necessary */
if (xf86IsEntityShared(pScrn->entityList[0])) {
@@ -1061,7 +1150,7 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
/* We have to use PIO to probe, because we haven't mapped yet. */
I830SetPIOAccess(pI830);
- switch (pI830->PciInfo->chipType) {
+ switch (DEVICE_ID(pI830->PciInfo)) {
case PCI_CHIP_I830_M:
chipname = "830M";
break;
@@ -1070,8 +1159,12 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
break;
case PCI_CHIP_I855_GM:
/* Check capid register to find the chipset variant */
- pI830->variant = (pciReadLong(pI830->PciTag, I85X_CAPID)
- >> I85X_VARIANT_SHIFT) & I85X_VARIANT_MASK;
+#if XSERVER_LIBPCIACCESS
+ pci_device_cfg_read_u32 (pI830->PciInfo, &capid, I85X_CAPID);
+#else
+ capid = pciReadLong (pI830->PciTag, I85X_CAPID);
+#endif
+ pI830->variant = (capid >> I85X_VARIANT_SHIFT) & I85X_VARIANT_MASK;
switch (pI830->variant) {
case I855_GM:
chipname = "855GM";
@@ -1155,11 +1248,11 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
from = X_CONFIG;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n",
pI830->pEnt->device->chipID);
- pI830->PciInfo->chipType = pI830->pEnt->device->chipID;
+ DEVICE_ID(pI830->PciInfo) = pI830->pEnt->device->chipID;
} else {
from = X_PROBED;
pScrn->chipset = (char *)xf86TokenToString(I830Chipsets,
- pI830->PciInfo->chipType);
+ DEVICE_ID(pI830->PciInfo));
}
if (pI830->pEnt->device->chipRev >= 0) {
@@ -1170,6 +1263,13 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n",
(pScrn->chipset != NULL) ? pScrn->chipset : "Unknown i8xx");
+#if XSERVER_LIBPCIACCESS
+ if (IS_I9XX(pI830))
+ pI830->fb_bar = 2;
+ else
+ pI830->fb_bar = 0;
+ pI830->LinearAddr = pI830->PciInfo->regions[pI830->fb_bar].base_addr;
+#else
if (pI830->pEnt->device->MemBase != 0) {
pI830->LinearAddr = pI830->pEnt->device->MemBase;
from = X_CONFIG;
@@ -1188,10 +1288,18 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
return FALSE;
}
}
+#endif
xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n",
(unsigned long)pI830->LinearAddr);
+#if XSERVER_LIBPCIACCESS
+ if (IS_I9XX(pI830))
+ pI830->mmio_bar = 0;
+ else
+ pI830->mmio_bar = 1;
+ pI830->MMIOAddr = pI830->PciInfo->regions[pI830->mmio_bar].base_addr;
+#else
if (pI830->pEnt->device->IOBase != 0) {
pI830->MMIOAddr = pI830->pEnt->device->IOBase;
from = X_CONFIG;
@@ -1209,6 +1317,7 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
return FALSE;
}
}
+#endif
xf86DrvMsg(pScrn->scrnIndex, from, "IO registers at addr 0x%lX\n",
(unsigned long)pI830->MMIOAddr);
@@ -1232,11 +1341,19 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
xf86CrtcSetSizeRange (pScrn, 320, 200, max_width, max_height);
if (IS_I830(pI830) || IS_845G(pI830)) {
+#if XSERVER_LIBPCIACCESS
+ uint16_t gmch_ctrl;
+ struct pci_device *bridge;
+
+ bridge = intel_host_bridge ();
+ pci_device_cfg_read_u16 (bridge, &gmch_ctrl, I830_GMCH_CTRL);
+#else
PCITAG bridge;
CARD16 gmch_ctrl;
bridge = pciTag(0, 0, 0); /* This is always the host bridge */
gmch_ctrl = pciReadWord(bridge, I830_GMCH_CTRL);
+#endif
if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) {
pI830->FbMapSize = 0x8000000;
} else {
@@ -1244,8 +1361,12 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
}
} else {
if (IS_I9XX(pI830)) {
+#if XSERVER_LIBPCIACCESS
+ pI830->FbMapSize = pI830->PciInfo->regions[pI830->fb_bar].size;
+#else
pI830->FbMapSize = 1UL << pciGetBaseSize(pI830->PciTag, 2, TRUE,
NULL);
+#endif
} else {
/* 128MB aperture for later i8xx series. */
pI830->FbMapSize = 0x8000000;
@@ -1275,7 +1396,7 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
(1 << 23) | (2 << 16));
#endif
- if (pI830->PciInfo->chipType == PCI_CHIP_E7221_G)
+ if (DEVICE_ID(pI830->PciInfo) == PCI_CHIP_E7221_G)
num_pipe = 1;
else
if (IS_MOBILE(pI830) || IS_I9XX(pI830))
diff-tree 387fed6daa7426e4a85d30ba7cf608b5f41d24bb (from 2c794192052ca55c3263e27e13d16aafe8caa92c)
Author: Keith Packard <keithp at koto.keithp.com>
Date: Sun Aug 26 23:06:57 2007 -0700
i810_driver.c changes for libpciaccess.
This includes new probe code (intel_pci_probe) and changes for i810 to
use BAR indices to refer to suitable portions of the device mappings.
diff --git a/src/i810_driver.c b/src/i810_driver.c
index 972b6d5..e55f942 100644
--- a/src/i810_driver.c
+++ b/src/i810_driver.c
@@ -94,7 +94,16 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN
/* Required Functions: */
static void I810Identify(int flags);
+
+#if XSERVER_LIBPCIACCESS
+static Bool intel_pci_probe (DriverPtr drv,
+ int entity_num,
+ struct pci_device *dev,
+ intptr_t match_data);
+#else
static Bool I810Probe(DriverPtr drv, int flags);
+#endif
+
#ifndef I830_ONLY
static Bool I810PreInit(ScrnInfoPtr pScrn, int flags);
static Bool I810ScreenInit(int Index, ScreenPtr pScreen, int argc,
@@ -112,14 +121,59 @@ static ModeStatus I810ValidMode(int scrn
#endif /* I830_ONLY */
+#if XSERVER_LIBPCIACCESS
+
+#define INTEL_DEVICE_MATCH(d,i) \
+ { 0x8086, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0, 0, (i) }
+
+static const struct pci_id_match intel_device_match[] = {
+#ifndef I830_ONLY
+ INTEL_DEVICE_MATCH (PCI_CHIP_I810, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I810_DC100, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I810_E, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I815, 0 ),
+#endif
+ INTEL_DEVICE_MATCH (PCI_CHIP_I830_M, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_845_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I855_GM, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I865_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I915_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_E7221_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I915_GM, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I945_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I945_GM, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I945_GME, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I965_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I965_G_1, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I965_Q, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I946_GZ, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I965_GM, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I965_GME, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_G33_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_Q35_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_Q33_G, 0 ),
+ { 0, 0, 0 },
+};
+
+#endif /* XSERVER_LIBPCIACCESS */
+
_X_EXPORT DriverRec I810 = {
I810_VERSION,
I810_DRIVER_NAME,
I810Identify,
+#if XSERVER_LIBPCIACCESS
+ NULL,
+#else
I810Probe,
+#endif
I810AvailableOptions,
NULL,
- 0
+ 0,
+ NULL,
+#if XSERVER_LIBPCIACCESS
+ intel_device_match,
+ intel_pci_probe
+#endif
};
/* *INDENT-OFF* */
@@ -429,7 +483,13 @@ i810Setup(pointer module, pointer opts,
*/
if (!setupDone) {
setupDone = 1;
- xf86AddDriver(&I810, module, 0);
+ xf86AddDriver(&I810, module,
+#if XSERVER_LIBPCIACCESS
+ HaveDriverFuncs
+#else
+ 0
+#endif
+ );
/*
* Tell the loader about symbols from other modules that this module
@@ -517,6 +577,113 @@ I810AvailableOptions(int chipid, int bus
#endif
}
+#if XSERVER_LIBPCIACCESS
+struct pci_device *
+intel_host_bridge (void)
+{
+ static const struct pci_slot_match bridge_match = {
+ 0, 0, 0, PCI_MATCH_ANY, 0
+ };
+ struct pci_device_iterator *slot_iterator;
+ struct pci_device *bridge;
+
+ slot_iterator = pci_slot_match_iterator_create (&bridge_match);
+ bridge = pci_device_next (slot_iterator);
+ pci_iterator_destroy (slot_iterator);
+ return bridge;
+}
+
+/*
+ * intel_pci_probe --
+ *
+ * Look through the PCI bus to find cards that are intel boards.
+ * Setup the dispatch table for the rest of the driver functions.
+ *
+ */
+static Bool intel_pci_probe (DriverPtr driver,
+ int entity_num,
+ struct pci_device *device,
+ intptr_t match_data)
+{
+ ScrnInfoPtr scrn = NULL;
+ EntityInfoPtr entity;
+ I830EntPtr i830_ent = NULL;
+ DevUnion *private;
+
+ scrn = xf86ConfigPciEntity (scrn, 0, entity_num, I810PciChipsets,
+ NULL,
+ NULL, NULL, NULL, NULL);
+ if (scrn != NULL)
+ {
+ scrn->driverVersion = I810_VERSION;
+ scrn->driverName = I810_DRIVER_NAME;
+ scrn->name = I810_NAME;
+ scrn->Probe = NULL;
+
+ entity = xf86GetEntityInfo (entity_num);
+
+ switch (DEVICE_ID(device)) {
+#ifndef I830_ONLY
+ case PCI_CHIP_I810:
+ case PCI_CHIP_I810_DC100:
+ case PCI_CHIP_I810_E:
+ case PCI_CHIP_I815:
+ scrn->PreInit = I810PreInit;
+ scrn->ScreenInit = I810ScreenInit;
+ scrn->SwitchMode = I810SwitchMode;
+ scrn->AdjustFrame = I810AdjustFrame;
+ scrn->EnterVT = I810EnterVT;
+ scrn->LeaveVT = I810LeaveVT;
+ scrn->FreeScreen = I810FreeScreen;
+ scrn->ValidMode = I810ValidMode;
+ break;
+#endif
+ case PCI_CHIP_845_G:
+ case PCI_CHIP_I865_G:
+ /*
+ * These two chips have only one pipe, and
+ * cannot do dual-head
+ */
+ I830InitpScrn(scrn);
+ break;
+ default:
+ /*
+ * Everything else is an i830-ish dual-pipe chip
+ */
+ xf86SetEntitySharable(entity_num);
+
+ /* Allocate an entity private if necessary */
+ if (I830EntityIndex < 0)
+ I830EntityIndex = xf86AllocateEntityPrivateIndex();
+
+ private = xf86GetEntityPrivate(scrn->entityList[0],
+ I830EntityIndex);
+ i830_ent = private->ptr;
+ if (!i830_ent)
+ {
+ private->ptr = xnfcalloc(sizeof(I830EntRec), 1);
+ i830_ent = private->ptr;
+ i830_ent->lastInstance = -1;
+ }
+
+ /*
+ * Set the entity instance for this instance of the driver.
+ * For dual head per card, instance 0 is the "master"
+ * instance, driving the primary head, and instance 1 is
+ * the "slave".
+ */
+ i830_ent->lastInstance++;
+ xf86SetEntityInstanceForScreen(scrn,
+ scrn->entityList[0],
+ i830_ent->lastInstance);
+ I830InitpScrn(scrn);
+ break;
+ }
+ }
+ return scrn != NULL;
+}
+#else /* XSERVER_LIBPCIACCESS */
+
/*
* I810Probe --
*
@@ -678,6 +845,7 @@ I810Probe(DriverPtr drv, int flags)
return foundScreen;
}
+#endif /* else XSERVER_LIBPCIACCESS */
#ifndef I830_ONLY
static void
@@ -769,8 +937,10 @@ I810PreInit(ScrnInfoPtr pScrn, int flags
pI810->ioBase = hwp->PIOOffset;
pI810->PciInfo = xf86GetPciInfoForEntity(pI810->pEnt->index);
+#if !XSERVER_LIBPCIACCESS
pI810->PciTag = pciTag(pI810->PciInfo->bus, pI810->PciInfo->device,
pI810->PciInfo->func);
+#endif
if (xf86RegisterResources(pI810->pEnt->index, NULL, ResNone))
return FALSE;
@@ -899,7 +1069,7 @@ I810PreInit(ScrnInfoPtr pScrn, int flags
} else {
from = X_PROBED;
pScrn->chipset = (char *)xf86TokenToString(I810Chipsets,
- pI810->PciInfo->chipType);
+ DEVICE_ID(pI810->PciInfo));
}
if (pI810->pEnt->device->chipRev >= 0) {
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n",
@@ -909,6 +1079,10 @@ I810PreInit(ScrnInfoPtr pScrn, int flags
xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n",
(pScrn->chipset != NULL) ? pScrn->chipset : "Unknown i810");
+#if XSERVER_LIBPCIACCESS
+ pI810->fb_bar = 0;
+ pI810->LinearAddr = pI810->PciInfo->regions[pI810->fb_bar].base_addr;
+#else
if (pI810->pEnt->device->MemBase != 0) {
pI810->LinearAddr = pI810->pEnt->device->MemBase;
from = X_CONFIG;
@@ -923,9 +1097,14 @@ I810PreInit(ScrnInfoPtr pScrn, int flags
return FALSE;
}
}
+#endif
xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n",
(unsigned long)pI810->LinearAddr);
+#if XSERVER_LIBPCIACCESS
+ pI810->mmio_bar = 1;
+ pI810->MMIOAddr = pI810->PciInfo->regions[pI810->mmio_bar].base_addr;
+#else
if (pI810->pEnt->device->IOBase != 0) {
pI810->MMIOAddr = pI810->pEnt->device->IOBase;
from = X_CONFIG;
@@ -940,6 +1119,7 @@ I810PreInit(ScrnInfoPtr pScrn, int flags
return FALSE;
}
}
+#endif
xf86DrvMsg(pScrn->scrnIndex, from, "IO registers at addr 0x%lX\n",
(unsigned long)pI810->MMIOAddr);
@@ -956,8 +1136,13 @@ I810PreInit(ScrnInfoPtr pScrn, int flags
/* Find out memory bus frequency.
*/
{
- unsigned long whtcfg_pamr_drp = pciReadLong(pI810->PciTag,
- WHTCFG_PAMR_DRP);
+ uint32_t whtcfg_pamr_drp;
+
+#if XSERVER_LIBPCIACCESS
+ pci_device_cfg_read_u32(pI810->PciInfo, & whtcfg_pamr_drp, WHTCFG_PAMR_DRP);
+#else
+ whtcfg_pamr_drp = pciReadLong(pI810->PciTag, WHTCFG_PAMR_DRP);
+#endif
/* Need this for choosing watermarks.
*/
@@ -1010,11 +1195,19 @@ I810PreInit(ScrnInfoPtr pScrn, int flags
/* Calculate Fixed Offsets depending on graphics aperture size */
{
+#if XSERVER_LIBPCIACCESS
+ struct pci_device *bridge = intel_host_bridge ();
+ uint32_t smram_miscc;
+
+ pci_device_cfg_read_u32 (bridge, & smram_miscc, SMRAM_MISCC);
+#else
PCITAG bridge;
long smram_miscc;
bridge = pciTag(0, 0, 0); /* This is always the host bridge */
smram_miscc = pciReadLong(bridge, SMRAM_MISCC);
+#endif
+
if ((smram_miscc & GFX_MEM_WIN_SIZE) == GFX_MEM_WIN_32M) {
pI810->FbMapSize = 0x1000000;
pI810->DepthOffset = 0x1000000;
@@ -1204,6 +1397,10 @@ I810MapMMIO(ScrnInfoPtr pScrn)
{
int mmioFlags;
I810Ptr pI810 = I810PTR(pScrn);
+#if XSERVER_LIBPCIACCESS
+ struct pci_device *const device = pI810->PciInfo;
+ int err;
+#endif
#if !defined(__alpha__)
mmioFlags = VIDMEM_MMIO | VIDMEM_READSIDEEFFECT;
@@ -1211,11 +1408,23 @@ I810MapMMIO(ScrnInfoPtr pScrn)
mmioFlags = VIDMEM_MMIO | VIDMEM_READSIDEEFFECT | VIDMEM_SPARSE;
#endif
+#if XSERVER_LIBPCIACCESS
+ err = pci_device_map_region (device, pI810->mmio_bar, TRUE);
+ if (err)
+ {
+ xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+ "Unable to map mmio BAR. %s (%d)\n",
+ strerror (err), err);
+ return FALSE;
+ }
+ pI810->MMIOBase = device->regions[pI810->mmio_bar].memory;
+#else
pI810->MMIOBase = xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
pI810->PciTag,
pI810->MMIOAddr, I810_REG_SIZE);
if (!pI810->MMIOBase)
return FALSE;
+#endif
return TRUE;
}
@@ -1224,17 +1433,34 @@ I810MapMem(ScrnInfoPtr pScrn)
{
I810Ptr pI810 = I810PTR(pScrn);
long i;
+#if XSERVER_LIBPCIACCESS
+ struct pci_device *const device = pI810->PciInfo;
+ int err;
+#endif
for (i = 2; i < pI810->FbMapSize; i <<= 1) ;
if (!I810MapMMIO(pScrn))
return FALSE;
+#if XSERVER_LIBPCIACCESS
+ err = pci_device_map_region (device, pI810->fb_bar, TRUE);
+ if (err)
+ {
+ xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+ "Unable to map frame buffer BAR. %s (%d)\n",
+ strerror (err), err);
+ return FALSE;
+ }
+ pI810->FbBase = device->regions[pI810->fb_bar].memory;
+ pI810->FbMapSize = device->regions[pI810->fb_bar].size;
+#else
pI810->FbBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
pI810->PciTag,
pI810->LinearAddr, i);
if (!pI810->FbBase)
return FALSE;
+#endif
pI810->LpRing->virtual_start = pI810->FbBase + pI810->LpRing->mem.Start;
@@ -1246,8 +1472,12 @@ I810UnmapMMIO(ScrnInfoPtr pScrn)
{
I810Ptr pI810 = I810PTR(pScrn);
+#if XSERVER_LIBPCIACCESS
+ pci_device_unmap_region (pI810->PciInfo, pI810->mmio_bar);
+#else
xf86UnMapVidMem(pScrn->scrnIndex, (pointer) pI810->MMIOBase,
I810_REG_SIZE);
+#endif
pI810->MMIOBase = NULL;
}
@@ -1256,8 +1486,12 @@ I810UnmapMem(ScrnInfoPtr pScrn)
{
I810Ptr pI810 = I810PTR(pScrn);
+#if XSERVER_LIBPCIACCESS
+ pci_device_unmap_region (pI810->PciInfo, pI810->fb_bar);
+#else
xf86UnMapVidMem(pScrn->scrnIndex, (pointer) pI810->FbBase,
pI810->FbMapSize);
+#endif
pI810->FbBase = NULL;
I810UnmapMMIO(pScrn);
return TRUE;
diff-tree 2c794192052ca55c3263e27e13d16aafe8caa92c (from 70e8e5957200401474967a467663ae049e9080f2)
Author: Keith Packard <keithp at koto.keithp.com>
Date: Sun Aug 26 22:46:19 2007 -0700
Mechanical API conversions for libpciaccess.
Uncomplicated API transistions for libpciaccess usage:
Legacy xf86 API libpciaccess API
--------------- ----------------
xf86ReadPciBIOS pci_device_read_rom
pciReadWord pci_device_cfg_read_u16
pciWriteByte pci_device_cfg_write_u8
And, more use of the API-independent DEVICE_ID/SUBVENDOR_ID/SUBSYS_ID macros
to pull PCI identification data from the underlying structure.
diff --git a/src/i830_bios.c b/src/i830_bios.c
index 7703c80..7ed791e 100644
--- a/src/i830_bios.c
+++ b/src/i830_bios.c
@@ -97,7 +97,11 @@ i830_bios_get (ScrnInfoPtr pScrn)
INTEL_VBIOS_SIZE);
vbeFree (pVbe);
} else {
+#if XSERVER_LIBPCIACCESS
+ pci_device_read_rom (pI830->PciInfo, bios);
+#else
xf86ReadPciBIOS(0, pI830->PciTag, 0, bios, INTEL_VBIOS_SIZE);
+#endif
}
if (0)
diff --git a/src/i830_display.c b/src/i830_display.c
index 0ab0de7..d8be8d9 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -868,9 +868,14 @@ i830_get_core_clock_speed(ScrnInfoPtr pS
else if (IS_I945GM(pI830) || IS_845G(pI830))
return 200000;
else if (IS_I915GM(pI830)) {
- CARD16 gcfgc = pciReadWord(pI830->PciTag, I915_GCFGC);
+ uint16_t gcfgc;
- if (gcfgc & I915_LOW_FREQUENCY_ENABLE)
+#if XSERVER_LIBPCIACCESS
+ pci_device_cfg_read_u16 (pI830->PciInfo, &gcfgc, I915_GCFGC);
+#else
+ gcfgc = pciReadWord(pI830->PciTag, I915_GCFGC);
+#endif
+ if (gcfgc & I915_LOW_FREQUENCY_ENABLE)
return 133000;
else {
switch (gcfgc & I915_DISPLAY_CLOCK_MASK) {
@@ -884,8 +889,14 @@ i830_get_core_clock_speed(ScrnInfoPtr pS
} else if (IS_I865G(pI830))
return 266000;
else if (IS_I855(pI830)) {
+#if XSERVER_LIBPCIACCESS
+ struct pci_device *bridge = intel_host_bridge ();
+ uint16_t hpllcc;
+ pci_device_cfg_read_u16 (bridge, &hpllcc, I855_HPLLCC);
+#else
PCITAG bridge = pciTag(0, 0, 0); /* This is always the host bridge */
CARD16 hpllcc = pciReadWord(bridge, I855_HPLLCC);
+#endif
/* Assume that the hardware is in the high speed state. This
* should be the default.
diff --git a/src/i830_lvds.c b/src/i830_lvds.c
index 18e5c2b..0b6b192 100644
--- a/src/i830_lvds.c
+++ b/src/i830_lvds.c
@@ -84,7 +84,11 @@ i830_lvds_set_backlight(xf86OutputPtr ou
CARD32 blc_pwm_ctl;
if (i830_lvds_backlight_legacy(pI830))
+#if XSERVER_LIBPCIACCESS
+ pci_device_cfg_write_u8 (pI830->PciInfo, 0xfe, LEGACY_BACKLIGHT_BRIGHTNESS);
+#else
pciWriteByte(pI830->PciTag, LEGACY_BACKLIGHT_BRIGHTNESS, 0xfe);
+#endif
blc_pwm_ctl = INREG(BLC_PWM_CTL);
blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index fb10570..28b8ff9 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -84,9 +84,9 @@ void i830_fixup_devices(ScrnInfoPtr scrn
i830_quirk_ptr p = i830_quirk_list;
while (p && p->chipType != 0) {
- if (pI830->PciInfo->chipType == p->chipType &&
- pI830->PciInfo->subsysVendor == p->subsysVendor &&
- (pI830->PciInfo->subsysCard == p->subsysCard ||
+ if (DEVICE_ID(pI830->PciInfo) == p->chipType &&
+ SUBVENDOR_ID(pI830->PciInfo) == p->subsysVendor &&
+ (SUBSYS_ID(pI830->PciInfo) == p->subsysCard ||
p->subsysCard == SUBSYS_ANY))
p->hook(pI830);
++p;
diff --git a/src/i830_tv.c b/src/i830_tv.c
index a77bf98..c90d41e 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -1138,7 +1138,7 @@ i830_tv_mode_set(xf86OutputPtr output, D
tv_mode->dda3_inc << TV_SCDDA3_INC_SHIFT;
/* Enable two fixes for the chips that need them. */
- if (pI830->PciInfo->chipType < PCI_CHIP_I945_G)
+ if (DEVICE_ID(pI830->PciInfo) < PCI_CHIP_I945_G)
tv_ctl |= TV_ENC_C0_FIX | TV_ENC_SDP_FIX;
OUTREG(TV_H_CTL_1, hctl1);
diff-tree 70e8e5957200401474967a467663ae049e9080f2 (from 5516cc781bd488c936af225123812a61ed5874b8)
Author: Keith Packard <keithp at koto.keithp.com>
Date: Sun Aug 26 22:40:25 2007 -0700
Change DRI interface to fill in PCI data from new libpciaccess structure.
The DRI interface requires bus identification for each DRI object; pull that
data from the libpciaccess structures as necessary.
diff --git a/src/i810_dri.c b/src/i810_dri.c
index 72718d3..e5e1565 100644
--- a/src/i810_dri.c
+++ b/src/i810_dri.c
@@ -354,9 +354,15 @@ I810DRIScreenInit(ScreenPtr pScreen)
} else {
pDRIInfo->busIdString = xalloc(64);
sprintf(pDRIInfo->busIdString, "PCI:%d:%d:%d",
+#if XSERVER_LIBPCIACCESS
+ ((pI810->PciInfo->domain << 8) | pI810->PciInfo->bus),
+ pI810->PciInfo->dev, pI810->PciInfo->func
+#else
((pciConfigPtr) pI810->PciInfo->thisCard)->busnum,
((pciConfigPtr) pI810->PciInfo->thisCard)->devnum,
- ((pciConfigPtr) pI810->PciInfo->thisCard)->funcnum);
+ ((pciConfigPtr) pI810->PciInfo->thisCard)->funcnum
+#endif
+ );
}
pDRIInfo->ddxDriverMajorVersion = I810_MAJOR_VERSION;
pDRIInfo->ddxDriverMinorVersion = I810_MINOR_VERSION;
@@ -972,12 +978,20 @@ I810DRIScreenInit(ScreenPtr pScreen)
if (!pI810DRI->irq) {
pI810DRI->irq = drmGetInterruptFromBusID(pI810->drmSubFD,
+#if XSERVER_LIBPCIACCESS
+ ((pI810->PciInfo->domain << 8) |
+ pI810->PciInfo->bus),
+ pI810->PciInfo->dev,
+ pI810->PciInfo->func
+#else
((pciConfigPtr) pI810->
PciInfo->thisCard)->busnum,
((pciConfigPtr) pI810->
PciInfo->thisCard)->devnum,
((pciConfigPtr) pI810->
- PciInfo->thisCard)->funcnum);
+ PciInfo->thisCard)->funcnum
+#endif
+ );
if ((drmCtlInstHandler(pI810->drmSubFD, pI810DRI->irq)) != 0) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"[drm] failure adding irq handler, there is a device "
@@ -991,7 +1005,7 @@ I810DRIScreenInit(ScreenPtr pScreen)
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"[drm] dma control initialized, using IRQ %d\n", pI810DRI->irq);
- pI810DRI->deviceID = pI810->PciInfo->chipType;
+ pI810DRI->deviceID = DEVICE_ID(pI810->PciInfo);
pI810DRI->width = pScrn->virtualX;
pI810DRI->height = pScrn->virtualY;
pI810DRI->mem = pScrn->videoRam * 1024;
diff --git a/src/i830_dri.c b/src/i830_dri.c
index e2b42b4..32f6510 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -539,9 +539,15 @@ I830DRIScreenInit(ScreenPtr pScreen)
} else {
pDRIInfo->busIdString = xalloc(64);
sprintf(pDRIInfo->busIdString, "PCI:%d:%d:%d",
+#if XSERVER_LIBPCIACCESS
+ ((pI830->PciInfo->domain << 8) | pI830->PciInfo->bus),
+ pI830->PciInfo->dev, pI830->PciInfo->func
+#else
((pciConfigPtr) pI830->PciInfo->thisCard)->busnum,
((pciConfigPtr) pI830->PciInfo->thisCard)->devnum,
- ((pciConfigPtr) pI830->PciInfo->thisCard)->funcnum);
+ ((pciConfigPtr) pI830->PciInfo->thisCard)->funcnum
+#endif
+ );
}
pDRIInfo->ddxDriverMajorVersion = I830_MAJOR_VERSION;
pDRIInfo->ddxDriverMinorVersion = I830_MINOR_VERSION;
@@ -978,13 +984,13 @@ I830DRIDoMappings(ScreenPtr pScreen)
return FALSE;
}
- if (pI830->PciInfo->chipType != PCI_CHIP_845_G &&
- pI830->PciInfo->chipType != PCI_CHIP_I830_M) {
+ if (DEVICE_ID(pI830->PciInfo) != PCI_CHIP_845_G &&
+ DEVICE_ID(pI830->PciInfo) != PCI_CHIP_I830_M) {
I830SetParam(pScrn, I830_SETPARAM_USE_MI_BATCHBUFFER_START, 1 );
}
pI830DRI = (I830DRIPtr) pI830->pDRIInfo->devPrivate;
- pI830DRI->deviceID = pI830->PciInfo->chipType;
+ pI830DRI->deviceID = DEVICE_ID(pI830->PciInfo);
pI830DRI->width = pScrn->virtualX;
pI830DRI->height = pScrn->virtualY;
pI830DRI->mem = pScrn->videoRam * 1024;
@@ -1020,12 +1026,20 @@ I830DRIResume(ScreenPtr pScreen)
{
pI830DRI->irq = drmGetInterruptFromBusID(pI830->drmSubFD,
+#if XSERVER_LIBPCIACCESS
+ ((pI830->PciInfo->domain << 8) |
+ pI830->PciInfo->bus),
+ pI830->PciInfo->dev,
+ pI830->PciInfo->func
+#else
((pciConfigPtr) pI830->
PciInfo->thisCard)->busnum,
((pciConfigPtr) pI830->
PciInfo->thisCard)->devnum,
((pciConfigPtr) pI830->
- PciInfo->thisCard)->funcnum);
+ PciInfo->thisCard)->funcnum
+#endif
+ );
if (drmCtlInstHandler(pI830->drmSubFD, pI830DRI->irq)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -1108,12 +1122,20 @@ I830DRIFinishScreenInit(ScreenPtr pScree
I830DRIPtr pI830DRI = (I830DRIPtr) pI830->pDRIInfo->devPrivate;
pI830DRI->irq = drmGetInterruptFromBusID(pI830->drmSubFD,
+#if XSERVER_LIBPCIACCESS
+ ((pI830->PciInfo->domain << 8) |
+ pI830->PciInfo->bus),
+ pI830->PciInfo->dev,
+ pI830->PciInfo->func
+#else
((pciConfigPtr) pI830->
PciInfo->thisCard)->busnum,
((pciConfigPtr) pI830->
PciInfo->thisCard)->devnum,
((pciConfigPtr) pI830->
- PciInfo->thisCard)->funcnum);
+ PciInfo->thisCard)->funcnum
+#endif
+ );
if (drmCtlInstHandler(pI830->drmSubFD, pI830DRI->irq)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
diff-tree 5516cc781bd488c936af225123812a61ed5874b8 (from daada59b5f8c2294b524a4b5920dc6b1c213642f)
Author: Keith Packard <keithp at koto.keithp.com>
Date: Sun Aug 26 22:37:38 2007 -0700
Add libpciaccess declarations to I810Rec and I830Rec.
Using libpciaccess requires a different type for PciInfo (struct pci_device
instead of pciVideoPtr) and it requires knowing which BAR each memory region
needs to be mapped from. Add these definitions to the driver private record
along with the includes necessary to use libpciaccess.
diff --git a/src/i810.h b/src/i810.h
index ff9134e..2031408 100644
--- a/src/i810.h
+++ b/src/i810.h
@@ -50,6 +50,11 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN
#include "vbe.h"
#include "vgaHW.h"
+#include "xorg-server.h"
+#ifdef XSERVER_LIBPCIACCESS
+#include <pciaccess.h>
+#endif
+
#ifdef XF86DRI
#include "xf86drm.h"
#include "sarea.h"
@@ -184,8 +189,14 @@ typedef struct _I810Rec {
unsigned long MMIOAddr;
IOADDRESS ioBase;
EntityInfoPtr pEnt;
+#if XSERVER_LIBPCIACCESS
+ int mmio_bar;
+ int fb_bar;
+ struct pci_device *PciInfo;
+#else
pciVideoPtr PciInfo;
PCITAG PciTag;
+#endif
I810RingBuffer *LpRing;
unsigned int BR[20];
diff --git a/src/i830.h b/src/i830.h
index b0c8f0f..4f176f8 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -61,6 +61,11 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN
#include "xf86Crtc.h"
#include "xf86RandR12.h"
+#include "xorg-server.h"
+#ifdef XSERVER_LIBPCIACCESS
+#include <pciaccess.h>
+#endif
+
#ifdef XF86DRI
#include "xf86drm.h"
#include "sarea.h"
@@ -360,8 +365,15 @@ typedef struct _I830Rec {
unsigned long MMIOAddr;
IOADDRESS ioBase;
EntityInfoPtr pEnt;
+#if XSERVER_LIBPCIACCESS
+ struct pci_device *PciInfo;
+ int mmio_bar;
+ int fb_bar;
+ int gtt_bar;
+#else
pciVideoPtr PciInfo;
PCITAG PciTag;
+#endif
CARD8 variant;
unsigned int BR[20];
diff-tree daada59b5f8c2294b524a4b5920dc6b1c213642f (from 3d3bf493a3973f4067433d27a4d7ddfecaa18f1c)
Author: Keith Packard <keithp at koto.keithp.com>
Date: Sun Aug 26 22:32:39 2007 -0700
Change IS_Ixxx tests to work with or without libpciaccess.
libpciaccess has a new structure that holds the PCI identifier data; borrow
macros from the mga driver to work with either the old xf86-specific
structure or the new libpciaccess structure.
diff --git a/src/common.h b/src/common.h
index fa96a5d..cfe00fc 100644
--- a/src/common.h
+++ b/src/common.h
@@ -384,26 +384,42 @@ extern int I810_DEBUG;
#define PCI_CHIP_Q33_G_BRIDGE 0x29D0
#endif
-#define IS_I810(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I810 || \
- pI810->PciInfo->chipType == PCI_CHIP_I810_DC100 || \
- pI810->PciInfo->chipType == PCI_CHIP_I810_E)
-#define IS_I815(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I815)
-#define IS_I830(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I830_M)
-#define IS_845G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_845_G)
-#define IS_I85X(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I855_GM)
-#define IS_I852(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I855_GM && (pI810->variant == I852_GM || pI810->variant == I852_GME))
-#define IS_I855(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I855_GM && (pI810->variant == I855_GM || pI810->variant == I855_GME))
-#define IS_I865G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I865_G)
-
-#define IS_I915G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I915_G || pI810->PciInfo->chipType == PCI_CHIP_E7221_G)
-#define IS_I915GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I915_GM)
-#define IS_I945G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_G)
-#define IS_I945GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_GM || pI810->PciInfo->chipType == PCI_CHIP_I945_GME)
-#define IS_I965GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I965_GM || pI810->PciInfo->chipType == PCI_CHIP_I965_GME)
-#define IS_I965G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I965_G || pI810->PciInfo->chipType == PCI_CHIP_I965_G_1 || pI810->PciInfo->chipType == PCI_CHIP_I965_Q || pI810->PciInfo->chipType == PCI_CHIP_I946_GZ || pI810->PciInfo->chipType == PCI_CHIP_I965_GM || pI810->PciInfo->chipType == PCI_CHIP_I965_GME)
-#define IS_G33CLASS(pI810) (pI810->PciInfo->chipType == PCI_CHIP_G33_G ||\
- pI810->PciInfo->chipType == PCI_CHIP_Q35_G ||\
- pI810->PciInfo->chipType == PCI_CHIP_Q33_G)
+#if XSERVER_LIBPCIACCESS
+#define I810_MEMBASE(p,n) (p)->regions[(n)].base_addr
+#define VENDOR_ID(p) (p)->vendor_id
+#define DEVICE_ID(p) (p)->device_id
+#define SUBVENDOR_ID(p) (p)->subvendor_id
+#define SUBSYS_ID(p) (p)->subdevice_id
+#define CHIP_REVISION(p) (p)->revision
+#else
+#define I810_MEMBASE(p,n) (p)->memBase[n]
+#define VENDOR_ID(p) (p)->vendor
+#define DEVICE_ID(p) (p)->chipType
+#define SUBVENDOR_ID(p) (p)->subsysVendor
+#define SUBSYS_ID(p) (p)->subsysCard
+#define CHIP_REVISION(p) (p)->chipRev
+#endif
+
+#define IS_I810(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I810 || \
+ DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I810_DC100 || \
+ DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I810_E)
+#define IS_I815(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I815)
+#define IS_I830(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I830_M)
+#define IS_845G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_845_G)
+#define IS_I85X(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I855_GM)
+#define IS_I852(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I855_GM && (pI810->variant == I852_GM || pI810->variant == I852_GME))
+#define IS_I855(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I855_GM && (pI810->variant == I855_GM || pI810->variant == I855_GME))
+#define IS_I865G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I865_G)
+
+#define IS_I915G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I915_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_E7221_G)
+#define IS_I915GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I915_GM)
+#define IS_I945G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_G)
+#define IS_I945GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_GME)
+#define IS_I965GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME)
+#define IS_I965G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_G_1 || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_Q || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I946_GZ || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME)
+#define IS_G33CLASS(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G33_G ||\
+ DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q35_G ||\
+ DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q33_G)
#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_I965G(pI810) || IS_G33CLASS(pI810))
#define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810) || IS_I965GM(pI810))
@@ -428,4 +444,7 @@ extern int I810_DEBUG;
#define PIPE_NAME(n) ('A' + (n))
+struct pci_device *
+intel_host_bridge (void);
+
#endif /* _INTEL_COMMON_H_ */
diff-tree 3d3bf493a3973f4067433d27a4d7ddfecaa18f1c (from 5faf9cc6afe1c30fa88bc6446088a6fa47fc5d0b)
Author: Keith Packard <keithp at koto.keithp.com>
Date: Sun Aug 26 22:27:34 2007 -0700
Intel driver configuration (only) changes for X server libpciaccess usage.
Detect whether the target X server uses libpciaccess, using it in the driver
compilation as necessary. This change means that utilities that used to use
libpciaccess will not do so unless the driver itself uses libpciaccess. Yes,
that could be fixed, but it doesn't seem that important.
This patch does not include any code changes necessary to actually have the
driver build against an X server using libpciaccess.
diff --git a/configure.ac b/configure.ac
index 8c2b5ec..1c7ad04 100644
--- a/configure.ac
+++ b/configure.ac
@@ -78,9 +78,6 @@ XORG_DRIVER_CHECK_EXT(DPMSExtension, xex
PKG_CHECK_MODULES(XORG, [xorg-server xproto xvmc fontsproto $REQUIRED_MODULES])
sdkdir=$(pkg-config --variable=sdkdir xorg-server)
-PKG_CHECK_MODULES([PCIACCESS], [pciaccess >= 0.5.0], have_pciaccess=yes, have_pciaccess=no)
-AM_CONDITIONAL(HAVE_PCIACCESS, test "x$have_pciaccess" = xyes)
-
# Checks for libraries.
# Checks for header files.
@@ -112,8 +109,16 @@ AC_MSG_RESULT([$DRI])
save_CFLAGS="$CFLAGS"
CFLAGS="$XORG_CFLAGS"
AC_CHECK_HEADER(xf86Modes.h,[XMODES=yes],[XMODES=no],[#include "xorg-server.h"])
+AC_CHECK_DECL(XSERVER_LIBPCIACCESS,
+ [XSERVER_LIBPCIACCESS=yes],[XSERVER_LIBPCIACCESS=no],
+ [#include "xorg-server.h"])
CFLAGS="$save_CFLAGS"
+if test x$XSERVER_LIBPCIACCESS = xyes; then
+ PKG_CHECK_MODULES([PCIACCESS], [pciaccess >= 0.8.0])
+fi
+
+AM_CONDITIONAL(XSERVER_LIBPCIACCESS, test "x$XSERVER_LIBPCIACCESS" = xyes)
AM_CONDITIONAL(XMODES, test "x$XMODES" = xno)
if test "x$XSERVER_SOURCE" = x; then
diff --git a/src/Makefile.am b/src/Makefile.am
index 50e913e..13cbf91 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -18,7 +18,7 @@
# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-if HAVE_PCIACCESS
+if XSERVER_LIBPCIACCESS
REGDUMPER = reg_dumper
endif
diff --git a/src/bios_reader/Makefile.am b/src/bios_reader/Makefile.am
index 8e03693..a4adecb 100644
--- a/src/bios_reader/Makefile.am
+++ b/src/bios_reader/Makefile.am
@@ -2,7 +2,7 @@ AM_CFLAGS = @WARN_CFLAGS@ @XORG_CFLAGS@
noinst_PROGRAMS = bios_reader $(BIOS_DUMPER)
-if HAVE_PCIACCESS
+if XSERVER_LIBPCIACCESS
BIOS_DUMPER = bios_dumper
bios_dumper_SOURCES = bios_dumper.c
diff-tree 5faf9cc6afe1c30fa88bc6446088a6fa47fc5d0b (from a9e1d42a47cef79d8bbde2afd89d26aed964e344)
Author: Keith Packard <keithp at koto.keithp.com>
Date: Sun Aug 26 09:34:06 2007 -0700
Sort quirk table, add Dell Latitude X1
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index 89fb11e..fb10570 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -54,19 +54,27 @@ static void quirk_mac_mini (I830Ptr pI83
pI830->quirk_flag |= QUIRK_IGNORE_MACMINI_LVDS;
}
+/* keep this list sorted by OEM, then by chip ID */
static i830_quirk i830_quirk_list[] = {
- /* Lenovo T61 has no TV output */
- { PCI_CHIP_I965_GM, 0x17aa, 0x20b5, quirk_ignore_tv },
+ /* Aopen mini pc */
+ { PCI_CHIP_I945_GM, 0xa0a0, SUBSYS_ANY, quirk_ignore_lvds },
+
+ /* Apple Mac mini has no lvds, but macbook pro does */
+ { PCI_CHIP_I945_GM, 0x8086, 0x7270, quirk_mac_mini },
+
+ /* Dell Latitude X1 */
+ { PCI_CHIP_I945_GM, 0x1028, 0x01a3, quirk_ignore_tv },
+
/* Lenovo X60s has no TV output */
{ PCI_CHIP_I945_GM, 0x17aa, 0x201a, quirk_ignore_tv },
- /* Panasonic Toughbook CF-Y4 has no TV output */
- { PCI_CHIP_I915_GM, 0x10f7, 0x8338, quirk_ignore_tv },
+ /* Lenovo T61 has no TV output */
+ { PCI_CHIP_I965_GM, 0x17aa, 0x20b5, quirk_ignore_tv },
/* Lenovo 3000 v200 */
{ PCI_CHIP_I965_GM, 0x17aa, 0x3c18, quirk_ignore_tv },
- /* Aopen mini pc */
- { PCI_CHIP_I945_GM, 0xa0a0, SUBSYS_ANY, quirk_ignore_lvds },
- /* Mac mini has no lvds, but macbook pro does */
- { PCI_CHIP_I945_GM, 0x8086, 0x7270, quirk_mac_mini },
+
+ /* Panasonic Toughbook CF-Y4 has no TV output */
+ { PCI_CHIP_I915_GM, 0x10f7, 0x8338, quirk_ignore_tv },
+
{ 0, 0, 0, NULL },
};
diff-tree a9e1d42a47cef79d8bbde2afd89d26aed964e344 (from ffc2907f7f2eb039004eff0014c5563a01463fb0)
Author: Keith Packard <keithp at koto.keithp.com>
Date: Sat Aug 25 12:54:11 2007 -0700
Lenovo 201a is x60s, not x61s
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index 3176cd4..89fb11e 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -57,8 +57,8 @@ static void quirk_mac_mini (I830Ptr pI83
static i830_quirk i830_quirk_list[] = {
/* Lenovo T61 has no TV output */
{ PCI_CHIP_I965_GM, 0x17aa, 0x20b5, quirk_ignore_tv },
- /* Lenovo X61s has no TV output */
- { PCI_CHIP_I965_GM, 0x17aa, 0x201a, quirk_ignore_tv },
+ /* Lenovo X60s has no TV output */
+ { PCI_CHIP_I945_GM, 0x17aa, 0x201a, quirk_ignore_tv },
/* Panasonic Toughbook CF-Y4 has no TV output */
{ PCI_CHIP_I915_GM, 0x10f7, 0x8338, quirk_ignore_tv },
/* Lenovo 3000 v200 */
diff-tree ffc2907f7f2eb039004eff0014c5563a01463fb0 (from 0c20fbabd18c19b2753cb60280f89e240ce5645f)
Author: Keith Packard <keithp at koto.keithp.com>
Date: Sat Aug 25 12:31:21 2007 -0700
Thinkpad X61s has no TV out
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index b75baef..3176cd4 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -57,6 +57,8 @@ static void quirk_mac_mini (I830Ptr pI83
static i830_quirk i830_quirk_list[] = {
/* Lenovo T61 has no TV output */
{ PCI_CHIP_I965_GM, 0x17aa, 0x20b5, quirk_ignore_tv },
+ /* Lenovo X61s has no TV output */
+ { PCI_CHIP_I965_GM, 0x17aa, 0x201a, quirk_ignore_tv },
/* Panasonic Toughbook CF-Y4 has no TV output */
{ PCI_CHIP_I915_GM, 0x10f7, 0x8338, quirk_ignore_tv },
/* Lenovo 3000 v200 */
diff-tree 0c20fbabd18c19b2753cb60280f89e240ce5645f (from e443f83dd6f110156743c93f7d793cdddb8195a1)
Author: Keith Packard <keithp at koto.keithp.com>
Date: Fri Aug 17 22:21:47 2007 -0700
Make sure XV_PIPE is used whenever possible.
The code was not consistently using XV_PIPE when the desired crtc contained
any portion of the video output.
diff --git a/src/i830_video.c b/src/i830_video.c
index 926e122..2128eb8 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -1712,11 +1712,14 @@ i830_covering_crtc (ScrnInfoPtr pScrn,
i830_crtc_box (crtc, &crtc_box);
i830_box_intersect (&cover_box, &crtc_box, box);
coverage = i830_box_area (&cover_box);
+ if (coverage && crtc == desired)
+ {
+ *crtc_box_ret = crtc_box;
+ return crtc;
+ }
if (coverage > best_coverage)
{
*crtc_box_ret = crtc_box;
- if (crtc == desired)
- return crtc;
best_crtc = crtc;
best_coverage = coverage;
}
diff-tree e443f83dd6f110156743c93f7d793cdddb8195a1 (from bd874b11bbfe582aebd3115771f90807e75afc31)
Author: Eric Anholt <eric at anholt.net>
Date: Fri Aug 17 18:13:49 2007 -0700
Tune acceleration architecture allocator sizes down.
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 99315db..3da489d 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -849,7 +849,6 @@ i830_allocate_framebuffer(ScrnInfoPtr pS
int size;
size = 3 * pitch * pScrn->virtualY;
- size += 1920 * 1088 * 2 * 2;
size = ROUND_TO_PAGE(size);
cacheLines = (size + pitch - 1) / pitch;
@@ -1140,14 +1139,13 @@ i830_allocate_2d_memory(ScrnInfoPtr pScr
if (pI830->useEXA) {
if (pI830->exa_offscreen == NULL) {
/* Default EXA to having 3 screens worth of offscreen memory space
- * (for pixmaps), plus a double-buffered, 1920x1088 video's worth.
+ * (for pixmaps).
*
* XXX: It would be nice to auto-size it larger if the user
* specified a larger size, or to fit along with texture and FB
* memory if a low videoRam is specified.
*/
size = 3 * pitch * pScrn->virtualY;
- size += 1920 * 1088 * 2 * 2;
size = ROUND_TO_PAGE(size);
pI830->exa_offscreen = i830_allocate_memory(pScrn, "exa offscreen",
diff-tree bd874b11bbfe582aebd3115771f90807e75afc31 (from 9ad33dd65a79277ef75a6e95373614852725f5a9)
Author: Eric Anholt <eric at anholt.net>
Date: Fri Aug 17 17:49:21 2007 -0700
Replace AA allocator usage with i830_memory.c for RandR rotation.
This requires EXA 2.2 (server 1.3) for rotated performance with EXA, because
the i830_memory.c allocation may not fall within what EXA considers the
offscreen area, so the PixmapIsOffscreen hook is needed.
diff --git a/src/i830.h b/src/i830.h
index 6888a9b..b0c8f0f 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -234,12 +234,7 @@ typedef struct _I830CrtcPrivateRec {
/* Lookup table values to be set when the CRTC is enabled */
CARD8 lut_r[256], lut_g[256], lut_b[256];
-#ifdef I830_USE_XAA
- FBLinearPtr rotate_mem_xaa;
-#endif
-#ifdef I830_USE_EXA
- ExaOffscreenArea *rotate_mem_exa;
-#endif
+ i830_memory *rotate_mem;
/* Card virtual address of the cursor */
unsigned long cursor_offset;
unsigned long cursor_argb_offset;
@@ -689,14 +684,6 @@ Bool i830_unbind_all_memory(ScrnInfoPtr
Bool I830BindAGPMemory(ScrnInfoPtr pScrn);
Bool I830UnbindAGPMemory(ScrnInfoPtr pScrn);
-#ifdef I830_USE_XAA
-FBLinearPtr
-i830_xf86AllocateOffscreenLinear(ScreenPtr pScreen, int length,
- int granularity,
- MoveLinearCallbackProcPtr moveCB,
- RemoveLinearCallbackProcPtr removeCB,
- pointer privData);
-#endif /* I830_USE_EXA */
/* i830_modes.c */
DisplayModePtr i830_ddc_get_modes(xf86OutputPtr output);
diff --git a/src/i830_display.c b/src/i830_display.c
index a076446..0ab0de7 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -1291,59 +1291,24 @@ static void *
i830_crtc_shadow_allocate (xf86CrtcPtr crtc, int width, int height)
{
ScrnInfoPtr pScrn = crtc->scrn;
- ScreenPtr pScreen = pScrn->pScreen;
I830Ptr pI830 = I830PTR(pScrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
unsigned long rotate_pitch;
- unsigned long rotate_offset;
int align = KB(4), size;
rotate_pitch = pScrn->displayWidth * pI830->cpp;
size = rotate_pitch * height;
-#ifdef I830_USE_EXA
- /* We could get close to what we want here by just creating a pixmap like
- * normal, but we have to lock it down in framebuffer, and there is no
- * setter for offscreen area locking in EXA currently. So, we just
- * allocate offscreen memory and fake up a pixmap header for it.
- */
- if (pI830->useEXA) {
- assert(intel_crtc->rotate_mem_exa == NULL);
-
- intel_crtc->rotate_mem_exa = exaOffscreenAlloc(pScreen, size, align,
- TRUE, NULL, NULL);
- if (intel_crtc->rotate_mem_exa == NULL) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Couldn't allocate shadow memory for rotated CRTC\n");
- return NULL;
- }
- rotate_offset = intel_crtc->rotate_mem_exa->offset;
- }
-#endif /* I830_USE_EXA */
-#ifdef I830_USE_XAA
- if (!pI830->useEXA) {
- /* The XFree86 linear allocator operates in units of screen pixels,
- * sadly.
- */
- size = (size + pI830->cpp - 1) / pI830->cpp;
- align = (align + pI830->cpp - 1) / pI830->cpp;
-
- assert(intel_crtc->rotate_mem_xaa == NULL);
-
- intel_crtc->rotate_mem_xaa =
- i830_xf86AllocateOffscreenLinear(pScreen, size, align,
- NULL, NULL, NULL);
- if (intel_crtc->rotate_mem_xaa == NULL) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Couldn't allocate shadow memory for rotated CRTC\n");
- return NULL;
- }
- rotate_offset = pI830->front_buffer->offset +
- intel_crtc->rotate_mem_xaa->offset * pI830->cpp;
+ assert(intel_crtc->rotate_mem == NULL);
+ intel_crtc->rotate_mem = i830_allocate_memory(pScrn, "rotated crtc",
+ size, align, 0);
+ if (intel_crtc->rotate_mem == NULL) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "Couldn't allocate shadow memory for rotated CRTC\n");
+ return NULL;
}
-#endif /* I830_USE_XAA */
- return pI830->FbBase + rotate_offset;
+ return pI830->FbBase + intel_crtc->rotate_mem->offset;
}
/**
@@ -1380,26 +1345,16 @@ static void
i830_crtc_shadow_destroy(xf86CrtcPtr crtc, PixmapPtr rotate_pixmap, void *data)
{
ScrnInfoPtr pScrn = crtc->scrn;
- I830Ptr pI830 = I830PTR(pScrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
if (rotate_pixmap)
FreeScratchPixmapHeader(rotate_pixmap);
-
- if (data)
- {
-#ifdef I830_USE_EXA
- if (pI830->useEXA && intel_crtc->rotate_mem_exa != NULL) {
- exaOffscreenFree(pScrn->pScreen, intel_crtc->rotate_mem_exa);
- intel_crtc->rotate_mem_exa = NULL;
- }
-#endif /* I830_USE_EXA */
-#ifdef I830_USE_XAA
- if (!pI830->useEXA) {
- xf86FreeOffscreenLinear(intel_crtc->rotate_mem_xaa);
- intel_crtc->rotate_mem_xaa = NULL;
- }
-#endif /* I830_USE_XAA */
+
+ if (data) {
+ /* Be sure to sync acceleration before the memory gets unbound. */
+ I830Sync(pScrn);
+ i830_free_memory(pScrn, intel_crtc->rotate_mem);
+ intel_crtc->rotate_mem = NULL;
}
}
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 81e8118..ab42fd9 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -1562,7 +1562,11 @@ I830PreInit(ScrnInfoPtr pScrn, int flags
memset(&req, 0, sizeof(req));
req.majorversion = 2;
+#if EXA_VERSION_MINOR >= 2
+ req.minorversion = 2;
+#else
req.minorversion = 1;
+#endif
if (!LoadSubModule(pScrn->module, "exa", NULL, NULL, NULL, &req,
&errmaj, &errmin)) {
LoaderErrorMsg(NULL, "exa", errmaj, errmin);
diff --git a/src/i830_exa.c b/src/i830_exa.c
index fdf94d7..fa50da0 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -124,6 +124,22 @@ i830_pixmap_tiled(PixmapPtr pPixmap)
return FALSE;
}
+Bool
+i830_exa_pixmap_is_offscreen(PixmapPtr pPixmap)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pPixmap->drawable.pScreen->myNum];
+ I830Ptr pI830 = I830PTR(pScrn);
+
+ if ((void *)pPixmap->devPrivate.ptr >= (void *)pI830->FbBase &&
+ (void *)pPixmap->devPrivate.ptr <
+ (void *)(pI830->FbBase + pI830->FbMapSize))
+ {
+ return TRUE;
+ } else {
+ return FALSE;
+ }
+}
+
/**
* I830EXASync - wait for a command to finish
* @pScreen: current screen
@@ -456,7 +472,17 @@ I830EXAInit(ScreenPtr pScreen)
pI830->bufferOffset = 0;
pI830->EXADriverPtr->exa_major = 2;
+ /* If compiled against EXA 2.2, require 2.2 so we can use the
+ * PixmapIsOffscreen hook.
+ */
+#if EXA_VERSION_MINOR >= 2
+ pI830->EXADriverPtr->exa_minor = 2;
+#else
pI830->EXADriverPtr->exa_minor = 1;
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+ "EXA compatibility mode. Output rotation rendering "
+ "performance may suffer\n");
+#endif
pI830->EXADriverPtr->memoryBase = pI830->FbBase;
pI830->EXADriverPtr->offScreenBase = pI830->exa_offscreen->offset;
pI830->EXADriverPtr->memorySize = pI830->exa_offscreen->offset +
@@ -552,6 +578,9 @@ I830EXAInit(ScreenPtr pScreen)
pI830->EXADriverPtr->Composite = i965_composite;
pI830->EXADriverPtr->DoneComposite = i830_done_composite;
}
+#if EXA_VERSION_MINOR >= 2
+ pI830->EXADriverPtr->PixmapIsOffscreen = i830_exa_pixmap_is_offscreen;
+#endif
/* UploadToScreen/DownloadFromScreen */
if (0)
diff --git a/src/i830_memory.c b/src/i830_memory.c
index d6fa852..99315db 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -1684,41 +1684,3 @@ I830CheckAvailableMemory(ScrnInfoPtr pSc
return maxPages * 4;
}
-
-#ifdef I830_USE_XAA
-/**
- * Allocates memory from the XF86 linear allocator, but also purges
- * memory if possible to cause the allocation to succeed.
- */
-FBLinearPtr
-i830_xf86AllocateOffscreenLinear(ScreenPtr pScreen, int length,
- int granularity,
- MoveLinearCallbackProcPtr moveCB,
- RemoveLinearCallbackProcPtr removeCB,
- pointer privData)
-{
- FBLinearPtr linear;
- int max_size;
-
- linear = xf86AllocateOffscreenLinear(pScreen, length, granularity, moveCB,
- removeCB, privData);
- if (linear != NULL)
- return linear;
-
- /* The above allocation didn't succeed, so purge unlocked stuff and try
- * again.
- */
- xf86QueryLargestOffscreenLinear(pScreen, &max_size, granularity,
- PRIORITY_EXTREME);
-
- if (max_size < length)
- return NULL;
-
- xf86PurgeUnlockedOffscreenAreas(pScreen);
-
- linear = xf86AllocateOffscreenLinear(pScreen, length, granularity, moveCB,
- removeCB, privData);
-
- return linear;
-}
-#endif
diff-tree 9ad33dd65a79277ef75a6e95373614852725f5a9 (from 3655a1ecb62f6c387a16fa87cf6f00bf7835dce4)
Author: Eric Anholt <eric at anholt.net>
Date: Fri Aug 17 16:46:48 2007 -0700
Use i830_memory.c instead of the AA's allocator for XV buffers.
This should fix issues with XV being allocated into XAA's tiled pixmap
cache and resulting bad rendering. Its also brings us closer to being able
to shrink the size of the pixmap cache on XAA, which is of limited utility.
diff --git a/src/i830.h b/src/i830.h
index 1cfcb9a..6888a9b 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -641,6 +641,14 @@ extern void I830SubsequentSolidFillRect(
Bool i830_allocator_init(ScrnInfoPtr pScrn, unsigned long offset,
unsigned long size);
+i830_memory * i830_allocate_memory(ScrnInfoPtr pScrn, const char *name,
+ unsigned long size, unsigned long alignment,
+ int flags);
+i830_memory *i830_allocate_memory_tiled(ScrnInfoPtr pScrn, const char *name,
+ unsigned long size,
+ unsigned long pitch,
+ unsigned long alignment, int flags,
+ enum tile_format tile_format);
void i830_describe_allocations(ScrnInfoPtr pScrn, int verbosity,
const char *prefix);
void i830_reset_allocations(ScrnInfoPtr pScrn);
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 15d3a48..d6fa852 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -515,7 +515,7 @@ i830_allocate_agp_memory(ScrnInfoPtr pSc
* The memory will be bound automatically when the driver is in control of the
* VT.
*/
-static i830_memory *
+i830_memory *
i830_allocate_memory(ScrnInfoPtr pScrn, const char *name,
unsigned long size, unsigned long alignment, int flags)
{
@@ -544,7 +544,7 @@ i830_allocate_memory(ScrnInfoPtr pScrn,
* some search across all allocation options to fix this, probably, but that
* would be another rewrite.
*/
-static i830_memory *
+i830_memory *
i830_allocate_memory_tiled(ScrnInfoPtr pScrn, const char *name,
unsigned long size, unsigned long pitch,
unsigned long alignment, int flags,
diff --git a/src/i830_video.c b/src/i830_video.c
index b4f9e74..926e122 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -107,9 +107,6 @@ static int I830QueryImageAttributesTextu
static void I830BlockHandler(int, pointer, pointer, pointer);
-static void
-I830FreeMemory(ScrnInfoPtr pScrn, struct linear_alloc *linear);
-
#define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE)
static Atom xvBrightness, xvContrast, xvSaturation, xvColorKey, xvPipe, xvDoubleBuffer;
@@ -841,7 +838,7 @@ I830SetupImageVideoOverlay(ScreenPtr pSc
pPriv->saturation = 128;
pPriv->current_crtc = NULL;
pPriv->desired_crtc = NULL;
- memset(&pPriv->linear, 0, sizeof(pPriv->linear));
+ pPriv->buf = NULL;
pPriv->currentBuf = 0;
pPriv->gamma5 = 0xc0c0c0;
pPriv->gamma4 = 0x808080;
@@ -955,7 +952,7 @@ I830SetupImageVideoTextured(ScreenPtr pS
pPriv->textured = TRUE;
pPriv->videoStatus = 0;
- memset(&pPriv->linear, 0, sizeof(pPriv->linear));
+ pPriv->buf = NULL;
pPriv->currentBuf = 0;
pPriv->doubleBuffer = 0;
@@ -1015,7 +1012,10 @@ I830StopVideo(ScrnInfoPtr pScrn, pointer
if (pI830->entityPrivate)
pI830->entityPrivate->XvInUse = -1;
}
- I830FreeMemory(pScrn, &pPriv->linear);
+ /* Sync before freeing the buffer, because the pages will be unbound.
+ */
+ I830Sync(pScrn);
+ i830_free_memory(pScrn, pPriv->buf);
pPriv->videoStatus = 0;
} else {
if (pPriv->videoStatus & CLIENT_VIDEO_ON) {
@@ -2075,112 +2075,6 @@ i830_display_video(ScrnInfoPtr pScrn, xf
i830_overlay_continue (pScrn, scaleChanged);
}
-#ifdef I830_USE_EXA
-static void
-I830VideoSave(ScreenPtr pScreen, ExaOffscreenArea *area)
-{
- struct linear_alloc *linear = area->privData;
-
- linear->exa = NULL;
- linear->offset = 0;
-}
-#endif /* I830_USE_EXA */
-
-/**
- * Allocates linear memory using the XFree86 (XAA) or EXA allocator.
- *
- * \param pPriv adaptor the memory is being allocated for.
- * \param size size of the allocation, in bytes.
- * \param alignment offset alignment of the allocation, in bytes.
- *
- * \return byte offset of the allocated memory from the start of framebuffer.
- */
-static void
-I830AllocateMemory(ScrnInfoPtr pScrn, struct linear_alloc *linear, int size,
- int align)
-{
- ScreenPtr pScreen = pScrn->pScreen;
- I830Ptr pI830 = I830PTR(pScrn);
-
-#ifdef I830_USE_EXA
- if (pI830->useEXA) {
- if (linear->exa != NULL) {
- if (linear->exa->size >= size)
- return;
-
- exaOffscreenFree(pScreen, linear->exa);
- linear->offset = 0;
- }
-
- linear->exa = exaOffscreenAlloc(pScreen, size, align, TRUE,
- I830VideoSave, linear);
- if (linear->exa == NULL)
- return;
- linear->offset = linear->exa->offset;
- }
-#endif /* I830_USE_EXA */
-#ifdef I830_USE_XAA
- if (!pI830->useEXA) {
- /* Converts an offset from XAA's linear allocator to an offset from the
- * start of fb.
- */
-#define XAA_OFFSET_TO_OFFSET(x) \
- (pI830->front_buffer->offset + (x * pI830->cpp))
-
- /* The XFree86 linear allocator operates in units of screen pixels,
- * sadly.
- */
- size = (size + pI830->cpp - 1) / pI830->cpp;
- align = (align + pI830->cpp - 1) / pI830->cpp;
-
- if (linear->xaa != NULL) {
- if (linear->xaa->size >= size) {
- linear->offset = XAA_OFFSET_TO_OFFSET(linear->xaa->offset);
- return;
- }
-
- if (xf86ResizeOffscreenLinear(linear->xaa, size)) {
- linear->offset = XAA_OFFSET_TO_OFFSET(linear->xaa->offset);
- return;
- }
-
- xf86FreeOffscreenLinear(linear->xaa);
- }
-
- linear->xaa = i830_xf86AllocateOffscreenLinear(pScreen, size, align,
- NULL, NULL, NULL);
- if (linear->xaa == NULL)
- return;
-
- linear->offset = XAA_OFFSET_TO_OFFSET(linear->xaa->offset);
- }
-#endif /* I830_USE_XAA */
-}
-
-static void
-I830FreeMemory(ScrnInfoPtr pScrn, struct linear_alloc *linear)
-{
- I830Ptr pI830 = I830PTR(pScrn);
-
-#ifdef I830_USE_EXA
- if (pI830->useEXA) {
- if (linear->exa != NULL) {
- exaOffscreenFree(pScrn->pScreen, linear->exa);
- linear->exa = NULL;
- }
- }
-#endif /* I830_USE_EXA */
-#ifdef I830_USE_XAA
- if (!pI830->useEXA) {
- if (linear->xaa != NULL) {
- xf86FreeOffscreenLinear(linear->xaa);
- linear->xaa = NULL;
- }
- }
-#endif /* I830_USE_XAA */
- linear->offset = 0;
-}
-
static Bool
i830_clip_video_helper (ScrnInfoPtr pScrn,
xf86CrtcPtr *crtc_ret,
@@ -2293,7 +2187,7 @@ I830PutImage(ScrnInfoPtr pScrn,
int top, left, npixels, nlines, size;
BoxRec dstBox;
int pitchAlignMask;
- int extraLinear;
+ int alloc_size, extraLinear;
xf86CrtcPtr crtc;
if (pPriv->textured)
@@ -2410,19 +2304,38 @@ I830PutImage(ScrnInfoPtr pScrn,
else
extraLinear = 0;
- /* size is multiplied by 2 because we have two buffers that are flipping */
- I830AllocateMemory(pScrn, &pPriv->linear,
- extraLinear + (pPriv->doubleBuffer ? size * 2 : size),
- 16);
+ alloc_size = size;
+ if (pPriv->doubleBuffer)
+ alloc_size *= 2;
+ alloc_size += extraLinear;
+
+ if (pPriv->buf) {
+ /* Wait for any previous acceleration to the buffer to have completed.
+ * When we start using BOs for rendering, we won't have to worry
+ * because mapping or freeing will take care of it automatically.
+ */
+ I830Sync(pScrn);
+ }
+
+ /* Free the current buffer if we're going to have to reallocate */
+ if (pPriv->buf && pPriv->buf->size < alloc_size) {
+ i830_free_memory(pScrn, pPriv->buf);
+ pPriv->buf = NULL;
+ }
- if (pPriv->linear.offset == 0)
+ if (pPriv->buf == NULL) {
+ pPriv->buf = i830_allocate_memory(pScrn, "xv buffer", alloc_size, 16,
+ 0);
+ }
+
+ if (pPriv->buf == NULL)
return BadAlloc;
- pPriv->extra_offset = pPriv->linear.offset +
+ pPriv->extra_offset = pPriv->buf->offset +
(pPriv->doubleBuffer ? size * 2 : size);
/* fixup pointers */
- pPriv->YBuf0offset = pPriv->linear.offset;
+ pPriv->YBuf0offset = pPriv->buf->offset;
if (pI830->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
pPriv->UBuf0offset = pPriv->YBuf0offset + (dstPitch * 2 * width);
pPriv->VBuf0offset = pPriv->UBuf0offset + (dstPitch * width / 2);
@@ -2654,7 +2567,11 @@ I830BlockHandler(int i,
}
} else { /* FREE_TIMER */
if (pPriv->freeTime < now) {
- I830FreeMemory(pScrn, &pPriv->linear);
+ /* Sync before freeing the buffer, because the pages will be
+ * unbound.
+ */
+ I830Sync(pScrn);
+ i830_free_memory(pScrn, pPriv->buf);
pPriv->videoStatus = 0;
}
}
@@ -2666,7 +2583,7 @@ I830BlockHandler(int i,
***************************************************************************/
typedef struct {
- struct linear_alloc linear;
+ i830_memory *buf;
Bool isOn;
} OffscreenPrivRec, *OffscreenPrivPtr;
@@ -2711,8 +2628,8 @@ I830AllocateSurface(ScrnInfoPtr pScrn,
fbpitch = pI830->cpp * pScrn->displayWidth;
size = pitch * h;
- I830AllocateMemory(pScrn, &pPriv->linear, size, 16);
- if (pPriv->linear.offset == 0) {
+ pPriv->buf = i830_allocate_memory(pScrn, "xv surface buffer", size, 16, 0);
+ if (pPriv->buf == NULL) {
xfree(surface->pitches);
xfree(surface->offsets);
xfree(pPriv);
@@ -2727,7 +2644,7 @@ I830AllocateSurface(ScrnInfoPtr pScrn,
surface->pScrn = pScrn;
surface->id = id;
surface->pitches[0] = pitch;
- surface->offsets[0] = pPriv->linear.offset;
+ surface->offsets[0] = pPriv->buf->offset;
surface->devPrivate.ptr = (pointer) pPriv;
memset(pI830->FbBase + surface->offsets[0], 0, size);
@@ -2760,10 +2677,13 @@ I830StopSurface(XF86SurfacePtr surface)
static int
I830FreeSurface(XF86SurfacePtr surface)
{
+ ScrnInfoPtr pScrn = surface->pScrn;
OffscreenPrivPtr pPriv = (OffscreenPrivPtr) surface->devPrivate.ptr;
I830StopSurface(surface);
- I830FreeMemory(surface->pScrn, &pPriv->linear);
+ /* Sync before freeing the buffer, because the pages will be unbound. */
+ I830Sync(pScrn);
+ i830_free_memory(surface->pScrn, pPriv->buf);
xfree(surface->pitches);
xfree(surface->offsets);
xfree(surface->devPrivate.ptr);
diff --git a/src/i830_video.h b/src/i830_video.h
index 7e2d149..23954e1 100644
--- a/src/i830_video.h
+++ b/src/i830_video.h
@@ -27,18 +27,6 @@ THE USE OR OTHER DEALINGS IN THE SOFTWAR
#include "xf86.h"
#include "xf86_OSproc.h"
-/* Ugly mess to support the old XF86 allocator or EXA using the same code.
- */
-struct linear_alloc {
-#ifdef I830_USE_XAA
- FBLinearPtr xaa;
-#endif
-#ifdef I830_USE_EXA
- ExaOffscreenArea *exa;
-#endif
- unsigned int offset;
-};
-
typedef struct {
CARD32 YBuf0offset;
CARD32 UBuf0offset;
@@ -70,7 +58,7 @@ typedef struct {
CARD32 videoStatus;
Time offTime;
Time freeTime;
- struct linear_alloc linear;
+ i830_memory *buf; /** YUV data buffer */
unsigned int extra_offset;
Bool overlayOK;
diff-tree 3655a1ecb62f6c387a16fa87cf6f00bf7835dce4 (from parents)
Merge: e5c336eaa32be8f9379a2c1dd51006b85bc8b270 2231cdcd8f1ee81b3e59cc5e3a325c22ee0f40e4
Author: Jesse Barnes <jbarnes at nietzche.virtuousgeek.org>
Date: Thu Aug 16 12:04:20 2007 -0700
Merge branch 'master' of ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel
diff-tree e5c336eaa32be8f9379a2c1dd51006b85bc8b270 (from 5126a71f82767b9e23cd590453718f3364789740)
Author: Jesse Barnes <jbarnes at nietzche.virtuousgeek.org>
Date: Thu Aug 16 12:04:02 2007 -0700
Disambiguate plane and pipe mapping, use plane A on pipe B on pre-965 LVDS
Add a new 'plane' field to the intel_crtc private structure for tracking
planes separate from pipes. This allows pre-965 chips to use plane A
on pipe B, enabling framebuffer compression for builtin LVDS displays.
diff --git a/src/i830.h b/src/i830.h
index ca48b52..1cfcb9a 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -225,6 +225,7 @@ extern const char *i830_output_type_name
typedef struct _I830CrtcPrivateRec {
int pipe;
+ int plane;
Bool enabled;
diff --git a/src/i830_display.c b/src/i830_display.c
index 706b9ba..a076446 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -372,10 +372,11 @@ i830PipeSetBase(xf86CrtcPtr crtc, int x,
I830Ptr pI830 = I830PTR(pScrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
int pipe = intel_crtc->pipe;
+ int plane = intel_crtc->plane;
unsigned long Start, Offset;
- int dspbase = (pipe == 0 ? DSPABASE : DSPBBASE);
- int dspsurf = (pipe == 0 ? DSPASURF : DSPBSURF);
- int dsptileoff = (pipe == 0 ? DSPATILEOFF : DSPBTILEOFF);
+ int dspbase = (plane == 0 ? DSPABASE : DSPBBASE);
+ int dspsurf = (plane == 0 ? DSPASURF : DSPBSURF);
+ int dsptileoff = (plane == 0 ? DSPATILEOFF : DSPBTILEOFF);
Offset = ((y * pScrn->displayWidth + x) * pI830->cpp);
if (pI830->front_buffer == NULL) {
@@ -523,8 +524,7 @@ i830_use_fb_compression(xf86CrtcPtr crtc
ScrnInfoPtr pScrn = crtc->scrn;
I830Ptr pI830 = I830PTR(pScrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
- int pipe = intel_crtc->pipe;
- int plane = (pipe == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB);
+ int plane = (intel_crtc->plane == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB);
if (!pI830->fb_compression)
return FALSE;
@@ -569,17 +569,15 @@ i830_enable_fb_compression(xf86CrtcPtr c
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
uint32_t fbc_ctl = 0;
unsigned long compressed_stride;
- int pipe = intel_crtc->pipe;
- /* FIXME: plane & pipe might not always be equal */
- int plane = (pipe == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB);
+ int plane = (intel_crtc->plane == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB);
unsigned long uncompressed_stride = pScrn->displayWidth * pI830->cpp;
unsigned long interval = 1000;
if (INREG(FBC_CONTROL) & FBC_CTL_EN) {
- char cur_pipe = (INREG(FBC_CONTROL2) & 1) ? 'b' : 'a';
+ char cur_plane = (INREG(FBC_CONTROL2) & 1) ? 'b' : 'a';
xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "fbc already enabled on "
- "pipe %c, not enabling on pipe %c\n", cur_pipe, pipe ? 'b' :
- 'a');
+ "plane %c, not enabling on plane %c\n", cur_plane,
+ plane ? 'b' : 'a');
return;
}
@@ -615,7 +613,7 @@ i830_enable_fb_compression(xf86CrtcPtr c
fbc_ctl |= FBC_CTL_UNCOMPRESSIBLE;
OUTREG(FBC_CONTROL, fbc_ctl);
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "fbc enabled on plane %c\n", pipe ?
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "fbc enabled on plane %c\n", plane ?
'b' : 'a');
}
@@ -625,7 +623,7 @@ i830_disable_fb_compression(xf86CrtcPtr
ScrnInfoPtr pScrn = crtc->scrn;
I830Ptr pI830 = I830PTR(pScrn);
uint32_t fbc_ctl;
- char pipe = (INREG(FBC_CONTROL2) & 1) ? 'b' : 'a';
+ char plane = (INREG(FBC_CONTROL2) & 1) ? 'b' : 'a';
/* Disable compression */
fbc_ctl = INREG(FBC_CONTROL);
@@ -635,7 +633,7 @@ i830_disable_fb_compression(xf86CrtcPtr
/* Wait for compressing bit to clear */
while (INREG(FBC_STATUS) & FBC_STAT_COMPRESSING)
; /* nothing */
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "fbc disabled on pipe %c\n", pipe);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "fbc disabled on pipe %c\n", plane);
}
/**
@@ -651,10 +649,11 @@ i830_crtc_dpms(xf86CrtcPtr crtc, int mod
I830Ptr pI830 = I830PTR(pScrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
int pipe = intel_crtc->pipe;
+ int plane = intel_crtc->plane;
int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
- int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR;
- int dspbase_reg = (pipe == 0) ? DSPABASE : DSPBBASE;
int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF;
+ int dspcntr_reg = (plane == 0) ? DSPACNTR : DSPBCNTR;
+ int dspbase_reg = (plane == 0) ? DSPABASE : DSPBBASE;
CARD32 temp;
/* XXX: When our outputs are all unaware of DPMS modes other than off and
@@ -951,10 +950,10 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, Dis
I830Ptr pI830 = I830PTR(pScrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
int pipe = intel_crtc->pipe;
+ int plane = intel_crtc->plane;
int fp_reg = (pipe == 0) ? FPA0 : FPB0;
int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
- int dpll_md_reg = (intel_crtc->pipe == 0) ? DPLL_A_MD : DPLL_B_MD;
- int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR;
+ int dpll_md_reg = (pipe == 0) ? DPLL_A_MD : DPLL_B_MD;
int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF;
int htot_reg = (pipe == 0) ? HTOTAL_A : HTOTAL_B;
int hblank_reg = (pipe == 0) ? HBLANK_A : HBLANK_B;
@@ -962,10 +961,11 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, Dis
int vtot_reg = (pipe == 0) ? VTOTAL_A : VTOTAL_B;
int vblank_reg = (pipe == 0) ? VBLANK_A : VBLANK_B;
int vsync_reg = (pipe == 0) ? VSYNC_A : VSYNC_B;
- int dspsize_reg = (pipe == 0) ? DSPASIZE : DSPBSIZE;
- int dspstride_reg = (pipe == 0) ? DSPASTRIDE : DSPBSTRIDE;
- int dsppos_reg = (pipe == 0) ? DSPAPOS : DSPBPOS;
int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC;
+ int dspcntr_reg = (plane == 0) ? DSPACNTR : DSPBCNTR;
+ int dspstride_reg = (plane == 0) ? DSPASTRIDE : DSPBSTRIDE;
+ int dsppos_reg = (plane == 0) ? DSPAPOS : DSPBPOS;
+ int dspsize_reg = (plane == 0) ? DSPASIZE : DSPBSIZE;
int i;
int refclk;
intel_clock_t clock;
@@ -1415,8 +1415,11 @@ i830DescribeOutputConfiguration(ScrnInfo
for (i = 0; i < xf86_config->num_crtc; i++) {
xf86CrtcPtr crtc = xf86_config->crtc[i];
- CARD32 dspcntr = INREG(DSPACNTR + (DSPBCNTR - DSPACNTR) * i);
- CARD32 pipeconf = INREG(PIPEACONF + (PIPEBCONF - PIPEACONF) * i);
+ I830CrtcPrivatePtr intel_crtc = crtc ? crtc->driver_private : NULL;
+ CARD32 dspcntr = intel_crtc->plane == 0 ? INREG(DSPACNTR) :
+ INREG(DSPBCNTR);
+ CARD32 pipeconf = i == 0 ? INREG(PIPEACONF) :
+ INREG(PIPEBCONF);
Bool hw_plane_enable = (dspcntr & DISPLAY_PLANE_ENABLE) != 0;
Bool hw_pipe_enable = (pipeconf & PIPEACONF_ENABLE) != 0;
@@ -1425,8 +1428,8 @@ i830DescribeOutputConfiguration(ScrnInfo
'A' + i, crtc->enabled ? "on" : "off");
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
" Display plane %c is now %s and connected to pipe %c.\n",
- 'A' + i,
- crtc->enabled ? "enabled" : "disabled",
+ 'A' + intel_crtc->plane,
+ hw_plane_enable ? "enabled" : "disabled",
dspcntr & DISPPLANE_SEL_PIPE_MASK ? 'B' : 'A');
if (hw_pipe_enable != crtc->enabled) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
@@ -1730,6 +1733,7 @@ i830_crtc_init(ScrnInfoPtr pScrn, int pi
intel_crtc = xnfcalloc (sizeof (I830CrtcPrivateRec), 1);
intel_crtc->pipe = pipe;
intel_crtc->dpms_mode = DPMSModeOff;
+ intel_crtc->plane = pipe;
/* Initialize the LUTs for when we turn on the CRTC. */
for (i = 0; i < 256; i++) {
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 712b2dd..81e8118 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -742,7 +742,8 @@ I830SetupOutputs(ScrnInfoPtr pScrn)
{
xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (pScrn);
I830Ptr pI830 = I830PTR(pScrn);
- int o;
+ int o, c;
+ Bool lvds_detected = FALSE;
/* everyone has at least a single analog output */
i830_crt_init(pScrn);
@@ -765,7 +766,9 @@ I830SetupOutputs(ScrnInfoPtr pScrn)
xf86OutputPtr output = config->output[o];
I830OutputPrivatePtr intel_output = output->driver_private;
int crtc_mask;
- int c;
+
+ if (intel_output->type == I830_OUTPUT_LVDS)
+ lvds_detected = TRUE;
crtc_mask = 0;
for (c = 0; c < config->num_crtc; c++)
@@ -779,6 +782,24 @@ I830SetupOutputs(ScrnInfoPtr pScrn)
output->possible_crtcs = crtc_mask;
output->possible_clones = i830_output_clones (pScrn, intel_output->clone_mask);
}
+
+ /*
+ * If an LVDS display is present, swap the plane/pipe mappings so we can
+ * use FBC on the builtin display.
+ * Note: 965+ chips can compress either plane, so we leave the mapping
+ * alone in that case.
+ */
+ if (lvds_detected && !IS_I965GM(pI830)) {
+ for (c = 0; c < config->num_crtc; c++) {
+ xf86CrtcPtr crtc = config->crtc[c];
+ I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
+
+ if (intel_crtc->pipe == 0)
+ intel_crtc->plane = 1;
+ else if (intel_crtc->pipe == 1)
+ intel_crtc->plane = 0;
+ }
+ }
}
/**
diff --git a/src/i830_tv.c b/src/i830_tv.c
index e3aeaf9..a77bf98 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -878,11 +878,11 @@ i830_tv_restore(xf86OutputPtr output)
OUTREG(TV_CLR_LEVEL, dev_priv->save_TV_CLR_LEVEL);
{
- int pipeconf_reg = (intel_crtc->pipe == 0)?PIPEACONF:PIPEBCONF;
- int dspcntr_reg = (intel_crtc->pipe == 0)?DSPACNTR : DSPBCNTR;
+ int pipeconf_reg = (intel_crtc->pipe == 0) ? PIPEACONF : PIPEBCONF;
+ int dspcntr_reg = (intel_crtc->plane == 0) ? DSPACNTR : DSPBCNTR;
int pipeconf = INREG(pipeconf_reg);
int dspcntr = INREG(dspcntr_reg);
- int dspbase_reg = (intel_crtc->pipe == 0) ? DSPABASE : DSPBBASE;
+ int dspbase_reg = (intel_crtc->plane == 0) ? DSPABASE : DSPBBASE;
/* Pipe must be off here */
OUTREG(dspcntr_reg, dspcntr & ~DISPLAY_PLANE_ENABLE);
/* Flush the plane changes */
@@ -1182,11 +1182,11 @@ i830_tv_mode_set(xf86OutputPtr output, D
OUTREG(TV_CLR_LEVEL, ((video_levels->black << TV_BLACK_LEVEL_SHIFT) |
(video_levels->blank << TV_BLANK_LEVEL_SHIFT)));
{
- int pipeconf_reg = (intel_crtc->pipe == 0)?PIPEACONF:PIPEBCONF;
- int dspcntr_reg = (intel_crtc->pipe == 0)?DSPACNTR : DSPBCNTR;
+ int pipeconf_reg = (intel_crtc->pipe == 0) ? PIPEACONF : PIPEBCONF;
+ int dspcntr_reg = (intel_crtc->plane == 0) ? DSPACNTR : DSPBCNTR;
int pipeconf = INREG(pipeconf_reg);
int dspcntr = INREG(dspcntr_reg);
- int dspbase_reg = (intel_crtc->pipe == 0) ? DSPABASE : DSPBBASE;
+ int dspbase_reg = (intel_crtc->plane == 0) ? DSPABASE : DSPBBASE;
int xpos = 0x0, ypos = 0x0;
unsigned int xsize, ysize;
/* Pipe must be off here */
diff-tree 2231cdcd8f1ee81b3e59cc5e3a325c22ee0f40e4 (from a69db6f7fe1703b473e5c1d1e0088ccc203f4d5a)
Author: Dave Airlie <airlied at redhat.com>
Date: Thu Aug 16 17:15:54 2007 +1000
i915: add support for render to a8
diff --git a/src/i915_render.c b/src/i915_render.c
index 7f25d90..7546dfd 100644
--- a/src/i915_render.c
+++ b/src/i915_render.c
@@ -155,16 +155,9 @@ static Bool i915_get_dest_format(Picture
case PICT_x1r5g5b5:
*dst_format = COLR_BUF_ARGB1555;
break;
- /* COLR_BUF_8BIT is special for YUV surfaces. While we may end up being
- * able to use it depending on how the hardware implements it, disable it
- * for now while we don't know what exactly it does (what channel does it
- * read from?
- */
- /*
case PICT_a8:
*dst_format = COLR_BUF_8BIT;
break;
- */
case PICT_a4r4g4b4:
case PICT_x4r4g4b4:
*dst_format = COLR_BUF_ARGB4444;
@@ -313,6 +306,7 @@ i915_prepare_composite(int op, PicturePt
I830Ptr pI830 = I830PTR(pScrn);
CARD32 dst_format, dst_offset, dst_pitch;
CARD32 blendctl;
+ int out_reg = FS_OC;
IntelEmitInvarientState(pScrn);
*pI830->last_3d = LAST_3D_RENDER;
@@ -412,6 +406,9 @@ i915_prepare_composite(int op, PicturePt
ADVANCE_LP_RING();
}
+ if (dst_format == COLR_BUF_8BIT)
+ out_reg = FS_U0;
+
FS_BEGIN();
/* Declare the registers necessary for our program. I don't think the
@@ -432,7 +429,7 @@ i915_prepare_composite(int op, PicturePt
if (!pMask) {
/* No mask, so move to output color */
- i915_fs_mov(FS_OC, i915_fs_operand_reg(FS_R0));
+ i915_fs_mov(out_reg, i915_fs_operand_reg(FS_R0));
} else {
/* Load the pMaskPicture texel */
i915_fs_texld(FS_R1, FS_S1, FS_T1);
@@ -453,17 +450,20 @@ i915_prepare_composite(int op, PicturePt
PICT_FORMAT_RGB(pMaskPicture->format))
{
if (i915_blend_op[op].src_alpha) {
- i915_fs_mul(FS_OC, i915_fs_operand(FS_R0, W, W, W, W),
+ i915_fs_mul(out_reg, i915_fs_operand(FS_R0, W, W, W, W),
i915_fs_operand_reg(FS_R1));
} else {
- i915_fs_mul(FS_OC, i915_fs_operand_reg(FS_R0),
+ i915_fs_mul(out_reg, i915_fs_operand_reg(FS_R0),
i915_fs_operand_reg(FS_R1));
}
} else {
- i915_fs_mul(FS_OC, i915_fs_operand_reg(FS_R0),
+ i915_fs_mul(out_reg, i915_fs_operand_reg(FS_R0),
i915_fs_operand(FS_R1, W, W, W, W));
}
}
+ if (dst_format == COLR_BUF_8BIT)
+ i915_fs_mov(FS_OC, i915_fs_operand(out_reg, W, W, W, W));
+
FS_END();
return TRUE;
diff-tree a69db6f7fe1703b473e5c1d1e0088ccc203f4d5a (from 5126a71f82767b9e23cd590453718f3364789740)
Author: Dave Airlie <airlied at redhat.com>
Date: Wed Aug 15 18:28:50 2007 +1000
intel: don't setup texOffsetStart unless using EXA
diff --git a/src/i830_dri.c b/src/i830_dri.c
index a4fc97c..e2b42b4 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -602,6 +602,7 @@ I830DRIScreenInit(ScreenPtr pScreen)
#endif
#if DRIINFO_MAJOR_VERSION > 5 || \
(DRIINFO_MAJOR_VERSION == 5 && DRIINFO_MINOR_VERSION >= 3)
+ if (pI830->useEXA)
pDRIInfo->texOffsetStart = I830TexOffsetStart;
#endif
diff-tree 5126a71f82767b9e23cd590453718f3364789740 (from d9f89a1af7e7ff4056727060cdf2e35c15a4dcdd)
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Tue Aug 14 13:54:55 2007 +0800
Fix seg fault introduced in tiling patch when TV detect
When TV does load detect, fb hasn't been setup, so we should check
that in i830_display_tiled(). Caught by Nanhai.
diff --git a/src/i830_display.c b/src/i830_display.c
index 7a229b2..706b9ba 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -511,7 +511,7 @@ i830_display_tiled(xf86CrtcPtr crtc)
if (crtc->rotatedData)
return FALSE;
- if (pI830->front_buffer->tiling != TILE_NONE)
+ if (pI830->front_buffer && pI830->front_buffer->tiling != TILE_NONE)
return TRUE;
return FALSE;
diff-tree d9f89a1af7e7ff4056727060cdf2e35c15a4dcdd (from 5bc194d3d3c87bb0128d9ac10f090f031345eb37)
Author: Keith Packard <keithp at koto.keithp.com>
Date: Fri Aug 10 17:59:33 2007 -0700
Save/restore tile-mode offset registers DSPATILEOFF and DSPBTILEOFF
Now that the driver sets these registers, they must be saved and restored.
diff --git a/src/i830.h b/src/i830.h
index 7ae17b4..ca48b52 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -499,6 +499,7 @@ typedef struct _I830Rec {
CARD32 saveDSPAPOS;
CARD32 saveDSPABASE;
CARD32 saveDSPASURF;
+ CARD32 saveDSPATILEOFF;
CARD32 saveFPB0;
CARD32 saveFPB1;
CARD32 saveDPLL_B;
@@ -515,6 +516,7 @@ typedef struct _I830Rec {
CARD32 saveDSPBPOS;
CARD32 saveDSPBBASE;
CARD32 saveDSPBSURF;
+ CARD32 saveDSPBTILEOFF;
CARD32 saveVCLK_DIVISOR_VGA0;
CARD32 saveVCLK_DIVISOR_VGA1;
CARD32 saveVCLK_POST_DIV;
diff --git a/src/i830_driver.c b/src/i830_driver.c
index acb8354..712b2dd 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -1816,6 +1816,8 @@ SaveHWState(ScrnInfoPtr pScrn)
if (IS_I965G(pI830)) {
pI830->saveDSPASURF = INREG(DSPASURF);
pI830->saveDSPBSURF = INREG(DSPBSURF);
+ pI830->saveDSPATILEOFF = INREG(DSPATILEOFF);
+ pI830->saveDSPBTILEOFF = INREG(DSPBTILEOFF);
}
pI830->saveVCLK_DIVISOR_VGA0 = INREG(VCLK_DIVISOR_VGA0);
@@ -1910,7 +1912,10 @@ RestoreHWState(ScrnInfoPtr pScrn)
OUTREG(PIPEASRC, pI830->savePIPEASRC);
OUTREG(DSPABASE, pI830->saveDSPABASE);
if (IS_I965G(pI830))
+ {
OUTREG(DSPASURF, pI830->saveDSPASURF);
+ OUTREG(DSPATILEOFF, pI830->saveDSPATILEOFF);
+ }
OUTREG(PIPEACONF, pI830->savePIPEACONF);
i830WaitForVblank(pScrn);
OUTREG(DSPACNTR, pI830->saveDSPACNTR);
@@ -1947,7 +1952,10 @@ RestoreHWState(ScrnInfoPtr pScrn)
OUTREG(PIPEBSRC, pI830->savePIPEBSRC);
OUTREG(DSPBBASE, pI830->saveDSPBBASE);
if (IS_I965G(pI830))
+ {
OUTREG(DSPBSURF, pI830->saveDSPBSURF);
+ OUTREG(DSPBTILEOFF, pI830->saveDSPBTILEOFF);
+ }
OUTREG(PIPEBCONF, pI830->savePIPEBCONF);
i830WaitForVblank(pScrn);
OUTREG(DSPBCNTR, pI830->saveDSPBCNTR);
diff-tree 5bc194d3d3c87bb0128d9ac10f090f031345eb37 (from 64b943c79cf957a4c54482720195d7f27b7f0c0d)
Author: Keith Packard <keithp at koto.keithp.com>
Date: Fri Aug 10 17:54:32 2007 -0700
Set DSPATILEOFF/DSPBTILEOFF to handle 965 tiled frame buffers.
DSPATILEOFF and DSPBTILEOFF replace DSPASURF and DSPBSURF when the frame
buffer is in tiled mode.
diff --git a/src/i830_display.c b/src/i830_display.c
index a77da1b..7a229b2 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -375,6 +375,7 @@ i830PipeSetBase(xf86CrtcPtr crtc, int x,
unsigned long Start, Offset;
int dspbase = (pipe == 0 ? DSPABASE : DSPBBASE);
int dspsurf = (pipe == 0 ? DSPASURF : DSPBSURF);
+ int dsptileoff = (pipe == 0 ? DSPATILEOFF : DSPBTILEOFF);
Offset = ((y * pScrn->displayWidth + x) * pI830->cpp);
if (pI830->front_buffer == NULL) {
@@ -399,6 +400,7 @@ i830PipeSetBase(xf86CrtcPtr crtc, int x,
POSTING_READ(dspbase);
OUTREG(dspsurf, Start);
POSTING_READ(dspsurf);
+ OUTREG(dsptileoff, (y << 16) | x);
} else {
OUTREG(dspbase, Start + Offset);
POSTING_READ(dspbase);
diff-tree 64b943c79cf957a4c54482720195d7f27b7f0c0d (from ba9a503ba2099025e393f3382bb453985ef23497)
Author: Eric Anholt <eric at anholt.net>
Date: Fri Aug 10 15:48:05 2007 -0700
Add #if 0-ed fence debugging code. It's noisy, and of little use to most.
diff --git a/src/i830_debug.c b/src/i830_debug.c
index 055ca93..8b4b76f 100644
--- a/src/i830_debug.c
+++ b/src/i830_debug.c
@@ -334,6 +334,19 @@ DEBUGSTRING(i830_debug_sdvo)
enable, pipe, stall, detected, sdvoextra, gang);
}
+#if 0
+DEBUGSTRING(i810_debug_fence_new)
+{
+ char *enable = (val & FENCE_VALID) ? "enabled" : "disabled";
+ char format = (val & I965_FENCE_Y_MAJOR) ? 'Y' : 'X';
+ int pitch = ((val & 0xffc) >> 2) * 128;
+ unsigned int offset = val & 0xfffff000;
+
+ return XNFprintf("%s, %c tile walk, %d pitch, 0x%08x offset",
+ enable, format, pitch, offset);
+}
+#endif
+
#define DEFINEREG(reg) \
{ reg, #reg, NULL, 0 }
#define DEFINEREG2(reg, func) \
@@ -465,6 +478,25 @@ static struct i830SnapshotRec {
DEFINEREG(TV_H_LUMA_59),
DEFINEREG(TV_H_CHROMA_0),
DEFINEREG(TV_H_CHROMA_59),
+
+#if 0
+ DEFINEREG2(FENCE_NEW + 0, i810_debug_fence_new),
+ DEFINEREG2(FENCE_NEW + 8, i810_debug_fence_new),
+ DEFINEREG2(FENCE_NEW + 16, i810_debug_fence_new),
+ DEFINEREG2(FENCE_NEW + 24, i810_debug_fence_new),
+ DEFINEREG2(FENCE_NEW + 32, i810_debug_fence_new),
+ DEFINEREG2(FENCE_NEW + 40, i810_debug_fence_new),
+ DEFINEREG2(FENCE_NEW + 48, i810_debug_fence_new),
+ DEFINEREG2(FENCE_NEW + 56, i810_debug_fence_new),
+ DEFINEREG2(FENCE_NEW + 64, i810_debug_fence_new),
+ DEFINEREG2(FENCE_NEW + 72, i810_debug_fence_new),
+ DEFINEREG2(FENCE_NEW + 80, i810_debug_fence_new),
+ DEFINEREG2(FENCE_NEW + 88, i810_debug_fence_new),
+ DEFINEREG2(FENCE_NEW + 96, i810_debug_fence_new),
+ DEFINEREG2(FENCE_NEW + 104, i810_debug_fence_new),
+ DEFINEREG2(FENCE_NEW + 112, i810_debug_fence_new),
+ DEFINEREG2(FENCE_NEW + 120, i810_debug_fence_new),
+#endif
};
#undef DEFINEREG
#define NUM_I830_SNAPSHOTREGS (sizeof(i830_snapshot) / sizeof(i830_snapshot[0]))
diff-tree ba9a503ba2099025e393f3382bb453985ef23497 (from b7751c7d1d6bcf310824295c3bab4ff36760c791)
Author: Eric Anholt <eric at anholt.net>
Date: Fri Aug 10 15:06:58 2007 -0700
Don't force tiling on if it is disabled in configuration but fbc is possible.
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 6a03ff6..acb8354 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -2275,12 +2275,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr
pI830->fb_compression = FALSE;
}
- if (pI830->fb_compression && !pI830->tiling) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Framebuffer compression enabled, "
- "forcing tiling on.\n");
- pI830->tiling = TRUE;
- }
-
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Framebuffer compression %sabled\n",
pI830->fb_compression ? "en" : "dis");
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Tiling %sabled\n", pI830->tiling ?
diff-tree b7751c7d1d6bcf310824295c3bab4ff36760c791 (from cb36635a053d4ac3971fea05060d31dbd3d382d2)
Author: Eric Anholt <eric at anholt.net>
Date: Fri Aug 10 17:42:09 2007 -0700
Fix stack-smashing in the last commit.
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 6ba2cd1..15d3a48 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -660,7 +660,7 @@ i830_describe_allocations(ScrnInfoPtr pS
"%sMemory allocation layout:\n", prefix);
for (mem = pI830->memory_list->next; mem->next != NULL; mem = mem->next) {
- char phys_suffix[30] = "";
+ char phys_suffix[32] = "";
char *tile_suffix = "";
if (mem->offset >= pI830->stolen_size &&
@@ -672,7 +672,8 @@ i830_describe_allocations(ScrnInfoPtr pS
}
if (mem->bus_addr != 0)
- sprintf(phys_suffix, ", 0x%16llx physical\n", mem->bus_addr);
+ snprintf(phys_suffix, sizeof(phys_suffix),
+ ", 0x%016llx physical\n", mem->bus_addr);
if (mem->tiling == TILE_XMAJOR)
tile_suffix = " X tiled";
else if (mem->tiling == TILE_YMAJOR)
diff-tree cb36635a053d4ac3971fea05060d31dbd3d382d2 (from ed1b106fabf3a18489bdb3083326f27387a9cb72)
Author: Eric Anholt <eric at anholt.net>
Date: Fri Aug 10 14:16:59 2007 -0700
Attempt to fix several front buffer tiling failure cases.
Front buffer tiling is now disabled with G965 and XAA. Some of the acceleration
that i830_xaa.c does can't be supported on tiled buffers.
Adds a tiling field to struct i830_memory, and uses it instead of separate
variables for each potential tiled buffer.
diff --git a/src/i830.h b/src/i830.h
index f72e1d6..7ae17b4 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -117,6 +117,12 @@ typedef CARD8(*I830ReadIndexedByteFunc)(
typedef void (*I830WriteByteFunc)(I830Ptr pI830, IOADDRESS addr, CARD8 value);
typedef CARD8(*I830ReadByteFunc)(I830Ptr pI830, IOADDRESS addr);
+enum tile_format {
+ TILE_NONE,
+ TILE_XMAJOR,
+ TILE_YMAJOR
+};
+
/** Record of a linear allocation in the aperture. */
typedef struct _i830_memory i830_memory;
struct _i830_memory {
@@ -148,6 +154,8 @@ struct _i830_memory {
*/
unsigned long agp_offset;
+ enum tile_format tiling;
+
/** Description of the allocation, for logging */
char *name;
@@ -316,8 +324,6 @@ typedef struct _I830Rec {
i830_memory *logical_context;
- unsigned int front_tiled;
-
#ifdef XF86DRI
i830_memory *back_buffer;
i830_memory *third_buffer;
@@ -331,10 +337,6 @@ typedef struct _I830Rec {
int mmModeFlags;
int mmSize;
- unsigned int back_tiled;
- unsigned int third_tiled;
- unsigned int depth_tiled;
-
Bool want_vblank_interrupts;
#ifdef DAMAGE
DamagePtr pDamage;
diff --git a/src/i830_display.c b/src/i830_display.c
index d5f7586..a77da1b 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -505,14 +505,14 @@ i830_display_tiled(xf86CrtcPtr crtc)
ScrnInfoPtr pScrn = crtc->scrn;
I830Ptr pI830 = I830PTR(pScrn);
- if (!pI830->tiling)
- return FALSE;
-
/* Rotated data is currently linear, allocated either via XAA or EXA */
if (crtc->rotatedData)
return FALSE;
- return TRUE;
+ if (pI830->front_buffer->tiling != TILE_NONE)
+ return TRUE;
+
+ return FALSE;
}
static Bool
diff --git a/src/i830_dri.c b/src/i830_dri.c
index ca1190c..a4fc97c 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -1658,10 +1658,13 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn,
I830DRIUnmapScreenRegions(pScrn, sarea);
- sarea->front_tiled = pI830->front_tiled;
- sarea->back_tiled = pI830->back_tiled;
- sarea->third_tiled = pI830->third_tiled;
- sarea->depth_tiled = pI830->depth_tiled;
+ sarea->front_tiled = (pI830->front_buffer->tiling != TILE_NONE);
+ sarea->back_tiled = (pI830->back_buffer->tiling != TILE_NONE);
+ if (pI830->third_buffer != NULL)
+ sarea->third_tiled = (pI830->third_buffer->tiling != TILE_NONE);
+ else
+ sarea->third_tiled = FALSE;
+ sarea->depth_tiled = (pI830->depth_buffer->tiling != TILE_NONE);
sarea->rotated_tiled = FALSE;
sarea->front_offset = pI830->front_buffer->offset;
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 023a845..fdf94d7 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -97,19 +97,30 @@ const int I830PatternROP[16] =
ROP_1
};
-/* FIXME: use pixmap private instead */
+/**
+ * Returns whether a given pixmap is tiled or not.
+ *
+ * Currently, we only have one pixmap that might be tiled, which is the front
+ * buffer. At the point where we are tiling some pixmaps managed by the
+ * general allocator, we should move this to using pixmap privates.
+ */
Bool
-i830_pixmap_tiled(PixmapPtr p)
+i830_pixmap_tiled(PixmapPtr pPixmap)
{
- ScreenPtr pScreen = p->drawable.pScreen;
+ ScreenPtr pScreen = pPixmap->drawable.pScreen;
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
+ unsigned long offset;
- if (!pI830->tiling)
- return FALSE;
-
- if (p == pScreen->GetScreenPixmap(pScreen))
+ /* Don't use exaGetPixmapOffset becuase we might be called from XAA code. */
+ offset = (long)pPixmap->devPrivate.ptr -
+ (long)pI830->FbBase;
+ if (offset == pI830->front_buffer->offset &&
+ pI830->front_buffer->tiling != TILE_NONE)
+ {
return TRUE;
+ }
+
return FALSE;
}
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 93b054c..6ba2cd1 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -108,12 +108,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN
#define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1))
-enum tile_format {
- TILING_NONE,
- TILING_XMAJOR,
- TILING_YMAJOR
-};
-
static void i830_set_fence(ScrnInfoPtr pScrn, int nr, unsigned int offset,
unsigned int pitch, unsigned int size,
enum tile_format tile_format);
@@ -536,6 +530,8 @@ i830_allocate_memory(ScrnInfoPtr pScrn,
return NULL;
}
+ mem->tiling = TILE_NONE;
+
return mem;
}
@@ -560,7 +556,7 @@ i830_allocate_memory_tiled(ScrnInfoPtr p
i830_memory *mem;
int fence_divide, i;
- if (tile_format == TILING_NONE)
+ if (tile_format == TILE_NONE)
return i830_allocate_memory(pScrn, name, size, alignment, flags);
/* Only allocate page-sized increments. */
@@ -637,19 +633,11 @@ i830_allocate_memory_tiled(ScrnInfoPtr p
}
mem->size = size;
+ mem->tiling = tile_format;
return mem;
}
-static void
-i830_describe_tiling(ScrnInfoPtr pScrn, int verbosity, const char *prefix,
- i830_memory *mem, unsigned int tiling_mode)
-{
- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
- "%s%s is %stiled\n", prefix, mem->name,
- (tiling_mode == FENCE_LINEAR) ? "not " : "");
-}
-
void
i830_describe_allocations(ScrnInfoPtr pScrn, int verbosity, const char *prefix)
{
@@ -672,6 +660,8 @@ i830_describe_allocations(ScrnInfoPtr pS
"%sMemory allocation layout:\n", prefix);
for (mem = pI830->memory_list->next; mem->next != NULL; mem = mem->next) {
+ char phys_suffix[30] = "";
+ char *tile_suffix = "";
if (mem->offset >= pI830->stolen_size &&
mem->prev->offset < pI830->stolen_size)
@@ -681,42 +671,21 @@ i830_describe_allocations(ScrnInfoPtr pS
prefix, pI830->stolen_size);
}
- if (mem->bus_addr == 0) {
- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
- "%s0x%08lx-0x%08lx: %s (%ld kB)\n", prefix,
- mem->offset, mem->end - 1, mem->name,
- mem->size / 1024);
- } else {
- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
- "%s0x%08lx-0x%08lx: %s "
- "(%ld kB, 0x%16llx physical)\n",
- prefix,
- mem->offset, mem->end - 1, mem->name,
- mem->size / 1024, mem->bus_addr);
- }
+ if (mem->bus_addr != 0)
+ sprintf(phys_suffix, ", 0x%16llx physical\n", mem->bus_addr);
+ if (mem->tiling == TILE_XMAJOR)
+ tile_suffix = " X tiled";
+ else if (mem->tiling == TILE_YMAJOR)
+ tile_suffix = " Y tiled";
+
+ xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+ "%s0x%08lx-0x%08lx: %s (%ld kB%s)%s\n", prefix,
+ mem->offset, mem->end - 1, mem->name,
+ mem->size / 1024, phys_suffix, tile_suffix);
}
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
"%s0x%08lx: end of aperture\n",
prefix, pI830->FbMapSize);
-
- if (pI830->front_buffer != NULL) {
- i830_describe_tiling(pScrn, verbosity, prefix, pI830->front_buffer,
- pI830->front_tiled);
- }
-#ifdef XF86DRI
- if (pI830->back_buffer != NULL) {
- i830_describe_tiling(pScrn, verbosity, prefix, pI830->back_buffer,
- pI830->back_tiled);
- }
- if (pI830->third_buffer != NULL) {
- i830_describe_tiling(pScrn, verbosity, prefix, pI830->third_buffer,
- pI830->third_tiled);
- }
- if (pI830->depth_buffer != NULL) {
- i830_describe_tiling(pScrn, verbosity, prefix, pI830->depth_buffer,
- pI830->depth_tiled);
- }
-#endif
}
static Bool
@@ -835,6 +804,7 @@ i830_allocate_framebuffer(ScrnInfoPtr pS
long size, fb_height;
char *name;
i830_memory *front_buffer = NULL;
+ Bool tiling;
/* Clear everything first. */
memset(FbMemBox, 0, sizeof(*FbMemBox));
@@ -903,8 +873,17 @@ i830_allocate_framebuffer(ScrnInfoPtr pS
name = secondary ? "secondary front buffer" : "front buffer";
+ /* Front buffer tiling has to be disabled with G965 XAA because some of the
+ * acceleration operations (non-XY COLOR_BLT) can't be done to tiled
+ * buffers.
+ */
+ if (!pI830->useEXA && IS_I965G(pI830))
+ tiling = FALSE;
+ else
+ tiling = pI830->tiling;
+
/* Attempt to allocate it tiled first if we have page flipping on. */
- if (pI830->tiling && IsTileable(pScrn, pitch)) {
+ if (tiling && IsTileable(pScrn, pitch)) {
/* XXX: probably not the case on 965 */
if (IS_I9XX(pI830))
align = MB(1);
@@ -912,14 +891,12 @@ i830_allocate_framebuffer(ScrnInfoPtr pS
align = KB(512);
front_buffer = i830_allocate_memory_tiled(pScrn, name, size,
pitch, align,
- 0, TILING_XMAJOR);
- pI830->front_tiled = FENCE_XMAJOR;
+ 0, TILE_XMAJOR);
}
/* If not, attempt it linear */
if (front_buffer == NULL) {
front_buffer = i830_allocate_memory(pScrn, name, size, KB(64), flags);
- pI830->front_tiled = FENCE_LINEAR;
}
if (front_buffer == NULL) {
@@ -1240,7 +1217,7 @@ myLog2(unsigned int n)
static Bool
i830_allocate_backbuffer(ScrnInfoPtr pScrn, i830_memory **buffer,
- unsigned int *tiled, const char *name)
+ const char *name)
{
I830Ptr pI830 = I830PTR(pScrn);
unsigned int pitch = pScrn->displayWidth * pI830->cpp;
@@ -1258,8 +1235,7 @@ i830_allocate_backbuffer(ScrnInfoPtr pSc
size = ROUND_TO_PAGE(pitch * ALIGN(height, 16));
*buffer = i830_allocate_memory_tiled(pScrn, name, size, pitch,
GTT_PAGE_SIZE, ALIGN_BOTH_ENDS,
- TILING_XMAJOR);
- *tiled = FENCE_XMAJOR;
+ TILE_XMAJOR);
}
/* Otherwise, just allocate it linear */
@@ -1267,7 +1243,6 @@ i830_allocate_backbuffer(ScrnInfoPtr pSc
size = ROUND_TO_PAGE(pitch * height);
*buffer = i830_allocate_memory(pScrn, name, size, GTT_PAGE_SIZE,
ALIGN_BOTH_ENDS);
- *tiled = FENCE_LINEAR;
}
if (*buffer == NULL) {
@@ -1303,14 +1278,12 @@ i830_allocate_depthbuffer(ScrnInfoPtr pS
/* The 965 requires that the depth buffer be in Y Major format, while
* the rest appear to fail when handed that format.
*/
- tile_format = IS_I965G(pI830) ? TILING_YMAJOR: TILING_XMAJOR;
+ tile_format = IS_I965G(pI830) ? TILE_YMAJOR: TILE_XMAJOR;
pI830->depth_buffer =
i830_allocate_memory_tiled(pScrn, "depth buffer", size, pitch,
GTT_PAGE_SIZE, ALIGN_BOTH_ENDS,
tile_format);
- pI830->depth_tiled = (tile_format == TILING_YMAJOR) ? FENCE_YMAJOR :
- FENCE_XMAJOR;
}
/* Otherwise, allocate it linear. */
@@ -1319,7 +1292,6 @@ i830_allocate_depthbuffer(ScrnInfoPtr pS
pI830->depth_buffer =
i830_allocate_memory(pScrn, "depth buffer", size, GTT_PAGE_SIZE,
0);
- pI830->depth_tiled = FENCE_LINEAR;
}
if (pI830->depth_buffer == NULL) {
@@ -1405,13 +1377,11 @@ i830_allocate_3d_memory(ScrnInfoPtr pScr
return FALSE;
}
- if (!i830_allocate_backbuffer(pScrn, &pI830->back_buffer,
- &pI830->back_tiled, "back buffer"))
+ if (!i830_allocate_backbuffer(pScrn, &pI830->back_buffer, "back buffer"))
return FALSE;
if (pI830->TripleBuffer && !i830_allocate_backbuffer(pScrn,
&pI830->third_buffer,
- &pI830->third_tiled,
"third buffer")) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Failed to allocate third buffer, triple buffering "
@@ -1447,7 +1417,7 @@ i830_set_fence(ScrnInfoPtr pScrn, int nr
DPRINTF(PFX, "i830_set_fence(): %d, 0x%08x, %d, %d kByte\n",
nr, offset, pitch, size / 1024);
- assert(tile_format != TILING_NONE);
+ assert(tile_format != TILE_NONE);
if (IS_I965G(pI830)) {
if (nr < 0 || nr >= FENCE_NEW_NR) {
@@ -1457,18 +1427,18 @@ i830_set_fence(ScrnInfoPtr pScrn, int nr
}
switch (tile_format) {
- case TILING_XMAJOR:
+ case TILE_XMAJOR:
pI830->fence[nr] = (((pitch / 128) - 1) << 2) | offset | 1;
pI830->fence[nr] |= I965_FENCE_X_MAJOR;
break;
- case TILING_YMAJOR:
+ case TILE_YMAJOR:
/* YMajor can be 128B aligned but the current code dictates
* otherwise. This isn't a problem apart from memory waste.
* FIXME */
pI830->fence[nr] = (((pitch / 128) - 1) << 2) | offset | 1;
pI830->fence[nr] |= I965_FENCE_Y_MAJOR;
break;
- case TILING_NONE:
+ case TILE_NONE:
break;
}
@@ -1516,13 +1486,13 @@ i830_set_fence(ScrnInfoPtr pScrn, int nr
val = offset | FENCE_VALID;
switch (tile_format) {
- case TILING_XMAJOR:
+ case TILE_XMAJOR:
val |= FENCE_X_MAJOR;
break;
- case TILING_YMAJOR:
+ case TILE_YMAJOR:
val |= FENCE_Y_MAJOR;
break;
- case TILING_NONE:
+ case TILE_NONE:
break;
}
@@ -1590,7 +1560,7 @@ i830_set_fence(ScrnInfoPtr pScrn, int nr
}
if ((IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830))
- && tile_format == TILING_YMAJOR)
+ && tile_format == TILE_YMAJOR)
fence_pitch = pitch / 128;
else if (IS_I9XX(pI830))
fence_pitch = pitch / 512;
diff --git a/src/i830_xaa.c b/src/i830_xaa.c
index aa06a80..fabac20 100644
--- a/src/i830_xaa.c
+++ b/src/i830_xaa.c
@@ -269,40 +269,39 @@ I830XAAInit(ScreenPtr pScreen)
return TRUE;
}
-#ifdef XF86DRI
static unsigned int
-CheckTiling(ScrnInfoPtr pScrn)
+I830CheckTiling(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
- unsigned int tiled = 0;
- /* Check tiling */
- if (IS_I965G(pI830)) {
- if (pI830->bufferOffset == pScrn->fbOffset && pI830->front_tiled == FENCE_XMAJOR)
- tiled = 1;
- if (pI830->back_buffer != NULL &&
- pI830->bufferOffset == pI830->back_buffer->offset &&
- pI830->back_tiled == FENCE_XMAJOR) {
- tiled = 1;
- }
- if (pI830->third_buffer != NULL &&
- pI830->bufferOffset == pI830->third_buffer->offset &&
- pI830->third_tiled == FENCE_XMAJOR) {
- tiled = 1;
- }
- /* not really supported as it's always YMajor tiled */
- if (pI830->depth_buffer != NULL &&
- pI830->bufferOffset == pI830->depth_buffer->offset &&
- pI830->depth_tiled == FENCE_XMAJOR) {
- tiled = 1;
- }
+ if (pI830->bufferOffset == pI830->front_buffer->offset &&
+ pI830->front_buffer->tiling != TILE_NONE)
+ {
+ return TRUE;
+ }
+#ifdef XF86DRI
+ if (pI830->back_buffer != NULL &&
+ pI830->bufferOffset == pI830->back_buffer->offset &&
+ pI830->back_buffer->tiling != TILE_NONE)
+ {
+ return TRUE;
}
+ if (pI830->depth_buffer != NULL &&
+ pI830->bufferOffset == pI830->depth_buffer->offset &&
+ pI830->depth_buffer->tiling != TILE_NONE)
+ {
+ return TRUE;
+ }
+ if (pI830->third_buffer != NULL &&
+ pI830->bufferOffset == pI830->third_buffer->offset &&
+ pI830->third_buffer->tiling != TILE_NONE)
+ {
+ return TRUE;
+ }
+#endif
- return tiled;
+ return FALSE;
}
-#else
-#define CheckTiling(pScrn) 0
-#endif
void
I830SetupForSolidFill(ScrnInfoPtr pScrn, int color, int rop,
@@ -314,16 +313,20 @@ I830SetupForSolidFill(ScrnInfoPtr pScrn,
ErrorF("I830SetupForFillRectSolid color: %x rop: %x mask: %x\n",
color, rop, planemask);
+ if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
+ } else {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
+ }
+
#ifdef I830_USE_EXA
/* This function gets used by I830DRIInitBuffers(), and we might not have
* XAAGetPatternROP() available. So just use the ROPs from our EXA code
* if available.
*/
- pI830->BR[13] = ((I830PatternROP[rop] << 16) |
- (pScrn->displayWidth * pI830->cpp));
+ pI830->BR[13] |= (I830PatternROP[rop] << 16);
#else
- pI830->BR[13] = ((XAAGetPatternROP(rop) << 16) |
- (pScrn->displayWidth * pI830->cpp));
+ pI830->BR[13] |= ((XAAGetPatternROP(rop) << 16);
#endif
pI830->BR[16] = color;
@@ -381,7 +384,12 @@ I830SetupForScreenToScreenCopy(ScrnInfoP
ErrorF("I830SetupForScreenToScreenCopy %d %d %x %x %d\n",
xdir, ydir, rop, planemask, transparency_color);
- pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
+ if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
+ } else {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
+ }
+
#ifdef I830_USE_EXA
/* This function gets used by I830DRIInitBuffers(), and we might not have
* XAAGetCopyROP() available. So just use the ROPs from our EXA code
@@ -411,7 +419,7 @@ I830SubsequentScreenToScreenCopy(ScrnInf
{
I830Ptr pI830 = I830PTR(pScrn);
int dst_x2, dst_y2;
- unsigned int tiled = CheckTiling(pScrn);
+ unsigned int tiled = I830CheckTiling(pScrn);
if (I810_DEBUG & DEBUG_VERBOSE_ACCEL)
ErrorF("I830SubsequentScreenToScreenCopy %d,%d - %d,%d %dx%d\n",
@@ -420,10 +428,6 @@ I830SubsequentScreenToScreenCopy(ScrnInf
dst_x2 = dst_x1 + w;
dst_y2 = dst_y1 + h;
- if (tiled)
- pI830->BR[13] = ((pI830->BR[13] & 0xFFFF) >> 2) |
- (pI830->BR[13] & 0xFFFF0000);
-
{
BEGIN_LP_RING(8);
@@ -463,7 +467,11 @@ I830SetupForMono8x8PatternFill(ScrnInfoP
pI830->BR[18] = bg;
pI830->BR[19] = fg;
- pI830->BR[13] = (pScrn->displayWidth * pI830->cpp); /* In bytes */
+ if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
+ } else {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
+ }
pI830->BR[13] |= XAAGetPatternROP(rop) << 16;
if (bg == -1)
pI830->BR[13] |= (1 << 28);
@@ -487,7 +495,7 @@ I830SubsequentMono8x8PatternFillRect(Scr
{
I830Ptr pI830 = I830PTR(pScrn);
int x1, x2, y1, y2;
- unsigned int tiled = CheckTiling(pScrn);
+ unsigned int tiled = I830CheckTiling(pScrn);
x1 = x;
x2 = x + w;
@@ -497,10 +505,6 @@ I830SubsequentMono8x8PatternFillRect(Scr
if (I810_DEBUG & DEBUG_VERBOSE_ACCEL)
ErrorF("I830SubsequentMono8x8PatternFillRect\n");
- if (tiled)
- pI830->BR[13] = ((pI830->BR[13] & 0xFFFF) >> 2) |
- (pI830->BR[13] & 0xFFFF0000);
-
{
BEGIN_LP_RING(10);
@@ -560,7 +564,11 @@ I830SetupForScanlineCPUToScreenColorExpa
fg, bg, rop, planemask);
/* Fill out register values */
- pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
+ if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
+ } else {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
+ }
pI830->BR[13] |= XAAGetCopyROP(rop) << 16;
if (bg == -1)
pI830->BR[13] |= (1 << 29);
@@ -603,7 +611,7 @@ static void
I830SubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
{
I830Ptr pI830 = I830PTR(pScrn);
- unsigned int tiled = CheckTiling(pScrn);
+ unsigned int tiled = I830CheckTiling(pScrn);
if (pI830->init == 0) {
pI830->BR[12] = (pI830->AccelInfoRec->ScanlineColorExpandBuffers[0] -
@@ -621,10 +629,6 @@ I830SubsequentColorExpandScanline(ScrnIn
ErrorF("I830SubsequentColorExpandScanline %d (addr %x)\n",
bufno, pI830->BR[12]);
- if (tiled)
- pI830->BR[13] = ((pI830->BR[13] & 0xFFFF) >> 2) |
- (pI830->BR[13] & 0xFFFF0000);
-
{
BEGIN_LP_RING(8);
@@ -666,7 +670,11 @@ I830SetupForScanlineImageWrite(ScrnInfoP
ErrorF("I830SetupForScanlineImageWrite %x %x\n", rop, planemask);
/* Fill out register values */
- pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
+ if (IS_I965G(pI830) && I830CheckTiling(pScrn)) {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp) >> 4;
+ } else {
+ pI830->BR[13] = (pScrn->displayWidth * pI830->cpp);
+ }
pI830->BR[13] |= XAAGetCopyROP(rop) << 16;
switch (pScrn->bitsPerPixel) {
@@ -703,7 +711,7 @@ static void
I830SubsequentImageWriteScanline(ScrnInfoPtr pScrn, int bufno)
{
I830Ptr pI830 = I830PTR(pScrn);
- unsigned int tiled = CheckTiling(pScrn);
+ unsigned int tiled = I830CheckTiling(pScrn);
if (pI830->init == 0) {
pI830->BR[12] = (pI830->AccelInfoRec->ScanlineColorExpandBuffers[0] -
diff --git a/src/i915_render.c b/src/i915_render.c
index 9c937f2..7f25d90 100644
--- a/src/i915_render.c
+++ b/src/i915_render.c
@@ -285,10 +285,9 @@ i915_texture_setup(PicturePtr pPict, Pix
pI830->mapstate[unit * 3 + 0] = offset;
pI830->mapstate[unit * 3 + 1] = format |
+ MS3_USE_FENCE_REGS |
((pPix->drawable.height - 1) << MS3_HEIGHT_SHIFT) |
((pPix->drawable.width - 1) << MS3_WIDTH_SHIFT);
- if (pI830->tiling)
- pI830->mapstate[unit * 3 + 1] |= MS3_USE_FENCE_REGS;
pI830->mapstate[unit * 3 + 2] = ((pitch / 4) - 1) << MS4_PITCH_SHIFT;
pI830->samplerstate[unit * 3 + 0] = (MIPFILTER_NONE <<
diff --git a/src/i915_video.c b/src/i915_video.c
index e116fe2..a6447b1 100644
--- a/src/i915_video.c
+++ b/src/i915_video.c
@@ -149,7 +149,7 @@ I915DisplayVideoTextured(ScrnInfoPtr pSc
OUT_RING(_3DSTATE_MAP_STATE | 3);
OUT_RING(0x00000001); /* texture map #1 */
OUT_RING(pPriv->YBuf0offset);
- ms3 = MAPSURF_422;
+ ms3 = MAPSURF_422 | MS3_USE_FENCE_REGS;
switch (id) {
case FOURCC_YUY2:
ms3 |= MT_422_YCRCB_NORMAL;
@@ -160,8 +160,6 @@ I915DisplayVideoTextured(ScrnInfoPtr pSc
}
ms3 |= (height - 1) << MS3_HEIGHT_SHIFT;
ms3 |= (width - 1) << MS3_WIDTH_SHIFT;
- if (pI830->tiling)
- ms3 |= MS3_USE_FENCE_REGS;
OUT_RING(ms3);
OUT_RING(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
ADVANCE_LP_RING();
@@ -248,29 +246,23 @@ I915DisplayVideoTextured(ScrnInfoPtr pSc
OUT_RING(0x00000007);
OUT_RING(pPriv->YBuf0offset);
- ms3 = MAPSURF_8BIT | MT_8BIT_I8;
+ ms3 = MAPSURF_8BIT | MT_8BIT_I8 | MS3_USE_FENCE_REGS;
ms3 |= (height - 1) << MS3_HEIGHT_SHIFT;
ms3 |= (width - 1) << MS3_WIDTH_SHIFT;
- if (pI830->tiling)
- ms3 |= MS3_USE_FENCE_REGS;
OUT_RING(ms3);
OUT_RING(((video_pitch * 2 / 4) - 1) << MS4_PITCH_SHIFT);
OUT_RING(pPriv->UBuf0offset);
- ms3 = MAPSURF_8BIT | MT_8BIT_I8;
+ ms3 = MAPSURF_8BIT | MT_8BIT_I8 | MS3_USE_FENCE_REGS;
ms3 |= (height / 2 - 1) << MS3_HEIGHT_SHIFT;
ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT;
- if (pI830->tiling)
- ms3 |= MS3_USE_FENCE_REGS;
OUT_RING(ms3);
OUT_RING(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
OUT_RING(pPriv->VBuf0offset);
- ms3 = MAPSURF_8BIT | MT_8BIT_I8;
+ ms3 = MAPSURF_8BIT | MT_8BIT_I8 | MS3_USE_FENCE_REGS;
ms3 |= (height / 2 - 1) << MS3_HEIGHT_SHIFT;
ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT;
- if (pI830->tiling)
- ms3 |= MS3_USE_FENCE_REGS;
OUT_RING(ms3);
OUT_RING(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
ADVANCE_LP_RING();
diff-tree ed1b106fabf3a18489bdb3083326f27387a9cb72 (from f71b9358b4157a8cfdc694ddef8ca3f98926ca91)
Author: Keith Packard <keithp at koto.keithp.com>
Date: Fri Aug 10 14:31:16 2007 -0700
Clean up tv mode name allocation and copy.
TV mode names used to contain the signalling standard along with the pixel
size. The signalling has been moved to the TV_FORMAT property, but the
allocation and initialization of the mode name was left a bit messy as a
result.
diff --git a/src/i830_tv.c b/src/i830_tv.c
index aba0e3b..e3aeaf9 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -1415,10 +1415,8 @@ i830_tv_get_modes(xf86OutputPtr output)
continue;
mode_ptr = xnfcalloc(1, sizeof(DisplayModeRec));
- mode_ptr->name = xnfalloc(strlen(tv_mode->name) +
- strlen(input->name) + 4);
- sprintf(mode_ptr->name, "%s", input->name);
-
+ mode_ptr->name = xnfalloc(strlen(input->name) + 1);
+ strcpy (mode_ptr->name, input->name);
mode_ptr->HDisplay = hactive_s;
mode_ptr->HSyncStart = hactive_s + 1;
diff-tree f71b9358b4157a8cfdc694ddef8ca3f98926ca91 (from e6746d0f286ef9d9a87f748d40e5421c268f2f7d)
Author: Jesse Barnes <jesse.barnes at intel.com>
Date: Fri Aug 10 15:53:04 2007 -0400
Cleanup tiling and FBC driver output.
Remove an extra "FBC enabled" message from i830_memory.c (only report errors
if they occur), and don't print the "forcing FBC on" message if tiling was
already enabled, as it's redundant and confusing.
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 693e12a..6a03ff6 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -2275,7 +2275,7 @@ I830ScreenInit(int scrnIndex, ScreenPtr
pI830->fb_compression = FALSE;
}
- if (pI830->fb_compression) {
+ if (pI830->fb_compression && !pI830->tiling) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Framebuffer compression enabled, "
"forcing tiling on.\n");
pI830->tiling = TRUE;
diff --git a/src/i830_memory.c b/src/i830_memory.c
index ccd26b3..93b054c 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -1073,10 +1073,7 @@ static void i830_setup_fb_compression(Sc
}
out:
- if (pI830->fb_compression)
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Framebuffer compression "
- "enabled\n");
- else
+ if (!pI830->fb_compression)
xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Allocation error, framebuffer"
" compression disabled\n");
diff-tree e6746d0f286ef9d9a87f748d40e5421c268f2f7d (from e0fcf645a228094620b8f7fdd580963611bdd6ef)
Author: Jesse Barnes <jesse.barnes at intel.com>
Date: Fri Aug 10 15:48:15 2007 -0400
Enable tiling by default on 965.
diff --git a/man/intel.man b/man/intel.man
index 5909fdd..2b19711 100644
--- a/man/intel.man
+++ b/man/intel.man
@@ -85,7 +85,7 @@ Default: enabled on supported configurat
.BI "Option \*qTiling\*q \*q" boolean \*q
This option controls whether memory buffers are allocated in tiled mode. In
many cases (especially for complex rendering), tiling can improve performance.
-Default: enabled on supported configurations.
+Default: enabled.
.TP
.BI "Option \*qDRI\*q \*q" boolean \*q
Disable or enable DRI support.
diff --git a/src/i830.h b/src/i830.h
index 17dfb72..f72e1d6 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -721,17 +721,8 @@ i830_get_transformed_coordinates(int x,
void i830_enter_render(ScrnInfoPtr);
-static inline int i830_tiling_supported(I830Ptr pI830)
-{
- if (IS_I965G(pI830))
- return FALSE;
- return TRUE;
-}
-
static inline int i830_fb_compression_supported(I830Ptr pI830)
{
- if (!i830_tiling_supported(pI830))
- return FALSE;
if (!IS_MOBILE(pI830))
return FALSE;
if (IS_I810(pI830) || IS_I815(pI830) || IS_I830(pI830))
diff --git a/src/i830_driver.c b/src/i830_driver.c
index f293bfd..693e12a 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -2250,11 +2250,8 @@ I830ScreenInit(int scrnIndex, ScreenPtr
pI830->CacheLines = -1;
}
- /* Enable tiling by default where supported */
- if (i830_tiling_supported(pI830))
- pI830->tiling = TRUE;
- else
- pI830->tiling = FALSE;
+ /* Enable tiling by default */
+ pI830->tiling = TRUE;
/* Allow user override if they set a value */
if (xf86IsOptionSet(pI830->Options, OPTION_TILING)) {
diff-tree e0fcf645a228094620b8f7fdd580963611bdd6ef (from 7b143e5c8397da077c0e02455c21c5a99cf50942)
Author: Jesse Barnes <jesse.barnes at intel.com>
Date: Fri Aug 10 15:43:06 2007 -0400
Tiling fixes for 965
This should be close to the last set of tiling fixes for 965 chipsets.
Prior to this commit, the 965 composite hook didn't take tiling into
account, nor did 965 textured video, which caused display corruption.
However, there seems to be at least one last bug to squash--on occasion,
a configuration with tiling enabled won't properly display text. This
is likely another tiling related problem with the composite hook.
diff --git a/src/i830.h b/src/i830.h
index c2321d4..17dfb72 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -739,6 +739,8 @@ static inline int i830_fb_compression_su
return TRUE;
}
+Bool i830_pixmap_tiled(PixmapPtr p);
+
extern const int I830PatternROP[16];
extern const int I830CopyROP[16];
diff --git a/src/i830_display.c b/src/i830_display.c
index 6fe7be7..d5f7586 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -498,6 +498,23 @@ i830_pipe_a_require_deactivate (ScrnInfo
return;
}
+/* FIXME: use pixmap private instead if possible */
+static Bool
+i830_display_tiled(xf86CrtcPtr crtc)
+{
+ ScrnInfoPtr pScrn = crtc->scrn;
+ I830Ptr pI830 = I830PTR(pScrn);
+
+ if (!pI830->tiling)
+ return FALSE;
+
+ /* Rotated data is currently linear, allocated either via XAA or EXA */
+ if (crtc->rotatedData)
+ return FALSE;
+
+ return TRUE;
+}
+
static Bool
i830_use_fb_compression(xf86CrtcPtr crtc)
{
@@ -510,6 +527,9 @@ i830_use_fb_compression(xf86CrtcPtr crtc
if (!pI830->fb_compression)
return FALSE;
+ if (!i830_display_tiled(crtc))
+ return FALSE;
+
/* Pre-965 only supports plane A */
if (!IS_I965GM(pI830) && plane != FBC_CTL_PLANEA)
return FALSE;
@@ -1078,7 +1098,7 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, Dis
else
dspcntr |= DISPPLANE_SEL_PIPE_B;
- if (pI830->tiling)
+ if (IS_I965G(pI830) && i830_display_tiled(crtc))
dspcntr |= DISPLAY_PLANE_TILED;
pipeconf = INREG(pipeconf_reg);
diff --git a/src/i830_exa.c b/src/i830_exa.c
index b0029d1..023a845 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -97,8 +97,9 @@ const int I830PatternROP[16] =
ROP_1
};
-static Bool
-exaPixmapTiled(PixmapPtr p)
+/* FIXME: use pixmap private instead */
+Bool
+i830_pixmap_tiled(PixmapPtr p)
{
ScreenPtr pScreen = p->drawable.pScreen;
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
@@ -189,7 +190,7 @@ I830EXASolid(PixmapPtr pPixmap, int x1,
if (pPixmap->drawable.bitsPerPixel == 32)
cmd |= XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB;
- if (IS_I965G(pI830) && exaPixmapTiled(pPixmap)) {
+ if (IS_I965G(pI830) && i830_pixmap_tiled(pPixmap)) {
assert((pitch % 512) == 0);
pitch >>= 2;
cmd |= XY_COLOR_BLT_TILED;
@@ -274,13 +275,13 @@ I830EXACopy(PixmapPtr pDstPixmap, int sr
cmd |= XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB;
if (IS_I965G(pI830)) {
- if (exaPixmapTiled(pDstPixmap)) {
+ if (i830_pixmap_tiled(pDstPixmap)) {
assert((dst_pitch % 512) == 0);
dst_pitch >>= 2;
cmd |= XY_SRC_COPY_BLT_DST_TILED;
}
- if (exaPixmapTiled(pI830->pSrcPixmap)) {
+ if (i830_pixmap_tiled(pI830->pSrcPixmap)) {
assert((src_pitch % 512) == 0);
src_pitch >>= 2;
cmd |= XY_SRC_COPY_BLT_SRC_TILED;
diff --git a/src/i965_render.c b/src/i965_render.c
index ec64ddd..ad3b53e 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -392,9 +392,11 @@ i965_prepare_composite(int op, PicturePt
{
ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
- CARD32 src_offset, src_pitch;
- CARD32 mask_offset = 0, mask_pitch = 0;
- CARD32 dst_format, dst_offset, dst_pitch;
+ CARD32 src_offset, src_pitch, src_tile_format = 0, src_tiled = 0;
+ CARD32 mask_offset = 0, mask_pitch = 0, mask_tile_format = 0,
+ mask_tiled = 0;
+ CARD32 dst_format, dst_offset, dst_pitch, dst_tile_format = 0,
+ dst_tiled = 0;
Bool rotation_program = FALSE;
IntelEmitInvarientState(pScrn);
@@ -402,11 +404,23 @@ i965_prepare_composite(int op, PicturePt
src_offset = intel_get_pixmap_offset(pSrc);
src_pitch = intel_get_pixmap_pitch(pSrc);
+ if (i830_pixmap_tiled(pSrc)) {
+ src_tiled = 1;
+ src_tile_format = 0; /* Tiled X */
+ }
dst_offset = intel_get_pixmap_offset(pDst);
dst_pitch = intel_get_pixmap_pitch(pDst);
+ if (i830_pixmap_tiled(pDst)) {
+ dst_tiled = 1;
+ dst_tile_format = 0; /* Tiled X */
+ }
if (pMask) {
mask_offset = intel_get_pixmap_offset(pMask);
mask_pitch = intel_get_pixmap_pitch(pMask);
+ if (i830_pixmap_tiled(pMask)) {
+ mask_tiled = 1;
+ mask_tile_format = 0; /* Tiled X */
+ }
}
pI830->scale_units[0][0] = pSrc->drawable.width;
pI830->scale_units[0][1] = pSrc->drawable.height;
@@ -634,6 +648,8 @@ i965_prepare_composite(int op, PicturePt
dest_surf_state->ss2.mip_count = 0;
dest_surf_state->ss2.render_target_rotation = 0;
dest_surf_state->ss3.pitch = dst_pitch - 1;
+ dest_surf_state->ss3.tile_walk = dst_tile_format;
+ dest_surf_state->ss3.tiled_surface = dst_tiled;
dest_surf_state = (void *)(state_base + dest_surf_offset);
memcpy (dest_surf_state, &dest_surf_state_local, sizeof (dest_surf_state_local));
@@ -660,6 +676,8 @@ i965_prepare_composite(int op, PicturePt
src_surf_state->ss2.mip_count = 0;
src_surf_state->ss2.render_target_rotation = 0;
src_surf_state->ss3.pitch = src_pitch - 1;
+ src_surf_state->ss3.tile_walk = src_tile_format;
+ src_surf_state->ss3.tiled_surface = src_tiled;
src_surf_state = (void *)(state_base + src_surf_offset);
memcpy (src_surf_state, &src_surf_state_local, sizeof (src_surf_state_local));
@@ -688,6 +706,8 @@ i965_prepare_composite(int op, PicturePt
mask_surf_state->ss2.mip_count = 0;
mask_surf_state->ss2.render_target_rotation = 0;
mask_surf_state->ss3.pitch = mask_pitch - 1;
+ mask_surf_state->ss3.tile_walk = mask_tile_format;
+ mask_surf_state->ss3.tiled_surface = mask_tiled;
mask_surf_state = (void *)(state_base + mask_surf_offset);
memcpy (mask_surf_state, &mask_surf_state_local, sizeof (mask_surf_state_local));
diff --git a/src/i965_video.c b/src/i965_video.c
index 3084233..6ed7f01 100644
--- a/src/i965_video.c
+++ b/src/i965_video.c
@@ -378,6 +378,8 @@ I965DisplayVideoTextured(ScrnInfoPtr pSc
dest_surf_state->ss2.mip_count = 0;
dest_surf_state->ss2.render_target_rotation = 0;
dest_surf_state->ss3.pitch = pPixmap->devKind - 1;
+ dest_surf_state->ss3.tiled_surface = i830_pixmap_tiled(pPixmap);
+ dest_surf_state->ss3.tile_walk = 0; /* TileX */
/* Set up the source surface state buffer */
memset(src_surf_state, 0, sizeof(*src_surf_state));
@@ -408,6 +410,7 @@ I965DisplayVideoTextured(ScrnInfoPtr pSc
src_surf_state->ss2.mip_count = 0;
src_surf_state->ss2.render_target_rotation = 0;
src_surf_state->ss3.pitch = video_pitch - 1;
+ /* FIXME: account for tiling if we ever do it */
/* Set up a binding table for our two surfaces. Only the PS will use it */
/* XXX: are these offset from the right place? */
diff-tree 79854ed906e278275b25444fb56882b83470f5ea (from parents)
Merge: 45962eed51120ff77326c29d72cf8b6cd8a934b5 c4deefa80a6349db968e25bd6778cdf7a514ca7f
Author: Wang Zhenyu <zhenyu.z.wang at intel.com>
Date: Mon Jul 23 11:45:58 2007 +0800
Merge branch 'xvmc-i915' of git+ssh://zhen@git.freedesktop.org/git/xorg/driver/xf86-video-intel into xvmc-i915
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