xf86-video-ati: Branch 'master' - 2 commits

[Alex Deucher]

 src/radeon_driver.c |    4 ++--
 src/radeon_output.c |   28 ++++++++++++++++++++++------
 src/radeon_reg.h    |    6 ++++++
 3 files changed, 30 insertions(+), 8 deletions(-)

New commits:
diff-tree bf9674b9df351108e069d037ec10869a4154a881 (from b27135bce8b41d69290613b440a338b0a7fe0200)
Author: Alex Deucher <alex at botch2.(none)>
Date:   Sun Sep 23 15:01:34 2007 -0400

    RADEON: properly set default RMX types

diff --git a/src/radeon_output.c b/src/radeon_output.c
index eab39a6..6ece28a 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -2475,10 +2475,12 @@ void RADEONInitConnector(xf86OutputPtr o
     }
 
     if (radeon_output->type == OUTPUT_LVDS) {
+	radeon_output->rmx_type = RMX_FULL;
 	RADEONGetLVDSInfo(output);
     }
 
     if (radeon_output->type == OUTPUT_DVI) {
+	radeon_output->rmx_type = RMX_OFF;
 	RADEONGetTMDSInfo(output);
     }
 
diff-tree b27135bce8b41d69290613b440a338b0a7fe0200 (from d5cf268be2c9b3e320d7101f5213f7d5609b6308)
Author: Alex Deucher <alex at botch2.(none)>
Date:   Sun Sep 23 14:44:38 2007 -0400

    RADEON: fix up LVDS handling for r3xx and newer

diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 3b8454f..e7cccf6 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -4172,8 +4172,8 @@ void RADEONRestoreLVDSRegisters(ScrnInfo
 
     if (info->IsMobility) {
 	OUTREG(RADEON_LVDS_GEN_CNTL,  restore->lvds_gen_cntl);
-	/*OUTREG(RADEON_LVDS_PLL_CNTL,  restore->lvds_pll_cntl);  
-	OUTREG(RADEON_BIOS_4_SCRATCH, restore->bios_4_scratch);
+	OUTREG(RADEON_LVDS_PLL_CNTL,  restore->lvds_pll_cntl);  
+	/*OUTREG(RADEON_BIOS_4_SCRATCH, restore->bios_4_scratch);
 	OUTREG(RADEON_BIOS_5_SCRATCH, restore->bios_5_scratch);
 	OUTREG(RADEON_BIOS_6_SCRATCH, restore->bios_6_scratch);*/
     }
diff --git a/src/radeon_output.c b/src/radeon_output.c
index 346fdc4..eab39a6 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -790,7 +790,7 @@ static void RADEONInitFP2Registers(xf86O
     if (IsPrimary) {
         if ((info->ChipFamily == CHIP_FAMILY_R200) || IS_R300_VARIANT) {
             save->fp2_gen_cntl &= ~R200_FP2_SOURCE_SEL_MASK;
-	    if (mode->Flags & RADEON_USE_RMX) 
+	    if (mode->Flags & RADEON_USE_RMX)
 		save->fp2_gen_cntl |= R200_FP2_SOURCE_SEL_RMX;
         } else {
             save->fp2_gen_cntl &= ~RADEON_FP2_SRC_SEL_CRTC2;
@@ -812,16 +812,30 @@ static void RADEONInitLVDSRegisters(xf86
     ScrnInfoPtr pScrn = output->scrn;
     RADEONInfoPtr  info       = RADEONPTR(pScrn);
 
-    save->lvds_pll_cntl = info->SavedReg.lvds_pll_cntl;
+    save->lvds_pll_cntl = (info->SavedReg.lvds_pll_cntl |
+			   RADEON_LVDS_PLL_EN);
+
+    save->lvds_pll_cntl &= ~RADEON_LVDS_PLL_RESET;
 
     save->lvds_gen_cntl = info->SavedReg.lvds_gen_cntl;
     save->lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS;
     save->lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON);
 
-    if (IsPrimary)
-	save->lvds_gen_cntl &= ~RADEON_LVDS_SEL_CRTC2;
-    else
-	save->lvds_gen_cntl |= RADEON_LVDS_SEL_CRTC2;
+    if (IS_R300_VARIANT)
+	save->lvds_pll_cntl &= ~(R300_LVDS_SRC_SEL_MASK);
+
+    if (IsPrimary) {
+	if (IS_R300_VARIANT) {
+	    if (mode->Flags & RADEON_USE_RMX)
+		save->lvds_pll_cntl |= R300_LVDS_SRC_SEL_RMX;
+	} else
+	    save->lvds_gen_cntl &= ~RADEON_LVDS_SEL_CRTC2;
+    } else {
+	if (IS_R300_VARIANT) {
+	    save->lvds_pll_cntl |= R300_LVDS_SRC_SEL_CRTC2;
+	} else
+	    save->lvds_gen_cntl |= RADEON_LVDS_SEL_CRTC2;
+    }
 
 }
 
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index af62a69..96adb22 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -924,6 +924,12 @@
 #define RADEON_LVDS_PLL_CNTL                0x02d4
 #       define RADEON_HSYNC_DELAY_SHIFT     28
 #       define RADEON_HSYNC_DELAY_MASK      (0xf << 28)
+#       define RADEON_LVDS_PLL_EN           (1   << 16)
+#       define RADEON_LVDS_PLL_RESET        (1   << 17)
+#       define R300_LVDS_SRC_SEL_MASK       (3   << 18)
+#       define R300_LVDS_SRC_SEL_CRTC1      (0   << 18)
+#       define R300_LVDS_SRC_SEL_CRTC2      (1   << 18)
+#       define R300_LVDS_SRC_SEL_RMX        (2   << 18)
 
 #define RADEON_MAX_LATENCY                  0x0f3f /* PCI */
 #define RADEON_MC_AGP_LOCATION              0x014c