xf86-video-intel: Branch 'xf86-video-intel-2.2-branch' - 3 commits - src/i830_debug.c src/i830_display.c src/i830_memory.c src/i830_video.c
Jesse Barnes
jbarnes at kemper.freedesktop.org
Tue Feb 5 17:32:22 PST 2008
src/i830_debug.c | 40 +++++++++++++++-------------
src/i830_display.c | 74 +++++++++++++++++++++++++++++++----------------------
src/i830_memory.c | 7 ++---
src/i830_video.c | 12 +++++---
4 files changed, 76 insertions(+), 57 deletions(-)
New commits:
commit 4398c0a163b348ccca15d705fcad5bc27604919a
Author: Jesse Barnes <jbarnes at hobbes.virtuousgeek.org>
Date: Tue Feb 5 17:09:19 2008 -0800
Fix build warnings on 64 bit
Use PRIx32 for printing CARD32 types, and PRIx64 for portably printing uint64_t
types. Requires the addition of a new include, inttypes.h, to work. Hope C99
is ok with everybody...
diff --git a/src/i830_debug.c b/src/i830_debug.c
index 5e9dafa..196fd23 100644
--- a/src/i830_debug.c
+++ b/src/i830_debug.c
@@ -25,6 +25,8 @@
*
*/
+#include <inttypes.h>
+
#ifdef REG_DUMPER
#include "reg_dumper/reg_dumper.h"
@@ -804,8 +806,8 @@ i830_dump_ring(ScrnInfoPtr pScrn)
mask = pI830->LpRing->tail_mask;
virt = pI830->LpRing->virtual_start;
- ErrorF ("Ring at virtual 0x%x head 0x%x tail 0x%x count %d\n",
- (unsigned int) virt, head, tail, (((tail + mask + 1) - head) & mask) >> 2);
+ ErrorF ("Ring at virtual %p head 0x%x tail 0x%x count %d\n",
+ virt, head, tail, (((tail + mask + 1) - head) & mask) >> 2);
for (ring = (head - 128) & mask; ring != ((head + 4) & mask);
ring = (ring + 4) & mask)
{
@@ -821,25 +823,25 @@ i830_dump_error_state(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
- ErrorF("pgetbl_ctl: 0x%lx pgetbl_err: 0x%lx\n",
- (unsigned long)INREG(PGETBL_CTL), (unsigned long)INREG(PGE_ERR));
+ ErrorF("pgetbl_ctl: 0x%" PRIx32 "getbl_err: 0x%" PRIx32 "\n",
+ INREG(PGETBL_CTL), INREG(PGE_ERR));
- ErrorF("ipeir: %lx iphdr: %lx\n", (unsigned long)INREG(IPEIR),
- (unsigned long)INREG(IPEHR));
+ ErrorF("ipeir: %" PRIx32 " iphdr: %" PRIx32 "\n", INREG(IPEIR),
+ INREG(IPEHR));
- ErrorF("LP ring tail: %lx head: %lx len: %lx start %lx\n",
- (unsigned long)INREG(LP_RING + RING_TAIL),
- (unsigned long)INREG(LP_RING + RING_HEAD) & HEAD_ADDR,
- (unsigned long)INREG(LP_RING + RING_LEN),
- (unsigned long)INREG(LP_RING + RING_START));
+ ErrorF("LP ring tail: %" PRIx32 " head: %" PRIx32 " len: %" PRIx32 " start %" PRIx32 "\n",
+ INREG(LP_RING + RING_TAIL),
+ INREG(LP_RING + RING_HEAD) & HEAD_ADDR,
+ INREG(LP_RING + RING_LEN),
+ INREG(LP_RING + RING_START));
ErrorF("eir: %x esr: %x emr: %x\n",
INREG16(EIR), INREG16(ESR), INREG16(EMR));
ErrorF("instdone: %x instpm: %x\n", INREG16(INST_DONE), INREG8(INST_PM));
- ErrorF("memmode: %lx instps: %lx\n", (unsigned long)INREG(MEMMODE),
- (unsigned long)INREG(INST_PS));
+ ErrorF("memmode: %" PRIx32 " instps: %" PRIx32 "\n", INREG(MEMMODE),
+ INREG(INST_PS));
ErrorF("hwstam: %x ier: %x imr: %x iir: %x\n",
INREG16(HWSTAM), INREG16(IER), INREG16(IMR), INREG16(IIR));
@@ -851,12 +853,12 @@ i965_dump_error_state(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
- ErrorF("pgetbl_ctl: 0x%lx pgetbl_err: 0x%lx\n",
+ ErrorF("pgetbl_ctl: 0x%" PRIx32 " pgetbl_err: 0x%" PRIx32 "\n",
INREG(PGETBL_CTL), INREG(PGE_ERR));
- ErrorF("ipeir: %lx iphdr: %lx\n", INREG(IPEIR_I965), INREG(IPEHR_I965));
+ ErrorF("ipeir: %" PRIx32 " iphdr: %" PRIx32 "\n", INREG(IPEIR_I965), INREG(IPEHR_I965));
- ErrorF("LP ring tail: %lx head: %lx len: %lx start %lx\n",
+ ErrorF("LP ring tail: %" PRIx32 " head: %" PRIx32 " len: %" PRIx32 " start %" PRIx32 "\n",
INREG(LP_RING + RING_TAIL),
INREG(LP_RING + RING_HEAD) & HEAD_ADDR,
INREG(LP_RING + RING_LEN), INREG(LP_RING + RING_START));
@@ -868,15 +870,15 @@ i965_dump_error_state(ScrnInfoPtr pScrn)
(int)INREG(INST_DONE_1));
ErrorF("instpm: %x\n", (int)INREG(INST_PM));
- ErrorF("memmode: %lx instps: %lx\n", INREG(MEMMODE), INREG(INST_PS_I965));
+ ErrorF("memmode: %" PRIx32 " instps: %" PRIx32 "\n", INREG(MEMMODE), INREG(INST_PS_I965));
ErrorF("HW Status mask (hwstam): %x\nIRQ enable (ier): %x "
"imr: %x iir: %x\n",
(int)INREG(HWSTAM), (int)INREG(IER), (int)INREG(IMR),
(int)INREG(IIR));
- ErrorF("acthd: %lx dma_fadd_p: %lx\n", INREG(ACTHD), INREG(DMA_FADD_P));
- ErrorF("ecoskpd: %lx excc: %lx\n", INREG(ECOSKPD), INREG(EXCC));
+ ErrorF("acthd: %" PRIx32 " dma_fadd_p: %" PRIx32 "\n", INREG(ACTHD), INREG(DMA_FADD_P));
+ ErrorF("ecoskpd: %" PRIx32 " excc: %" PRIx32 "\n", INREG(ECOSKPD), INREG(EXCC));
ErrorF("cache_mode: %x/%x\n", (int)INREG(CACHE_MODE_0),
(int)INREG(CACHE_MODE_1));
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 96c8bc0..77ec301 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -97,6 +97,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#endif
#include <assert.h>
+#include <inttypes.h>
#include <string.h>
#include <errno.h>
#include <sys/types.h>
@@ -600,8 +601,8 @@ i830_get_stolen_physical(ScrnInfoPtr pScrn, unsigned long offset,
if ((scan - offset) != (scan_physical - physical)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Non-contiguous GTT entries: (%ld,0x16%llx) vs "
- "(%ld,0x%16llx)\n",
+ "Non-contiguous GTT entries: (%ld,0x16%" PRIx64 ") vs "
+ "(%ld,0x%" PRIx64 ")\n",
scan, scan_physical, offset, physical);
return -1;
}
@@ -949,7 +950,7 @@ i830_describe_allocations(ScrnInfoPtr pScrn, int verbosity, const char *prefix)
if (mem->bus_addr != 0)
snprintf(phys_suffix, sizeof(phys_suffix),
- ", 0x%016llx physical\n", mem->bus_addr);
+ ", 0x%016" PRIx64 " physical\n", mem->bus_addr);
if (mem->tiling == TILE_XMAJOR)
tile_suffix = " X tiled";
else if (mem->tiling == TILE_YMAJOR)
diff --git a/src/i830_video.c b/src/i830_video.c
index 9688aaa..a0e40ad 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -50,6 +50,7 @@
#include "config.h"
#endif
+#include <inttypes.h>
#include <math.h>
#include <string.h>
#include <assert.h>
@@ -462,7 +463,8 @@ i830_overlay_continue(ScrnInfoPtr pScrn, Bool update_filter)
flip_addr = pI830->overlay_regs->bus_addr;
if (update_filter)
flip_addr |= OFC_UPDATE;
- OVERLAY_DEBUG ("overlay_continue cmd 0x%08lx -> 0x%08lx sta 0x%08lx\n",
+ OVERLAY_DEBUG ("overlay_continue cmd 0x%08" PRIx32 " -> 0x%08" PRIx32
+ " sta 0x%08" PRIx32 "\n",
overlay->OCMD, INREG(OCMD_REGISTER), INREG(DOVSTA));
BEGIN_LP_RING(4);
OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE);
@@ -502,7 +504,7 @@ i830_overlay_off(ScrnInfoPtr pScrn)
*/
{
overlay->OCMD &= ~OVERLAY_ENABLE;
- OVERLAY_DEBUG ("overlay_off cmd 0x%08lx -> 0x%08lx sta 0x%08lx\n",
+ OVERLAY_DEBUG ("overlay_off cmd 0x%08" PRIx32 " -> 0x%08" PRIx32 " sta 0x%08" PRIx32 "\n",
overlay->OCMD, INREG(OCMD_REGISTER), INREG(DOVSTA));
BEGIN_LP_RING(6);
OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE);
@@ -674,7 +676,7 @@ I830ResetVideo(ScrnInfoPtr pScrn)
{
int i;
for (i = 0x30000; i < 0x31000; i += 4)
- ErrorF("0x%x 0x%lx\n", i, INREG(i));
+ ErrorF("0x%x 0x%" PRIx32 "\n", i, INREG(i));
}
#endif
}
@@ -1904,7 +1906,7 @@ i830_display_video(ScrnInfoPtr pScrn, xf86CrtcPtr crtc,
overlay->OBUF_1V = pPriv->VBuf1offset;
}
- OVERLAY_DEBUG("pos: 0x%lx, size: 0x%lx\n",
+ OVERLAY_DEBUG("pos: 0x%" PRIx32 ", size: 0x%" PRIx32 "\n",
overlay->DWINPOS, overlay->DWINSZ);
OVERLAY_DEBUG("dst: %d x %d, src: %d x %d\n", drw_w, drw_h, src_w, src_h);
@@ -2066,7 +2068,7 @@ i830_display_video(ScrnInfoPtr pScrn, xf86CrtcPtr crtc,
OCMD |= BUFFER1;
overlay->OCMD = OCMD;
- OVERLAY_DEBUG("OCMD is 0x%lx\n", OCMD);
+ OVERLAY_DEBUG("OCMD is 0x%" PRIx32 "\n", OCMD);
/* make sure the overlay is on */
i830_overlay_on (pScrn);
commit f4d8a5bb6c6a84d6b90157d2e25564dc68bfb7bf
Author: Jesse Barnes <jbarnes at hobbes.virtuousgeek.org>
Date: Tue Feb 5 17:31:58 2008 -0800
Fix typo in merge
Left a conflict line in...
diff --git a/src/i830_display.c b/src/i830_display.c
index 0496d01..b8c7226 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -663,7 +663,6 @@ i830_use_fb_compression(xf86CrtcPtr crtc)
return TRUE;
}
->>>>>>> abf4b0c... Only enable FBC if one pipe is active:src/i830_display.c
/**
* Sets the power management mode of the pipe and plane.
*
commit 52557ecc6df12d02b9808895394ca12702373e9b
Author: Jesse Barnes <jbarnes at hobbes.virtuousgeek.org>
Date: Tue Feb 5 17:30:48 2008 -0800
Only enable FBC if one pipe is active
Some chips can't support FBC if multiple pipes are active. So if more than one
pipe is on or we're going from one->two pipes enabled, make sure FBC is
disabled.
Intended to fix 13418, 13326, 13152.
Conflicts:
src/i830_display.c - don't pull in FBC2 code
diff --git a/src/i830_display.c b/src/i830_display.c
index 73cdf8f..0496d01 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -529,36 +529,6 @@ i830_display_tiled(xf86CrtcPtr crtc)
return FALSE;
}
-static Bool
-i830_use_fb_compression(xf86CrtcPtr crtc)
-{
- ScrnInfoPtr pScrn = crtc->scrn;
- I830Ptr pI830 = I830PTR(pScrn);
- I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
- int plane = (intel_crtc->plane == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB);
-
- if (!pI830->fb_compression)
- return FALSE;
-
- if (!i830_display_tiled(crtc))
- return FALSE;
-
- /* Pre-965 only supports plane A */
- if (!IS_I965GM(pI830) && plane != FBC_CTL_PLANEA)
- return FALSE;
-
- /* Need 15, 16, or 32 (w/alpha) pixel format */
- if (!(pScrn->bitsPerPixel == 16 || /* covers 15 bit mode as well */
- pScrn->bitsPerPixel == 32)) /* mode_set dtrt if fbc is in use */
- return FALSE;
-
- /*
- * No checks for pixel multiply, incl. horizontal, or interlaced modes
- * since they're currently unused.
- */
- return TRUE;
-}
-
/*
* Several restrictions:
* - DSP[AB]CNTR - no line duplication && no pixel multiplier
@@ -649,6 +619,51 @@ i830_disable_fb_compression(xf86CrtcPtr crtc)
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "fbc disabled on plane %c\n", plane);
}
+static Bool
+i830_use_fb_compression(xf86CrtcPtr crtc)
+{
+ ScrnInfoPtr pScrn = crtc->scrn;
+ xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
+ I830Ptr pI830 = I830PTR(pScrn);
+ I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
+ int plane = (intel_crtc->plane == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB);
+ int i, count = 0;
+
+ /* Only available on one pipe at a time */
+ for (i = 0; i < xf86_config->num_crtc; i++) {
+ if (xf86_config->crtc[i]->enabled)
+ count++;
+ }
+
+ /* Here we disable it to catch one->two pipe enabled configs */
+ if (count > 1) {
+ i830_disable_fb_compression(crtc);
+ return FALSE;
+ }
+
+ if (!pI830->fb_compression)
+ return FALSE;
+
+ if (!i830_display_tiled(crtc))
+ return FALSE;
+
+ /* Pre-965 only supports plane A */
+ if (!IS_I965GM(pI830) && plane != FBC_CTL_PLANEA)
+ return FALSE;
+
+ /* Need 15, 16, or 32 (w/alpha) pixel format */
+ if (!(pScrn->bitsPerPixel == 16 || /* covers 15 bit mode as well */
+ pScrn->bitsPerPixel == 32)) /* mode_set dtrt if fbc is in use */
+ return FALSE;
+
+ /*
+ * No checks for pixel multiply, incl. horizontal, or interlaced modes
+ * since they're currently unused.
+ */
+ return TRUE;
+}
+
+>>>>>>> abf4b0c... Only enable FBC if one pipe is active:src/i830_display.c
/**
* Sets the power management mode of the pipe and plane.
*
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