xserver: Branch 'master'
Eric Anholt
anholt at kemper.freedesktop.org
Fri Feb 8 10:56:48 PST 2008
hw/xfree86/x86emu/ops2.c | 16 ++++++
hw/xfree86/x86emu/prim_ops.c | 66 ++++++++++++++++++++++++++
hw/xfree86/x86emu/x86emu/prim_ops.h | 1
hw/xfree86/x86emu/x86emu/prim_x86_gcc.h | 79 ++++++++++++++++++++++++++++++++
4 files changed, 161 insertions(+), 1 deletion(-)
New commits:
commit 66f8001b61d12eaf4905ac71ccbb3f304914d00d
Author: Bart Trojanowski <bart at symbio-technologies.com>
Date: Thu Feb 7 21:26:54 2008 -0500
X86EMU: handle CPUID instruction
After trying to switch from X to VT (or just quit) the video-amd driver
attempts to issue INT 10/0 to go to mode 3 (VGA). The emulator, running
the BIOS code, would then spit out:
c000:0282: A2 ILLEGAL EXTENDED X86 OPCODE!
The opcode was 0F A2, or CPUID; it was not implemented in the emulator.
This simple patch, against 1.3.0.0, handles the CPUID instruction in one of
two ways:
1) if ran on __i386__ or __x86_64__ then it calls the CPUID instruction
directly.
2) if ran elsewhere it returns a canned 486dx4 set of values for
function 1.
This fix allows the video-amd driver to switch back to console mode,
with the GSW BIOS.
Thanks to Symbio Technologies for funding my work, and ThinCan for
providing hardware :)
Signed-off-by: Bart Trojanowski <bart at jukie.net>
Acked-by: Eric Anholt <eric at anholt.net>
diff --git a/hw/xfree86/x86emu/ops2.c b/hw/xfree86/x86emu/ops2.c
index 8c6c535..324de8a 100644
--- a/hw/xfree86/x86emu/ops2.c
+++ b/hw/xfree86/x86emu/ops2.c
@@ -328,6 +328,20 @@ static void x86emuOp2_pop_FS(u8 X86EMU_UNUSED(op2))
}
/****************************************************************************
+REMARKS: CPUID takes EAX/ECX as inputs, writes EAX/EBX/ECX/EDX as output
+Handles opcode 0x0f,0xa2
+****************************************************************************/
+static void x86emuOp2_cpuid(u8 X86EMU_UNUSED(op2))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("CPUID\n");
+ TRACE_AND_STEP();
+ cpuid();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
REMARKS:
Handles opcode 0x0f,0xa3
****************************************************************************/
@@ -2734,7 +2748,7 @@ void (*x86emu_optab2[256])(u8) =
/* 0xa0 */ x86emuOp2_push_FS,
/* 0xa1 */ x86emuOp2_pop_FS,
-/* 0xa2 */ x86emuOp2_illegal_op,
+/* 0xa2 */ x86emuOp2_cpuid,
/* 0xa3 */ x86emuOp2_bt_R,
/* 0xa4 */ x86emuOp2_shld_IMM,
/* 0xa5 */ x86emuOp2_shld_CL,
diff --git a/hw/xfree86/x86emu/prim_ops.c b/hw/xfree86/x86emu/prim_ops.c
index b9e7257..b42cdc0 100644
--- a/hw/xfree86/x86emu/prim_ops.c
+++ b/hw/xfree86/x86emu/prim_ops.c
@@ -102,6 +102,12 @@
#define PRIM_OPS_NO_REDEFINE_ASM
#include "x86emu/x86emui.h"
+#if defined(__GNUC__)
+# if defined (__i386__) || defined(__i386) || defined(__AMD64__) || defined(__x86_64__) || defined(__amd64__)
+# include "x86emu/prim_x86_gcc.h"
+# endif
+#endif
+
/*------------------------- Global Variables ------------------------------*/
static u32 x86emu_parity_tab[8] =
@@ -2654,3 +2660,63 @@ DB( if (CHECK_SP_ACCESS())
return res;
}
+/****************************************************************************
+REMARKS:
+CPUID takes EAX/ECX as inputs, writes EAX/EBX/ECX/EDX as output
+****************************************************************************/
+void cpuid (void)
+{
+ u32 feature = M.x86.R_EAX;
+
+#ifdef X86EMU_HAS_HW_CPUID
+ /* If the platform allows it, we will base our values on the real
+ * results from the CPUID instruction. We limit support to the
+ * first two features, and the results of those are sanitized.
+ */
+ if (feature <= 1)
+ hw_cpuid(&M.x86.R_EAX, &M.x86.R_EBX, &M.x86.R_ECX, &M.x86.R_EDX);
+#endif
+
+ switch (feature) {
+ case 0:
+ /* Regardless if we have real data from the hardware, the emulator
+ * will only support upto feature 1, which we set in register EAX.
+ * Registers EBX:EDX:ECX contain a string identifying the CPU.
+ */
+ M.x86.R_EAX = 1;
+#ifndef X86EMU_HAS_HW_CPUID
+ /* EBX:EDX:ECX = "GenuineIntel" */
+ M.x86.R_EBX = 0x756e6547;
+ M.x86.R_EDX = 0x49656e69;
+ M.x86.R_ECX = 0x6c65746e;
+#endif
+ break;
+ case 1:
+#ifndef X86EMU_HAS_HW_CPUID
+ /* If we don't have x86 compatible hardware, we return values from an
+ * Intel 486dx4; which was one of the first processors to have CPUID.
+ */
+ M.x86.R_EAX = 0x00000480;
+ M.x86.R_EBX = 0x00000000;
+ M.x86.R_ECX = 0x00000000;
+ M.x86.R_EDX = 0x00000002; /* VME */
+#else
+ /* In the case that we have hardware CPUID instruction, we make sure
+ * that the features reported are limited to TSC and VME.
+ */
+ M.x86.R_EDX &= 0x00000012;
+#endif
+ break;
+ default:
+ /* Finally, we don't support any additional features. Most CPUs
+ * return all zeros when queried for invalid or unsupported feature
+ * numbers.
+ */
+ M.x86.R_EAX = 0;
+ M.x86.R_EBX = 0;
+ M.x86.R_ECX = 0;
+ M.x86.R_EDX = 0;
+ break;
+ }
+}
+
diff --git a/hw/xfree86/x86emu/x86emu/prim_ops.h b/hw/xfree86/x86emu/x86emu/prim_ops.h
index bea8357..6ac2a29 100644
--- a/hw/xfree86/x86emu/x86emu/prim_ops.h
+++ b/hw/xfree86/x86emu/x86emu/prim_ops.h
@@ -133,6 +133,7 @@ void push_word (u16 w);
void push_long (u32 w);
u16 pop_word (void);
u32 pop_long (void);
+void cpuid (void);
#ifdef __cplusplus
} /* End of "C" linkage for C++ */
diff --git a/hw/xfree86/x86emu/x86emu/prim_x86_gcc.h b/hw/xfree86/x86emu/x86emu/prim_x86_gcc.h
new file mode 100644
index 0000000..af61e20
--- /dev/null
+++ b/hw/xfree86/x86emu/x86emu/prim_x86_gcc.h
@@ -0,0 +1,79 @@
+/****************************************************************************
+*
+* Inline helpers for x86emu
+*
+* Copyright (C) 2008 Bart Trojanowski, Symbio Technologies, LLC
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: GNU C
+* Environment: GCC on i386 or x86-64
+* Developer: Bart Trojanowski
+*
+* Description: This file defines a few x86 macros that can be used by the
+* emulator to execute native instructions.
+*
+* For PIC vs non-PIC code refer to:
+* http://sam.zoy.org/blog/2007-04-13-shlib-with-non-pic-code-have-inline-assembly-and-pic-mix-well
+*
+****************************************************************************/
+#ifndef __X86EMU_PRIM_X86_GCC_H
+#define __X86EMU_PRIM_X86_GCC_H
+
+#include "x86emu/types.h"
+
+#if !defined(__GNUC__) || !(defined (__i386__) || defined(__i386) || defined(__AMD64__) || defined(__x86_64__) || defined(__amd64__))
+#error This file is intended to be used by gcc on i386 or x86-64 system
+#endif
+
+#if defined(__PIC__) && defined(__i386__)
+
+#define X86EMU_HAS_HW_CPUID 1
+static inline void hw_cpuid (u32 *a, u32 *b, u32 *c, u32 *d)
+{
+ __asm__ __volatile__ ("pushl %%ebx \n\t"
+ "cpuid \n\t"
+ "movl %%ebx, %1 \n\t"
+ "popl %%ebx \n\t"
+ : "=a" (*a), "=r" (*b),
+ "=c" (*c), "=d" (*d)
+ : "a" (*a), "c" (*c)
+ : "cc");
+}
+
+#else // ! (__PIC__ && __i386__)
+
+#define x86EMU_HAS_HW_CPUID 1
+static inline void hw_cpuid (u32 *a, u32 *b, u32 *c, u32 *d)
+{
+ __asm__ __volatile__ ("cpuid"
+ : "=a" (*a), "=b" (*b),
+ "=c" (*c), "=d" (*d)
+ : "a" (*a), "c" (*c)
+ : "cc");
+}
+
+#endif // __PIC__ && __i386__
+
+
+#endif // __X86EMU_PRIM_X86_GCC_H
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