xf86-video-intel: src/i830_display.c

[Zhenyu Wang]

 src/i830_display.c |    5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

New commits:
commit cdc5cb7c3d24f36a30fb931b43ec6df8294709e2
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date:   Tue Feb 19 08:51:53 2008 +0800

    Fix last 8XX clock's p2 value commit
    
    My fault to change Hong's origin patch reversely.

diff --git a/src/i830_display.c b/src/i830_display.c
index 3fe7cda..d5c2dea 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -1725,10 +1725,11 @@ i830_crtc_clock_get(ScrnInfoPtr pScrn, xf86CrtcPtr crtc)
 	    clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS) >>
 			   DPLL_FPA01_P1_POST_DIV_SHIFT);
 
+	    /* if LVDS is dual-channel, p2 = 7 */
 	    if ((INREG(LVDS) & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP)
-		clock.p2 = I8XX_P2_LVDS_SLOW;
+		clock.p2 = 7;
 	    else
-		clock.p2 = I8XX_P2_LVDS_FAST;
+		clock.p2 = 14;
 
 	    if ((dpll & PLL_REF_INPUT_MASK) == PLLB_REF_INPUT_SPREADSPECTRUMIN)
 		i8xx_clock(66000, &clock); /* XXX: might not be 66MHz */