xf86-video-ati: Branch 'master' - 4 commits
Alex Deucher
agd5f at kemper.freedesktop.org
Sun Feb 24 02:37:46 PST 2008
src/radeon_commonfuncs.c | 187 +++++++++++++++++++++++++++++------------------
src/radeon_reg.h | 110 +++++++++++++++++++++++++++
2 files changed, 228 insertions(+), 69 deletions(-)
New commits:
commit 85e470e64f629de72e361c77770e2e29998d1bf4
Merge: 27ddb39... 1b84c76...
Author: Alex Deucher <alex at samba.(none)>
Date: Sun Feb 24 05:37:22 2008 -0500
Merge master and fix conflicts
Merge branch 'master' of ssh://agd5f@git.freedesktop.org/git/xorg/driver/xf86-video-ati
Conflicts:
src/radeon_commonfuncs.c
diff --cc src/radeon_commonfuncs.c
index b8236a7,82825b7..a829f4a
--- a/src/radeon_commonfuncs.c
+++ b/src/radeon_commonfuncs.c
@@@ -57,11 -57,11 +57,11 @@@ static void FUNC_NAME(RADEONInit3DEngin
info->texW[0] = info->texH[0] = info->texW[1] = info->texH[1] = 1;
- if (IS_R300_VARIANT || IS_AVIVO_VARIANT) {
+ if (IS_R300_VARIANT || IS_AVIVO_VARIANT || info->ChipFamily == CHIP_FAMILY_RS690) {
BEGIN_ACCEL(3);
- OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA);
- OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, 0x3);
- OUT_ACCEL_REG(R300_WAIT_UNTIL, 0x30000);
+ OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D);
+ OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, R300_ZC_FLUSH | R300_ZC_FREE);
+ OUT_ACCEL_REG(R300_WAIT_UNTIL, R300_WAIT_2D_IDLECLEAN | R300_WAIT_3D_IDLECLEAN);
FINISH_ACCEL();
BEGIN_ACCEL(3);
@@@ -174,20 -132,14 +174,21 @@@
BEGIN_ACCEL(7);
OUT_ACCEL_REG(R300_SC_EDGERULE, 0xA5294A5);
- OUT_ACCEL_REG(R300_SC_SCISSOR0, 0x0);
- OUT_ACCEL_REG(R300_SC_SCISSOR1, 0x3ffffff);
- if (IS_R300_VARIANT || info->ChipFamily == CHIP_FAMILY_RS690) {
- OUT_ACCEL_REG(R300_SC_CLIP_0_A, 0x880440);
- OUT_ACCEL_REG(R300_SC_CLIP_0_B, 0xff0ff0);
+ OUT_ACCEL_REG(R300_SC_SCISSOR0, ((0 << R300_SCISSOR_X_SHIFT) |
+ (0 << R300_SCISSOR_Y_SHIFT)));
+ OUT_ACCEL_REG(R300_SC_SCISSOR1, ((8191 << R300_SCISSOR_X_SHIFT) |
+ (8191 << R300_SCISSOR_Y_SHIFT)));
- if (IS_AVIVO_VARIANT) {
- OUT_ACCEL_REG(R300_SC_CLIP_0_A, ((0 << R300_CLIP_X_SHIFT) |
- (0 << R300_CLIP_Y_SHIFT)));
++
++ if (IS_R300_VARIANT || (info->ChipFamily == CHIP_FAMILY_RS690)) {
++ OUT_ACCEL_REG(R300_SC_CLIP_0_A, ((1088 << R300_CLIP_X_SHIFT) |
++ (1088 << R300_CLIP_Y_SHIFT)));
+ OUT_ACCEL_REG(R300_SC_CLIP_0_B, ((4080 << R300_CLIP_X_SHIFT) |
+ (2040 << R300_CLIP_Y_SHIFT)));
} else {
- OUT_ACCEL_REG(R300_SC_CLIP_0_A, ((1088 << R300_CLIP_X_SHIFT) |
- (1088 << R300_CLIP_Y_SHIFT)));
- OUT_ACCEL_REG(R300_SC_CLIP_0_A, 0x0);
- OUT_ACCEL_REG(R300_SC_CLIP_0_B, 0xff0ff0);
++ OUT_ACCEL_REG(R300_SC_CLIP_0_A, ((0 << R300_CLIP_X_SHIFT) |
++ (0 << R300_CLIP_Y_SHIFT)));
+ OUT_ACCEL_REG(R300_SC_CLIP_0_B, ((4080 << R300_CLIP_X_SHIFT) |
+ (2040 << R300_CLIP_Y_SHIFT)));
}
OUT_ACCEL_REG(R300_SC_CLIP_RULE, 0xAAAA);
OUT_ACCEL_REG(R300_SC_SCREENDOOR, 0xffffff);
commit 27ddb39b12a0b54e099fd5274c4c91f08e2d2822
Author: Alex Deucher <alex at samba.(none)>
Date: Sun Feb 24 05:30:11 2008 -0500
R300: clean up magic numbers in RADEONInit3DEngine
diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c
index 8635dc0..b8236a7 100644
--- a/src/radeon_commonfuncs.c
+++ b/src/radeon_commonfuncs.c
@@ -65,9 +65,11 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
FINISH_ACCEL();
BEGIN_ACCEL(3);
- OUT_ACCEL_REG(R300_GB_TILE_CONFIG, 0x10011);
- OUT_ACCEL_REG(R300_GB_SELECT,0x0);
- OUT_ACCEL_REG(R300_GB_ENABLE, 0x0);
+ OUT_ACCEL_REG(R300_GB_TILE_CONFIG, (R300_ENABLE_TILING |
+ R300_TILE_SIZE_16 |
+ R300_SUBPIXEL_1_16));
+ OUT_ACCEL_REG(R300_GB_SELECT, 0);
+ OUT_ACCEL_REG(R300_GB_ENABLE, 0);
FINISH_ACCEL();
BEGIN_ACCEL(3);
@@ -77,84 +79,130 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
FINISH_ACCEL();
BEGIN_ACCEL(5);
- OUT_ACCEL_REG(R300_GB_AA_CONFIG, 0x0);
+ OUT_ACCEL_REG(R300_GB_AA_CONFIG, 0);
OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D);
OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, R300_ZC_FLUSH | R300_ZC_FREE);
- OUT_ACCEL_REG(R300_GB_MSPOS0, 0x78888888);
- OUT_ACCEL_REG(R300_GB_MSPOS1, 0x08888888);
+ OUT_ACCEL_REG(R300_GB_MSPOS0, ((8 << R300_MS_X0_SHIFT) |
+ (8 << R300_MS_Y0_SHIFT) |
+ (8 << R300_MS_X1_SHIFT) |
+ (8 << R300_MS_Y1_SHIFT) |
+ (8 << R300_MS_X2_SHIFT) |
+ (8 << R300_MS_Y2_SHIFT) |
+ (8 << R300_MSBD0_Y_SHIFT) |
+ (7 << R300_MSBD0_X_SHIFT)));
+ OUT_ACCEL_REG(R300_GB_MSPOS1, ((8 << R300_MS_X3_SHIFT) |
+ (8 << R300_MS_Y3_SHIFT) |
+ (8 << R300_MS_X4_SHIFT) |
+ (8 << R300_MS_Y4_SHIFT) |
+ (8 << R300_MS_X5_SHIFT) |
+ (8 << R300_MS_Y5_SHIFT) |
+ (8 << R300_MSBD1_SHIFT)));
FINISH_ACCEL();
BEGIN_ACCEL(4);
- OUT_ACCEL_REG(R300_GA_POLY_MODE, 0x120);
- OUT_ACCEL_REG(R300_GA_ROUND_MODE, 0x5);
- OUT_ACCEL_REG(R300_GA_COLOR_CONTROL, 0xAAAA);
- OUT_ACCEL_REG(R300_GA_OFFSET, 0x0);
+ OUT_ACCEL_REG(R300_GA_POLY_MODE, R300_FRONT_PTYPE_TRIANGE | R300_BACK_PTYPE_TRIANGE);
+ OUT_ACCEL_REG(R300_GA_ROUND_MODE, (R300_GEOMETRY_ROUND_NEAREST |
+ R300_COLOR_ROUND_NEAREST));
+ OUT_ACCEL_REG(R300_GA_COLOR_CONTROL, (R300_RGB0_SHADING_GOURAND |
+ R300_ALPHA0_SHADING_GOURAND |
+ R300_RGB1_SHADING_GOURAND |
+ R300_ALPHA1_SHADING_GOURAND |
+ R300_RGB2_SHADING_GOURAND |
+ R300_ALPHA2_SHADING_GOURAND |
+ R300_RGB3_SHADING_GOURAND |
+ R300_ALPHA3_SHADING_GOURAND));
+ OUT_ACCEL_REG(R300_GA_OFFSET, 0);
FINISH_ACCEL();
BEGIN_ACCEL(5);
- OUT_ACCEL_REG(R300_SU_TEX_WRAP, 0x0);
- OUT_ACCEL_REG(R300_SU_POLY_OFFSET_ENABLE, 0x0);
- OUT_ACCEL_REG(R300_SU_CULL_MODE, 0x4);
+ OUT_ACCEL_REG(R300_SU_TEX_WRAP, 0);
+ OUT_ACCEL_REG(R300_SU_POLY_OFFSET_ENABLE, 0);
+ OUT_ACCEL_REG(R300_SU_CULL_MODE, R300_FACE_NEG);
OUT_ACCEL_REG(R300_SU_DEPTH_SCALE, 0x4b7fffff);
- OUT_ACCEL_REG(R300_SU_DEPTH_OFFSET, 0x0);
+ OUT_ACCEL_REG(R300_SU_DEPTH_OFFSET, 0);
FINISH_ACCEL();
BEGIN_ACCEL(5);
- OUT_ACCEL_REG(R300_US_W_FMT, 0x0);
- OUT_ACCEL_REG(R300_US_OUT_FMT_1, 0x1B0F);
- OUT_ACCEL_REG(R300_US_OUT_FMT_2, 0x1B0F);
- OUT_ACCEL_REG(R300_US_OUT_FMT_3, 0x1B0F);
- OUT_ACCEL_REG(R300_US_OUT_FMT_0, 0x1B01);
+ OUT_ACCEL_REG(R300_US_W_FMT, 0);
+ OUT_ACCEL_REG(R300_US_OUT_FMT_1, (R300_OUT_FMT_UNUSED |
+ R300_OUT_FMT_C0_SEL_BLUE |
+ R300_OUT_FMT_C1_SEL_GREEN |
+ R300_OUT_FMT_C2_SEL_RED |
+ R300_OUT_FMT_C3_SEL_ALPHA));
+ OUT_ACCEL_REG(R300_US_OUT_FMT_2, (R300_OUT_FMT_UNUSED |
+ R300_OUT_FMT_C0_SEL_BLUE |
+ R300_OUT_FMT_C1_SEL_GREEN |
+ R300_OUT_FMT_C2_SEL_RED |
+ R300_OUT_FMT_C3_SEL_ALPHA));
+ OUT_ACCEL_REG(R300_US_OUT_FMT_3, (R300_OUT_FMT_UNUSED |
+ R300_OUT_FMT_C0_SEL_BLUE |
+ R300_OUT_FMT_C1_SEL_GREEN |
+ R300_OUT_FMT_C2_SEL_RED |
+ R300_OUT_FMT_C3_SEL_ALPHA));
+ OUT_ACCEL_REG(R300_US_OUT_FMT_0, (R300_OUT_FMT_C4_10 |
+ R300_OUT_FMT_C0_SEL_BLUE |
+ R300_OUT_FMT_C1_SEL_GREEN |
+ R300_OUT_FMT_C2_SEL_RED |
+ R300_OUT_FMT_C3_SEL_ALPHA));
FINISH_ACCEL();
BEGIN_ACCEL(3);
- OUT_ACCEL_REG(R300_FG_DEPTH_SRC, 0x0);
- OUT_ACCEL_REG(R300_FG_FOG_BLEND, 0x0);
- OUT_ACCEL_REG(R300_FG_ALPHA_FUNC, 0x0);
+ OUT_ACCEL_REG(R300_FG_DEPTH_SRC, 0);
+ OUT_ACCEL_REG(R300_FG_FOG_BLEND, 0);
+ OUT_ACCEL_REG(R300_FG_ALPHA_FUNC, 0);
FINISH_ACCEL();
BEGIN_ACCEL(12);
- OUT_ACCEL_REG(R300_RB3D_ZSTENCILCNTL, 0x0);
+ OUT_ACCEL_REG(R300_RB3D_ZSTENCILCNTL, 0);
OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, R300_ZC_FLUSH | R300_ZC_FREE);
- OUT_ACCEL_REG(R300_RB3D_BW_CNTL, 0x0);
- OUT_ACCEL_REG(R300_RB3D_ZCNTL, 0x0);
- OUT_ACCEL_REG(R300_RB3D_ZTOP, 0x0);
- OUT_ACCEL_REG(R300_RB3D_ROPCNTL, 0x0);
+ OUT_ACCEL_REG(R300_RB3D_BW_CNTL, 0);
+ OUT_ACCEL_REG(R300_RB3D_ZCNTL, 0);
+ OUT_ACCEL_REG(R300_RB3D_ZTOP, 0);
+ OUT_ACCEL_REG(R300_RB3D_ROPCNTL, 0);
- OUT_ACCEL_REG(R300_RB3D_AARESOLVE_CTL, 0x0);
- OUT_ACCEL_REG(R300_RB3D_COLOR_CHANNEL_MASK, 0xf);
+ OUT_ACCEL_REG(R300_RB3D_AARESOLVE_CTL, 0);
+ OUT_ACCEL_REG(R300_RB3D_COLOR_CHANNEL_MASK, (R300_BLUE_MASK_EN |
+ R300_GREEN_MASK_EN |
+ R300_RED_MASK_EN |
+ R300_ALPHA_MASK_EN));
OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D);
- OUT_ACCEL_REG(R300_RB3D_CCTL, 0x0);
- OUT_ACCEL_REG(R300_RB3D_DITHER_CTL, 0x0);
+ OUT_ACCEL_REG(R300_RB3D_CCTL, 0);
+ OUT_ACCEL_REG(R300_RB3D_DITHER_CTL, 0);
OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D);
FINISH_ACCEL();
BEGIN_ACCEL(7);
OUT_ACCEL_REG(R300_SC_EDGERULE, 0xA5294A5);
- OUT_ACCEL_REG(R300_SC_SCISSOR0, 0x0);
- OUT_ACCEL_REG(R300_SC_SCISSOR1, 0x3ffffff);
+ OUT_ACCEL_REG(R300_SC_SCISSOR0, ((0 << R300_SCISSOR_X_SHIFT) |
+ (0 << R300_SCISSOR_Y_SHIFT)));
+ OUT_ACCEL_REG(R300_SC_SCISSOR1, ((8191 << R300_SCISSOR_X_SHIFT) |
+ (8191 << R300_SCISSOR_Y_SHIFT)));
if (IS_AVIVO_VARIANT) {
- OUT_ACCEL_REG(R300_SC_CLIP_0_A, 0x0);
- OUT_ACCEL_REG(R300_SC_CLIP_0_B, 0xff0ff0);
+ OUT_ACCEL_REG(R300_SC_CLIP_0_A, ((0 << R300_CLIP_X_SHIFT) |
+ (0 << R300_CLIP_Y_SHIFT)));
+ OUT_ACCEL_REG(R300_SC_CLIP_0_B, ((4080 << R300_CLIP_X_SHIFT) |
+ (2040 << R300_CLIP_Y_SHIFT)));
} else {
- OUT_ACCEL_REG(R300_SC_CLIP_0_A, 0x880440);
- OUT_ACCEL_REG(R300_SC_CLIP_0_B, 0xff0ff0);
+ OUT_ACCEL_REG(R300_SC_CLIP_0_A, ((1088 << R300_CLIP_X_SHIFT) |
+ (1088 << R300_CLIP_Y_SHIFT)));
+ OUT_ACCEL_REG(R300_SC_CLIP_0_B, ((4080 << R300_CLIP_X_SHIFT) |
+ (2040 << R300_CLIP_Y_SHIFT)));
}
OUT_ACCEL_REG(R300_SC_CLIP_RULE, 0xAAAA);
OUT_ACCEL_REG(R300_SC_SCREENDOOR, 0xffffff);
FINISH_ACCEL();
- } else if ((info->ChipFamily == CHIP_FAMILY_RV250) ||
- (info->ChipFamily == CHIP_FAMILY_RV280) ||
- (info->ChipFamily == CHIP_FAMILY_RS300) ||
+ } else if ((info->ChipFamily == CHIP_FAMILY_RV250) ||
+ (info->ChipFamily == CHIP_FAMILY_RV280) ||
+ (info->ChipFamily == CHIP_FAMILY_RS300) ||
(info->ChipFamily == CHIP_FAMILY_R200)) {
BEGIN_ACCEL(7);
- if (info->ChipFamily == CHIP_FAMILY_RS300) {
- OUT_ACCEL_REG(R200_SE_VAP_CNTL_STATUS, RADEON_TCL_BYPASS);
- } else {
- OUT_ACCEL_REG(R200_SE_VAP_CNTL_STATUS, 0);
- }
+ if (info->ChipFamily == CHIP_FAMILY_RS300) {
+ OUT_ACCEL_REG(R200_SE_VAP_CNTL_STATUS, RADEON_TCL_BYPASS);
+ } else {
+ OUT_ACCEL_REG(R200_SE_VAP_CNTL_STATUS, 0);
+ }
OUT_ACCEL_REG(R200_PP_CNTL_X, 0);
OUT_ACCEL_REG(R200_PP_TXMULTI_CTL_0, 0);
OUT_ACCEL_REG(R200_SE_VTX_STATE_CNTL, 0);
@@ -165,11 +213,11 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
FINISH_ACCEL();
} else {
BEGIN_ACCEL(2);
- if ((info->ChipFamily == CHIP_FAMILY_RADEON) ||
- (info->ChipFamily == CHIP_FAMILY_RV200))
- OUT_ACCEL_REG(RADEON_SE_CNTL_STATUS, 0);
- else
- OUT_ACCEL_REG(RADEON_SE_CNTL_STATUS, RADEON_TCL_BYPASS);
+ if ((info->ChipFamily == CHIP_FAMILY_RADEON) ||
+ (info->ChipFamily == CHIP_FAMILY_RV200))
+ OUT_ACCEL_REG(RADEON_SE_CNTL_STATUS, 0);
+ else
+ OUT_ACCEL_REG(RADEON_SE_CNTL_STATUS, RADEON_TCL_BYPASS);
OUT_ACCEL_REG(RADEON_SE_COORD_FMT,
RADEON_VTX_XY_PRE_MULT_1_OVER_W0 |
RADEON_VTX_ST0_NONPARAMETRIC |
@@ -183,12 +231,12 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
OUT_ACCEL_REG(RADEON_RE_WIDTH_HEIGHT, 0x07ff07ff);
OUT_ACCEL_REG(RADEON_AUX_SC_CNTL, 0);
OUT_ACCEL_REG(RADEON_RB3D_PLANEMASK, 0xffffffff);
- OUT_ACCEL_REG(RADEON_SE_CNTL, RADEON_DIFFUSE_SHADE_GOURAUD |
- RADEON_BFACE_SOLID |
- RADEON_FFACE_SOLID |
- RADEON_VTX_PIX_CENTER_OGL |
- RADEON_ROUND_MODE_ROUND |
- RADEON_ROUND_PREC_4TH_PIX);
+ OUT_ACCEL_REG(RADEON_SE_CNTL, (RADEON_DIFFUSE_SHADE_GOURAUD |
+ RADEON_BFACE_SOLID |
+ RADEON_FFACE_SOLID |
+ RADEON_VTX_PIX_CENTER_OGL |
+ RADEON_ROUND_MODE_ROUND |
+ RADEON_ROUND_PREC_4TH_PIX));
FINISH_ACCEL();
}
commit d4c20f33ad6a1f88615cd7e09ad3638896873f9e
Author: Alex Deucher <alex at samba.(none)>
Date: Sun Feb 24 04:46:10 2008 -0500
R300: replace magic numbers in cache flush
diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c
index a626bbd..8635dc0 100644
--- a/src/radeon_commonfuncs.c
+++ b/src/radeon_commonfuncs.c
@@ -59,9 +59,9 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
if (IS_R300_VARIANT || IS_AVIVO_VARIANT) {
BEGIN_ACCEL(3);
- OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA);
- OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, 0x3);
- OUT_ACCEL_REG(R300_WAIT_UNTIL, 0x30000);
+ OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D);
+ OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, R300_ZC_FLUSH | R300_ZC_FREE);
+ OUT_ACCEL_REG(R300_WAIT_UNTIL, R300_WAIT_2D_IDLECLEAN | R300_WAIT_3D_IDLECLEAN);
FINISH_ACCEL();
BEGIN_ACCEL(3);
@@ -71,15 +71,15 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
FINISH_ACCEL();
BEGIN_ACCEL(3);
- OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA);
- OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, 0x3);
- OUT_ACCEL_REG(R300_WAIT_UNTIL, 0x30000);
+ OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D);
+ OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, R300_ZC_FLUSH | R300_ZC_FREE);
+ OUT_ACCEL_REG(R300_WAIT_UNTIL, R300_WAIT_2D_IDLECLEAN | R300_WAIT_3D_IDLECLEAN);
FINISH_ACCEL();
BEGIN_ACCEL(5);
OUT_ACCEL_REG(R300_GB_AA_CONFIG, 0x0);
- OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA);
- OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, 0x3);
+ OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D);
+ OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, R300_ZC_FLUSH | R300_ZC_FREE);
OUT_ACCEL_REG(R300_GB_MSPOS0, 0x78888888);
OUT_ACCEL_REG(R300_GB_MSPOS1, 0x08888888);
FINISH_ACCEL();
@@ -116,7 +116,7 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
BEGIN_ACCEL(12);
OUT_ACCEL_REG(R300_RB3D_ZSTENCILCNTL, 0x0);
- OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, 0x3);
+ OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, R300_ZC_FLUSH | R300_ZC_FREE);
OUT_ACCEL_REG(R300_RB3D_BW_CNTL, 0x0);
OUT_ACCEL_REG(R300_RB3D_ZCNTL, 0x0);
OUT_ACCEL_REG(R300_RB3D_ZTOP, 0x0);
@@ -124,10 +124,10 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
OUT_ACCEL_REG(R300_RB3D_AARESOLVE_CTL, 0x0);
OUT_ACCEL_REG(R300_RB3D_COLOR_CHANNEL_MASK, 0xf);
- OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA);
+ OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D);
OUT_ACCEL_REG(R300_RB3D_CCTL, 0x0);
OUT_ACCEL_REG(R300_RB3D_DITHER_CTL, 0x0);
- OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA);
+ OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D);
FINISH_ACCEL();
BEGIN_ACCEL(7);
commit e52f1c8d2647b81d891ec0728dd582941a76c83f
Author: Alex Deucher <alex at samba.(none)>
Date: Sun Feb 24 04:43:18 2008 -0500
R300: fill in some more 3D bitfields
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index f89a9eb..5594841 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -3819,15 +3819,70 @@
#define R600_BIOS_7_SCRATCH 0x1740
#define R300_GB_TILE_CONFIG 0x4018
+# define R300_ENABLE_TILING (1 << 1)
+# define R300_TILE_SIZE_8 (0 << 4)
+# define R300_TILE_SIZE_16 (1 << 4)
+# define R300_TILE_SIZE_32 (2 << 4)
+# define R300_SUBPIXEL_1_12 (0 << 16)
+# define R300_SUBPIXEL_1_16 (1 << 16)
#define R300_GB_SELECT 0x401c
#define R300_GB_ENABLE 0x4008
#define R300_GB_AA_CONFIG 0x4020
#define R300_GB_MSPOS0 0x4010
+# define R300_MS_X0_SHIFT 0
+# define R300_MS_Y0_SHIFT 4
+# define R300_MS_X1_SHIFT 8
+# define R300_MS_Y1_SHIFT 12
+# define R300_MS_X2_SHIFT 16
+# define R300_MS_Y2_SHIFT 20
+# define R300_MSBD0_Y_SHIFT 24
+# define R300_MSBD0_X_SHIFT 28
#define R300_GB_MSPOS1 0x4014
+# define R300_MS_X3_SHIFT 0
+# define R300_MS_Y3_SHIFT 4
+# define R300_MS_X4_SHIFT 8
+# define R300_MS_Y4_SHIFT 12
+# define R300_MS_X5_SHIFT 16
+# define R300_MS_Y5_SHIFT 20
+# define R300_MSBD1_SHIFT 24
#define R300_GA_POLY_MODE 0x4288
+# define R300_FRONT_PTYPE_POINT (0 << 4)
+# define R300_FRONT_PTYPE_LINE (1 << 4)
+# define R300_FRONT_PTYPE_TRIANGE (2 << 4)
+# define R300_BACK_PTYPE_POINT (0 << 7)
+# define R300_BACK_PTYPE_LINE (1 << 7)
+# define R300_BACK_PTYPE_TRIANGE (2 << 7)
#define R300_GA_ROUND_MODE 0x428c
+# define R300_GEOMETRY_ROUND_TRUNC (0 << 0)
+# define R300_GEOMETRY_ROUND_NEAREST (1 << 0)
+# define R300_COLOR_ROUND_TRUNC (0 << 2)
+# define R300_COLOR_ROUND_NEAREST (1 << 2)
#define R300_GA_COLOR_CONTROL 0x4278
+# define R300_RGB0_SHADING_SOLID (0 << 0)
+# define R300_RGB0_SHADING_FLAT (1 << 0)
+# define R300_RGB0_SHADING_GOURAND (2 << 0)
+# define R300_ALPHA0_SHADING_SOLID (0 << 2)
+# define R300_ALPHA0_SHADING_FLAT (1 << 2)
+# define R300_ALPHA0_SHADING_GOURAND (2 << 2)
+# define R300_RGB1_SHADING_SOLID (0 << 4)
+# define R300_RGB1_SHADING_FLAT (1 << 4)
+# define R300_RGB1_SHADING_GOURAND (2 << 4)
+# define R300_ALPHA1_SHADING_SOLID (0 << 6)
+# define R300_ALPHA1_SHADING_FLAT (1 << 6)
+# define R300_ALPHA1_SHADING_GOURAND (2 << 6)
+# define R300_RGB2_SHADING_SOLID (0 << 8)
+# define R300_RGB2_SHADING_FLAT (1 << 8)
+# define R300_RGB2_SHADING_GOURAND (2 << 8)
+# define R300_ALPHA2_SHADING_SOLID (0 << 10)
+# define R300_ALPHA2_SHADING_FLAT (1 << 10)
+# define R300_ALPHA2_SHADING_GOURAND (2 << 10)
+# define R300_RGB3_SHADING_SOLID (0 << 12)
+# define R300_RGB3_SHADING_FLAT (1 << 12)
+# define R300_RGB3_SHADING_GOURAND (2 << 12)
+# define R300_ALPHA3_SHADING_SOLID (0 << 14)
+# define R300_ALPHA3_SHADING_FLAT (1 << 14)
+# define R300_ALPHA3_SHADING_GOURAND (2 << 14)
#define R300_GA_OFFSET 0x4290
#define R300_VAP_CNTL_STATUS 0x2140
@@ -3856,6 +3911,10 @@
#define R300_SU_TEX_WRAP 0x42a0
#define R300_SU_POLY_OFFSET_ENABLE 0x42b4
#define R300_SU_CULL_MODE 0x42b8
+# define R300_CULL_FRONT (1 << 0)
+# define R300_CULL_BACK (1 << 1)
+# define R300_FACE_POS (0 << 2)
+# define R300_FACE_NEG (1 << 2)
#define R300_SU_DEPTH_SCALE 0x42c0
#define R300_SU_DEPTH_OFFSET 0x42c4
@@ -3972,6 +4031,43 @@
#define R300_US_OUT_FMT_2 0x46ac
#define R300_US_OUT_FMT_3 0x46b0
#define R300_US_OUT_FMT_0 0x46a4
+# define R300_OUT_FMT_C4_8 (0 << 0)
+# define R300_OUT_FMT_C4_10 (1 << 0)
+# define R300_OUT_FMT_C4_10_GAMMA (2 << 0)
+# define R300_OUT_FMT_C_16 (3 << 0)
+# define R300_OUT_FMT_C2_16 (4 << 0)
+# define R300_OUT_FMT_C4_16 (5 << 0)
+# define R300_OUT_FMT_C_16_MPEG (6 << 0)
+# define R300_OUT_FMT_C2_16_MPEG (7 << 0)
+# define R300_OUT_FMT_C2_4 (8 << 0)
+# define R300_OUT_FMT_C_3_3_2 (9 << 0)
+# define R300_OUT_FMT_C_6_5_6 (10 << 0)
+# define R300_OUT_FMT_C_11_11_10 (11 << 0)
+# define R300_OUT_FMT_C_10_11_11 (12 << 0)
+# define R300_OUT_FMT_C_2_10_10_10 (13 << 0)
+# define R300_OUT_FMT_UNUSED (15 << 0)
+# define R300_OUT_FMT_C_16_FP (16 << 0)
+# define R300_OUT_FMT_C2_16_FP (17 << 0)
+# define R300_OUT_FMT_C4_16_FP (18 << 0)
+# define R300_OUT_FMT_C_32_FP (19 << 0)
+# define R300_OUT_FMT_C2_32_FP (20 << 0)
+# define R300_OUT_FMT_C4_32_FP (21 << 0)
+# define R300_OUT_FMT_C0_SEL_ALPHA (0 << 8)
+# define R300_OUT_FMT_C0_SEL_RED (1 << 8)
+# define R300_OUT_FMT_C0_SEL_GREEN (2 << 8)
+# define R300_OUT_FMT_C0_SEL_BLUE (3 << 8)
+# define R300_OUT_FMT_C1_SEL_ALPHA (0 << 10)
+# define R300_OUT_FMT_C1_SEL_RED (1 << 10)
+# define R300_OUT_FMT_C1_SEL_GREEN (2 << 10)
+# define R300_OUT_FMT_C1_SEL_BLUE (3 << 10)
+# define R300_OUT_FMT_C2_SEL_ALPHA (0 << 12)
+# define R300_OUT_FMT_C2_SEL_RED (1 << 12)
+# define R300_OUT_FMT_C2_SEL_GREEN (2 << 12)
+# define R300_OUT_FMT_C2_SEL_BLUE (3 << 12)
+# define R300_OUT_FMT_C3_SEL_ALPHA (0 << 14)
+# define R300_OUT_FMT_C3_SEL_RED (1 << 14)
+# define R300_OUT_FMT_C3_SEL_GREEN (2 << 14)
+# define R300_OUT_FMT_C3_SEL_BLUE (3 << 14)
#define R300_US_CONFIG 0x4600
#define R300_US_PIXSIZE 0x4604
#define R300_US_CODE_OFFSET 0x4608
@@ -3990,8 +4086,14 @@
#define R300_FG_ALPHA_FUNC 0x4bd4
#define R300_RB3D_DSTCACHE_CTLSTAT 0x4e4c
+# define R300_DC_FLUSH_3D (2 << 0)
+# define R300_DC_FREE_3D (2 << 2)
#define R300_RB3D_ZCACHE_CTLSTAT 0x4f18
+# define R300_ZC_FLUSH (1 << 0)
+# define R300_ZC_FREE (1 << 1)
#define R300_WAIT_UNTIL 0x1720
+# define R300_WAIT_2D_IDLECLEAN (1 << 16)
+# define R300_WAIT_3D_IDLECLEAN (1 << 17)
#define R300_RB3D_ZSTENCILCNTL 0x4f04
#define R300_RB3D_ZCACHE_CTLSTAT 0x4f18
#define R300_RB3D_BW_CNTL 0x4f1c
@@ -4020,6 +4122,10 @@
#define R300_RB3D_AARESOLVE_CTL 0x4e88
#define R300_RB3D_COLOR_CHANNEL_MASK 0x4e0c
+# define R300_BLUE_MASK_EN (1 << 0)
+# define R300_GREEN_MASK_EN (1 << 1)
+# define R300_RED_MASK_EN (1 << 2)
+# define R300_ALPHA_MASK_EN (1 << 3)
#define R300_RB3D_COLOR_CLEAR_VALUE 0x4e14
#define R300_RB3D_DSTCACHE_CTLSTAT 0x4e4c
#define R300_RB3D_CCTL 0x4e00
@@ -4028,8 +4134,12 @@
#define R300_SC_EDGERULE 0x43a8
#define R300_SC_SCISSOR0 0x43e0
#define R300_SC_SCISSOR1 0x43e4
+# define R300_SCISSOR_X_SHIFT 0
+# define R300_SCISSOR_Y_SHIFT 13
#define R300_SC_CLIP_0_A 0x43b0
#define R300_SC_CLIP_0_B 0x43b4
+# define R300_CLIP_X_SHIFT 0
+# define R300_CLIP_Y_SHIFT 13
#define R300_SC_CLIP_RULE 0x43d0
#define R300_SC_SCREENDOOR 0x43e8
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