xf86-video-intel: Branch 'display-port' - 29 commits - AUTHORS configure.ac Makefile.am man/intel.man NEWS README RELEASING src/i810_reg.h src/i830_display.c src/i830_dp.c src/i830_driver.c src/i830_hdmi.c src/i830_memory.c src/i830_quirks.c src/i830_sdvo.c src/i830_video.c
Keith Packard
keithp at kemper.freedesktop.org
Mon Apr 27 13:55:15 PDT 2009
AUTHORS | 63 ++++++++++++++++++++++++++
Makefile.am | 2
NEWS | 117 +++++++++++++++++++++++++++++++++++++++++++++++++
README | 125 +++++++++++++----------------------------------------
RELEASING | 44 ++++++++++++++++++
configure.ac | 2
man/intel.man | 19 +++++---
src/i810_reg.h | 23 +++++++--
src/i830_display.c | 77 ++++++++++++++++++++++++++++++++
src/i830_dp.c | 49 ++++++++++++++++++--
src/i830_driver.c | 7 ++
src/i830_hdmi.c | 90 ++++++++++++++++++++++++++++++++++++++
src/i830_memory.c | 19 +++-----
src/i830_quirks.c | 17 ++++++-
src/i830_sdvo.c | 93 +++++++++++++++++++++++++++++++++++++++
src/i830_video.c | 61 +++++++++++--------------
16 files changed, 650 insertions(+), 158 deletions(-)
New commits:
commit cc50de1a9eada785323f2dcc3a59e8e94284e17e
Author: Keith Packard <keithp at keithp.com>
Date: Mon Apr 27 13:55:06 2009 -0700
Add hard-coded PLL values for Display Port
diff --git a/src/i830_display.c b/src/i830_display.c
index 9c32884..fe689a4 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -160,6 +160,7 @@ struct intel_limit {
#define INTEL_LIMIT_G4X_HDMI_DAC 7
#define INTEL_LIMIT_G4X_SINGLE_LVDS 8
#define INTEL_LIMIT_G4X_DUAL_LVDS 9
+#define INTEL_LIMIT_G4X_DISPLAY_PORT 10
/*The parameter is for SDVO on G4x platform*/
#define G4X_VCO_MIN 1750000
@@ -239,6 +240,25 @@ struct intel_limit {
#define G4X_P2_DUAL_LVDS_FAST 7
#define G4X_P2_DUAL_LVDS_LIMIT 0
+/*The parameter is for DISPLAY PORT on G4x platform*/
+#define G4X_DOT_DISPLAY_PORT_MIN 161670
+#define G4X_DOT_DISPLAY_PORT_MAX 227000
+#define G4X_N_DISPLAY_PORT_MIN 1
+#define G4X_N_DISPLAY_PORT_MAX 2
+#define G4X_M_DISPLAY_PORT_MIN 97
+#define G4X_M_DISPLAY_PORT_MAX 108
+#define G4X_M1_DISPLAY_PORT_MIN 0x10
+#define G4X_M1_DISPLAY_PORT_MAX 0x12
+#define G4X_M2_DISPLAY_PORT_MIN 0x05
+#define G4X_M2_DISPLAY_PORT_MAX 0x06
+#define G4X_P_DISPLAY_PORT_MIN 10
+#define G4X_P_DISPLAY_PORT_MAX 20
+#define G4X_P1_DISPLAY_PORT_MIN 1
+#define G4X_P1_DISPLAY_PORT_MAX 2
+#define G4X_P2_DISPLAY_PORT_SLOW 10
+#define G4X_P2_DISPLAY_PORT_FAST 10
+#define G4X_P2_DISPLAY_PORT_LIMIT 0
+
static Bool
intel_find_pll_i8xx_and_i9xx(const intel_limit_t *, xf86CrtcPtr,
int, int, intel_clock_t *);
@@ -246,6 +266,10 @@ static Bool
intel_find_pll_g4x(const intel_limit_t *, xf86CrtcPtr,
int, int, intel_clock_t *);
+static Bool
+intel_find_pll_g4x_dp(const intel_limit_t *, xf86CrtcPtr,
+ int, int, intel_clock_t *);
+
static const intel_limit_t intel_limits[] = {
{ /* INTEL_LIMIT_I8XX_DVO_DAC */
.dot = { .min = I8XX_DOT_MIN, .max = I8XX_DOT_MAX },
@@ -402,6 +426,28 @@ static const intel_limit_t intel_limits[] = {
.p2_fast = G4X_P2_DUAL_LVDS_FAST },
.find_pll = intel_find_pll_g4x,
},
+ { /* INTEL_LIMIT_G4X_DISPLAY_PORT */
+ .dot = { .min = G4X_DOT_DISPLAY_PORT_MIN,
+ .max = G4X_DOT_DISPLAY_PORT_MAX },
+ .vco = { .min = G4X_VCO_MIN,
+ .max = G4X_VCO_MAX},
+ .n = { .min = G4X_N_DISPLAY_PORT_MIN,
+ .max = G4X_N_DISPLAY_PORT_MAX },
+ .m = { .min = G4X_M_DISPLAY_PORT_MIN,
+ .max = G4X_M_DISPLAY_PORT_MAX },
+ .m1 = { .min = G4X_M1_DISPLAY_PORT_MIN,
+ .max = G4X_M1_DISPLAY_PORT_MAX },
+ .m2 = { .min = G4X_M2_DISPLAY_PORT_MIN,
+ .max = G4X_M2_DISPLAY_PORT_MAX },
+ .p = { .min = G4X_P_DISPLAY_PORT_MIN,
+ .max = G4X_P_DISPLAY_PORT_MAX },
+ .p1 = { .min = G4X_P1_DISPLAY_PORT_MIN,
+ .max = G4X_P1_DISPLAY_PORT_MAX},
+ .p2 = { .dot_limit = G4X_P2_DISPLAY_PORT_LIMIT,
+ .p2_slow = G4X_P2_DISPLAY_PORT_SLOW,
+ .p2_fast = G4X_P2_DISPLAY_PORT_FAST },
+ .find_pll = intel_find_pll_g4x_dp,
+ },
};
static const intel_limit_t *intel_limit_g4x (xf86CrtcPtr crtc)
@@ -421,6 +467,8 @@ static const intel_limit_t *intel_limit_g4x (xf86CrtcPtr crtc)
limit = &intel_limits[INTEL_LIMIT_G4X_HDMI_DAC];
} else if (i830PipeHasType (crtc, I830_OUTPUT_SDVO)) {
limit = &intel_limits[INTEL_LIMIT_G4X_SDVO];
+ } else if (i830PipeHasType (crtc, I830_OUTPUT_DISPLAYPORT)) {
+ limit = &intel_limits[INTEL_LIMIT_G4X_DISPLAY_PORT];
} else /* The option is for other outputs */
limit = &intel_limits[INTEL_LIMIT_I9XX_SDVO_DAC];
return limit;
@@ -625,6 +673,35 @@ intel_find_pll_i8xx_and_i9xx(const intel_limit_t * limit, xf86CrtcPtr crtc,
return (err != target);
}
+/* DisplayPort has only two frequencies, 162MHz and 270MHz */
+static Bool
+intel_find_pll_g4x_dp(const intel_limit_t * limit, xf86CrtcPtr crtc,
+ int target, int refclk, intel_clock_t *best_clock)
+{
+ intel_clock_t clock;
+ if (target < 200000) {
+ clock.dot = 161670;
+ clock.p = 20;
+ clock.p1 = 2;
+ clock.p2 = 10;
+ clock.n = 0x01;
+ clock.m = 97;
+ clock.m1 = 0x10;
+ clock.m2 = 0x05;
+ } else {
+ clock.dot = 270000;
+ clock.p = 10;
+ clock.p1 = 1;
+ clock.p2 = 10;
+ clock.n = 0x02;
+ clock.m = 108;
+ clock.m1 = 0x12;
+ clock.m2 = 0x06;
+ }
+ memcpy(best_clock, &clock, sizeof(intel_clock_t));
+ return TRUE;
+}
+
static Bool
intel_find_pll_g4x(const intel_limit_t * limit, xf86CrtcPtr crtc,
int target, int refclk, intel_clock_t *best_clock)
commit 8cef48a38ed81493151b0baaa49a5e21c581dfbb
Author: Keith Packard <keithp at keithp.com>
Date: Mon Apr 27 13:53:59 2009 -0700
Verbose training process under debug_modes
diff --git a/src/i810_reg.h b/src/i810_reg.h
index e5ade24..9ca7842 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -1518,18 +1518,21 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
# define DP_LINK_TRAIN_PAT_IDLE (2 << 28)
# define DP_LINK_TRAIN_OFF (3 << 28)
# define DP_LINK_TRAIN_MASK (3 << 28)
+# define DP_LINK_TRAIN_SHIFT 28
# define DP_VOLTAGE_0_4 (0 << 25)
# define DP_VOLTAGE_0_6 (1 << 25)
# define DP_VOLTAGE_0_8 (2 << 25)
# define DP_VOLTAGE_1_2 (3 << 25)
# define DP_VOLTAGE_MASK (7 << 25)
+# define DP_VOLTAGE_SHIFT 25
# define DP_PRE_EMPHASIS_0 (0 << 22)
# define DP_PRE_EMPHASIS_3_5 (1 << 22)
# define DP_PRE_EMPHASIS_6 (2 << 22)
# define DP_PRE_EMPHASIS_9_5 (3 << 22)
# define DP_PRE_EMPHASIS_MASK (7 << 22)
+# define DP_PRE_EMPHASIS_SHIFT 22
# define DP_PORT_WIDTH_1 (0 << 19)
# define DP_PORT_WIDTH_2 (1 << 19)
diff --git a/src/i830_dp.c b/src/i830_dp.c
index 1c6f7a7..a4018df 100644
--- a/src/i830_dp.c
+++ b/src/i830_dp.c
@@ -109,6 +109,7 @@ i830_dp_link_clock(uint8_t link_bw)
return 162000;
}
+/* I think this is a fiction */
static int
i830_dp_link_required(int pixel_clock)
{
@@ -673,6 +674,17 @@ i830_get_adjust_request_pre_emphasis(uint8_t link_status[DP_LINK_STATUS_SIZE],
return ((l >> s) & 3) << DP_TRAIN_PRE_EMPHASIS_SHIFT;
}
+
+static char *voltage_names[] = {
+ "0.4V", "0.6V", "0.8V", "1.2V"
+};
+static char *pre_emph_names[] = {
+ "0dB", "3.5dB", "6dB", "9.5dB"
+};
+static char *link_train_names[] = {
+ "pattern 1", "pattern 2", "idle", "off"
+};
+
/*
* These are source-specific values; current Intel hardware supports
* a maximum voltage of 800mV and a maximum pre-emphasis of 6dB
@@ -686,8 +698,9 @@ i830_dp_pre_emphasis_max(uint8_t voltage_swing)
case DP_TRAIN_VOLTAGE_SWING_400:
return DP_TRAIN_PRE_EMPHASIS_6;
case DP_TRAIN_VOLTAGE_SWING_600:
- return DP_TRAIN_PRE_EMPHASIS_3_5;
+ return DP_TRAIN_PRE_EMPHASIS_6;
case DP_TRAIN_VOLTAGE_SWING_800:
+ return DP_TRAIN_PRE_EMPHASIS_3_5;
case DP_TRAIN_VOLTAGE_SWING_1200:
default:
return DP_TRAIN_PRE_EMPHASIS_0;
@@ -695,10 +708,13 @@ i830_dp_pre_emphasis_max(uint8_t voltage_swing)
}
static void
-i830_get_adjust_train(uint8_t link_status[DP_LINK_STATUS_SIZE],
+i830_get_adjust_train(xf86OutputPtr output,
+ uint8_t link_status[DP_LINK_STATUS_SIZE],
int lane_count,
uint8_t train_set[4])
{
+ ScrnInfoPtr pScrn = output->scrn;
+ I830Ptr pI830 = I830PTR(pScrn);
uint8_t v = 0;
uint8_t p = 0;
int lane;
@@ -707,6 +723,13 @@ i830_get_adjust_train(uint8_t link_status[DP_LINK_STATUS_SIZE],
uint8_t this_v = i830_get_adjust_request_voltage(link_status, lane);
uint8_t this_p = i830_get_adjust_request_pre_emphasis(link_status, lane);
+ if (pI830->debug_modes) {
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "requested signal parameters: lane %d voltage %s pre_emph %s\n",
+ lane,
+ voltage_names[this_v >> DP_TRAIN_VOLTAGE_SWING_SHIFT],
+ pre_emph_names[this_p >> DP_TRAIN_PRE_EMPHASIS_SHIFT]);
+ }
if (this_v > v)
v = this_v;
if (this_p > p)
@@ -719,6 +742,12 @@ i830_get_adjust_train(uint8_t link_status[DP_LINK_STATUS_SIZE],
if (p >= i830_dp_pre_emphasis_max(v))
p = i830_dp_pre_emphasis_max(v) | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
+ if (pI830->debug_modes) {
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "using signal parameters: voltage %s pre_emph %s\n",
+ voltage_names[(v & DP_TRAIN_VOLTAGE_SWING_MASK) >> DP_TRAIN_VOLTAGE_SWING_SHIFT],
+ pre_emph_names[(p & DP_TRAIN_PRE_EMPHASIS_MASK) >> DP_TRAIN_PRE_EMPHASIS_SHIFT]);
+ }
for (lane = 0; lane < 4; lane++)
train_set[lane] = v | p;
}
@@ -823,9 +852,19 @@ i830_dp_set_link_train(xf86OutputPtr output,
I830Ptr pI830 = I830PTR(pScrn);
int ret;
+ if (pI830->debug_modes) {
+ uint32_t voltage = (dp_reg_value & DP_VOLTAGE_MASK) >> DP_VOLTAGE_SHIFT;
+ uint32_t pre_emph = (dp_reg_value & DP_PRE_EMPHASIS_MASK) >> DP_PRE_EMPHASIS_SHIFT;
+ uint32_t pattern = (dp_reg_value & DP_LINK_TRAIN_MASK) >> DP_LINK_TRAIN_SHIFT;
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Training %s trying link voltage %s pre-emphasis %s\n",
+ link_train_names[pattern],
+ voltage_names[voltage],
+ pre_emph_names[pre_emph]);
+ }
OUTREG(dev_priv->output_reg, dp_reg_value);
POSTING_READ(dev_priv->output_reg);
-// if (first)
+ if (first)
i830WaitForVblank(pScrn);
i830_dp_aux_native_write_1(pScrn, dev_priv->output_reg,
@@ -912,7 +951,7 @@ i830_dp_link_train(xf86OutputPtr output, uint32_t DP,
voltage = train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
/* Compute new train_set as requested by target */
- i830_get_adjust_train(link_status, dev_priv->lane_count, train_set);
+ i830_get_adjust_train(output, link_status, dev_priv->lane_count, train_set);
}
if (!clock_recovery)
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -955,7 +994,7 @@ i830_dp_link_train(xf86OutputPtr output, uint32_t DP,
}
/* Compute new train_set as requested by target */
- i830_get_adjust_train(link_status, dev_priv->lane_count, train_set);
+ i830_get_adjust_train(output, link_status, dev_priv->lane_count, train_set);
++tries;
}
if (!channel_eq)
commit f5c17bb6feb14d4fbf59aa2a51da7943c8de69be
Merge: 6e76c2a... 2e3b95e...
Author: Keith Packard <keithp at keithp.com>
Date: Thu Apr 16 11:49:03 2009 -0700
Merge commit 'origin/master' into display-port
commit 2e3b95ed0197971e81ab7509245c899e96859d5b
Author: Carl Worth <cworth at cworth.org>
Date: Wed Apr 15 18:54:19 2009 -0700
Increment version to 2.7.99.1
This is the number we want for any development snapshots along
what will eventually become 2.8.0. (Once we get to 'release
candidates' we'll bump this up to 2.7.99.901.)
diff --git a/configure.ac b/configure.ac
index ae134af..ad1cfcf 100644
--- a/configure.ac
+++ b/configure.ac
@@ -22,7 +22,7 @@
AC_PREREQ(2.57)
AC_INIT([xf86-video-intel],
- 2.6.99.1,
+ 2.7.99.1,
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
xf86-video-intel)
commit c9e174b31ae3b9a138ae696d563420a841062f57
Author: Carl Worth <cworth at cworth.org>
Date: Wed Apr 15 18:52:38 2009 -0700
RELEASING: Note that --with-xserver-source is needed for make distcheck
I was always forgetting this without this reminder.
diff --git a/RELEASING b/RELEASING
index 9376110..ec67224 100644
--- a/RELEASING
+++ b/RELEASING
@@ -25,6 +25,10 @@ The process for releasing a new tarball is as follows:
$ make distcheck
+ Note that unlike a regular "make", this will not work unless
+ you pass a valid --with-xserver-source=/path/to/xserver option
+ to configure.
+
5. Tag the release
$ git tag -m "Intel <ver> release" <ver>
commit 73c3be1aa033e8c5c7ee777eb2fd43c19668fa86
Author: Carl Worth <cworth at cworth.org>
Date: Wed Apr 15 18:18:14 2009 -0700
README: Fix typos in chipset list, and point to how_to_report_bug web page
Thanks to Gordon Jin for these suggestions.
diff --git a/README b/README
index 8ac6e1f..96db084 100644
--- a/README
+++ b/README
@@ -9,11 +9,10 @@ the X Window System as implemented by X.org. It supports a variety of
Intel graphics chipsets including:
i810/i810e/i810-dc100,i815,
- i830M,845G,852GM,855GM,865M,
+ i830M,845G,852GM,855GM,865G,
915G/GM,945G/GM/GME,946GZ
- G/GM/GME965,
- G/Q33,G/Q35,G41,G/Q43
- G/GM/Q45
+ G/GM/GME/Q965,
+ G/Q33,G/Q35,G41,G/Q43,G/GM/Q45
Where to get more information about the driver
----------------------------------------------
@@ -39,12 +38,9 @@ xf86-video-intel:
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
-To report bugs encountered with the driver:
+To report bugs encountered with the driver, see:
- http://bugs.freedesktop.org
-
- Product: xorg
- Component: Driver/intel
+ http://intellinuxgraphics.org/how_to_report_bug.html
To see bugs that are targeted to be fixed in the next release:
commit c51dddb724a79a75491369a4c3e8b7b26231e7ac
Author: Carl Worth <cworth at cworth.org>
Date: Wed Apr 15 18:07:17 2009 -0700
AUTHORS: Add Robert Lowery to the authors file
Rob got missed from my first scan since one commit lists his name as
just 'Rob' and 3 commits don't attribute him as author:
83d304c61ad5fdc58b0a9309dbd1e5a3f6cd9b01
7552d80e367fe38bbc594fe94abd649917fe54d5
6eecef4fed8a21dfdabef42eb69fd150b96167b2
diff --git a/AUTHORS b/AUTHORS
index 31a1da1..9f1a589 100644
--- a/AUTHORS
+++ b/AUTHORS
@@ -22,6 +22,7 @@ Julien Cristau
Ma Ling
Bryce Harrington
Daniel Stone
+Robert Lowery
Kaleb Keithley
Paulo Cesar Pereira de Andrade
Eamon Walsh
commit 4b5edde5da4b3e955eb2d77004de81e47bec7f69
Author: Robert Lowery <rlowery at exemail.com.au>
Date: Wed Apr 15 18:03:31 2009 -0700
Fix typo in comment
Thanks to Robert Lowery for the sharp eyes on this one.
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 48e2351..6ff5a1d 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -1607,7 +1607,7 @@ I830AccelMethodInit(ScrnInfoPtr pScrn)
* Then, just to make things more confusing, the default EXA will
* be overridden to UXA if KMS is available. See I830DrmModeInit.
*
- * All this *will* go away when we remov XAA and EXA support from
+ * All this *will* go away when we remove XAA and EXA support from
* this driver. (And there will be much rejoicing.)
*/
if (!(pI830->accel == ACCEL_NONE)) {
commit 3fd5a1ecd1d5140ae07ccc279298bcadd515e97f
Author: Carl Worth <cworth at cworth.org>
Date: Wed Apr 15 16:44:11 2009 -0700
RELEASING: Update instructions to reflect some minor process improvements
We've added a NEWS file now, so that needs to be updated for each release.
We're also now using tag names of just <version> rather than
xf86-video-intel-<version>.
diff --git a/RELEASING b/RELEASING
index c4006c3..9376110 100644
--- a/RELEASING
+++ b/RELEASING
@@ -1,32 +1,40 @@
The process for releasing a new tarball is as follows:
-1. make sure you have the latest build requirements installed:
+1. Make sure you have the latest build requirements installed:
git://git.freedesktop.org/git/util/macros
git://git.freedesktop.org/git/util/modular
-2. update your module version (usually found in configure.ac)
+2. Add relevant release notes to the NEWS files
+
+ Skim the git log since the last release, and add notes in a
+ similar style to previous releases.
+
+ For major releases list added features and known limitations.
+
+ For minor releases indicate which bugs were fixed and which
+ are still present.
+
+
+3. Update your module version (usually found in configure.ac)
$ vi configure.ac # bump version
$ git push origin # make sure you're on the release branch
-3. verify your module builds
+4. Verify your module builds
$ make distcheck
-4. tag the release
-
- $ git tag -m "Intel <ver> release" xf86-video-intel-<ver>
+5. Tag the release
-5. run the release script (this should push the tag)
+ $ git tag -m "Intel <ver> release" <ver>
- $ <path_to>/util/modular/release.sh driver xf86-video-intel-<last_ver> xf86-video-intel-<ver>
+6. Run the release script (this should push the tag)
-6. edit the generated release message as needed and send it out
+ $ <path_to>/util/modular/release.sh driver <last_ver> <ver>
- for major releases list added features and known limitations
+7. Edit the generated release message as needed and send it out
- for minor releases indicate which bugs were fixed and which
- are still present
+ At the very least, add the release notes from the NEWS file.
-7. throw a release party, you're done! :)
+8. Throw a release party, you're done! :)
commit e1cace16a6130dcdd93965d2329a349d49200fa6
Author: Carl Worth <cworth at cworth.org>
Date: Wed Apr 15 16:33:12 2009 -0700
NEWS: Add note about broken PAT code in some kernels
Hoping to cut off some false bug reports here.
diff --git a/NEWS b/NEWS
index c059c98..0d0cd8a 100644
--- a/NEWS
+++ b/NEWS
@@ -19,6 +19,16 @@ this release, which should give the best performance and
robustness. When KMS is available, UXA is the default acceleration
used by the driver, (EXA is the default otherwise).
+Known issue:
+
+ Some Linux kernel versions (such as 2.6.29) are known to have
+ broken PAT code that causes recent versions of this driver to
+ fail, (which can manifest as the X server simply not
+ starting). This can be verified by adding the "nopat" option
+ to the kernel command-line and seeing the failure go away. We
+ hope that newer kernels in the 2.6.29.x as well as 2.6.30 and
+ above will have working PAT code.
+
Some of the most notable bugs fixed in 2.7.0 include:
[GM45 965GM] bad htotal causes panel startup failure
commit 9ffd1951d1f2fd2f53273d04ea29de050f07af55
Author: Carl Worth <cworth at cworth.org>
Date: Wed Apr 15 16:14:44 2009 -0700
Add AUTHORS and NEWS to EXTRA_DIST
These new files don't do us much good if we don't distribute them in
our releases.
diff --git a/Makefile.am b/Makefile.am
index 45b0c42..d91b3d2 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -23,5 +23,5 @@ ACLOCAL_AMFLAGS = -I m4
SUBDIRS = uxa src man
-EXTRA_DIST = README
+EXTRA_DIST = README AUTHORS NEWS
DISTCLEANFILES = doltcompile
commit e4cd9de2933ada3e2a4b43552729ae3a370128bf
Author: Carl Worth <cworth at cworth.org>
Date: Wed Apr 15 16:14:03 2009 -0700
Add a NEWS files with release-notes for 2.7.0
It will be nice to have release-notes under revision control, as well
being able to document issues in an obviously time-sensitive file,
(as opposed to README where we were documenting some of this previously).
diff --git a/NEWS b/NEWS
new file mode 100644
index 0000000..c059c98
--- /dev/null
+++ b/NEWS
@@ -0,0 +1,107 @@
+Release 2.7.0 (2009-04-15)
+--------------------------
+Compared to the 2.6 series, 2.7.0 has a large number of bug fixes, but
+also a few significant features, such as:
+
+ SDVO-TV support, available on ADD2 card (bug#9992) and
+ D945GCLF2 board (bug#17776).
+
+ Basic SDVO-LVDS support
+
+ XV video display without tearing
+ [Though this isn't working for all users yet, see
+ https://bugs.freedesktop.org/show_bug.cgi?id=21076 ]
+
+ Various fixes for UXA, DRI2, and Kernel modesetting.
+
+We encourage users to use kernel modesetting and UXA acceleration with
+this release, which should give the best performance and
+robustness. When KMS is available, UXA is the default acceleration
+used by the driver, (EXA is the default otherwise).
+
+Some of the most notable bugs fixed in 2.7.0 include:
+
+ [GM45 965GM] bad htotal causes panel startup failure
+ https://bugs.freedesktop.org/show_bug.cgi?id=17292
+
+ [xrandr TV] need TV output property control
+ https://bugs.freedesktop.org/show_bug.cgi?id=12763
+
+ [TV] "xrandr --set TV_FORMAT" gets BadMatch error
+ https://bugs.freedesktop.org/show_bug.cgi?id=16566
+
+ [945 tiling] Low performance due to no A17 workaround
+ https://bugs.freedesktop.org/show_bug.cgi?id=16835
+
+ [TV]Flicker when launching applications in the 2.4-branch
+ https://bugs.freedesktop.org/show_bug.cgi?id=17405
+
+ [945GM FBC] FBC causes underruns & flicker
+ https://bugs.freedesktop.org/show_bug.cgi?id=18651
+
+ [xv] Textured video suffers from tearing
+ https://bugs.freedesktop.org/show_bug.cgi?id=19635
+
+ [G45] Random hangs with UXA
+ https://bugs.freedesktop.org/show_bug.cgi?id=19734
+
+ [945GM] Any 3D app is slow in resolution higher than 800x600
+ with UXA+DRI2, due to tiling
+ https://bugs.freedesktop.org/show_bug.cgi?id=19738
+
+ [i915 UXA,EXA] rotation messes display with tiling on
+ https://bugs.freedesktop.org/show_bug.cgi?id=20265
+
+ [G45] DRI2/UXA gives solid white instead of transparency
+ https://bugs.freedesktop.org/show_bug.cgi?id=20321
+
+ LVDS output not detected
+ https://bugs.freedesktop.org/show_bug.cgi?id=20517
+
+ xf86-video-intel-2.6.3: Xv crashes X server
+ https://bugs.freedesktop.org/show_bug.cgi?id=20525
+
+ [G965 non-GEM] systray in KDE 4 completely broken
+ https://bugs.freedesktop.org/show_bug.cgi?id=20527
+
+ [SDVO-TV]the desktop is teared in four sections on the screen
+ https://bugs.freedesktop.org/show_bug.cgi?id=20550
+
+ Intel video driver 2.6.3 crashes with XVideo
+ https://bugs.freedesktop.org/show_bug.cgi?id=20563
+
+ [855GM] Xv crash with non-KMS
+ https://bugs.freedesktop.org/show_bug.cgi?id=20585
+
+ 2.6.99.902 breaks native 1680x1050 mode on TMDS -- EDID miss
+ https://bugs.freedesktop.org/show_bug.cgi?id=20594
+
+ [945GM TV] 2.6.99.902 sets a too high CONTRAST-value
+ https://bugs.freedesktop.org/show_bug.cgi?id=20670
+
+ [915GM] fail to detect LVDS with new VBT code
+ https://bugs.freedesktop.org/show_bug.cgi?id=20752
+
+ [regression i965]tiled output when start X
+ https://bugs.freedesktop.org/show_bug.cgi?id=20803
+
+ 2.6.99.902: LVDS wrongly detected as disconnected
+ https://bugs.freedesktop.org/show_bug.cgi?id=20826
+
+ vt switching fails and crashes X
+ https://bugs.freedesktop.org/show_bug.cgi?id=20863
+
+ [HDMI] The screen will flicker when some application runs on
+ G45-64
+ https://bugs.freedesktop.org/show_bug.cgi?id=20875
+
+ TexturedVideo is offsetted wrongly on dualhead
+ https://bugs.freedesktop.org/show_bug.cgi?id=20980
+
+ [EXA] xvideo hang X
+ https://bugs.freedesktop.org/show_bug.cgi?id=21027
+
+ [EXA] x11perf performance regression
+ https://bugs.freedesktop.org/show_bug.cgi?id=21029
+
+ And many others...
commit 506c810f8f3db89048dda9777902f142ffeb86aa
Author: Carl Worth <cworth at cworth.org>
Date: Wed Apr 15 16:10:52 2009 -0700
Clarify that the default acceleration is UXA if KMS is available.
Stale documentation considered harmful of course.
diff --git a/man/intel.man b/man/intel.man
index f85d3d1..4f8db81 100644
--- a/man/intel.man
+++ b/man/intel.man
@@ -154,7 +154,7 @@ UXA is a newer acceleration architecture built from the EXA acceleration
code but taking advantage of kernel memory management to provide simpler,
faster code.
.IP
-Default: "EXA".
+Default: "UXA" if kernel-modesetting is available, "EXA" otherwise.
.TP
.BI "Option \*qModeDebug\*q \*q" boolean \*q
Enable printing of additional debugging information about modesetting to
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 32ca6c9..48e2351 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -1604,8 +1604,11 @@ I830AccelMethodInit(ScrnInfoPtr pScrn)
* config option AccelMethod to determine which to use, defaulting to EXA
* if none is specified, or if the string was unrecognized.
*
- * All this *could* go away if we removed XAA support from this driver,
- * for example. :)
+ * Then, just to make things more confusing, the default EXA will
+ * be overridden to UXA if KMS is available. See I830DrmModeInit.
+ *
+ * All this *will* go away when we remov XAA and EXA support from
+ * this driver. (And there will be much rejoicing.)
*/
if (!(pI830->accel == ACCEL_NONE)) {
#ifdef I830_USE_UXA
commit b9716b836cb2b4569c90b81f344932ac668dc5bf
Author: Carl Worth <cworth at cworth.org>
Date: Wed Apr 15 15:39:06 2009 -0700
Add a new AUTHORS file
This is a sorted list of everyone with more than 2 commits in the git
revision history. We also list some historical authors mentioned in the
man page, (with code presumably pre-dating the beginning of revision
history).
diff --git a/AUTHORS b/AUTHORS
new file mode 100644
index 0000000..31a1da1
--- /dev/null
+++ b/AUTHORS
@@ -0,0 +1,62 @@
+Authors of xf86-video-intel (since 2003-11-14 when revision-control
+history begins, sorted roughly by number of commits, descending):
+
+Eric Anholt
+Keith Packard
+Zhenyu Wang
+Jesse Barnes
+Alan Hourihane
+Carl Worth
+Dave Airlie
+Michel Dänzer
+Zou Nan Hai
+Kristian Høgsberg
+Adam Jackson
+Nian Wu
+Xian, Haihao
+Egbert Eich
+Kevin E Martin
+Alan Coopersmith
+Hong Liu
+Julien Cristau
+Ma Ling
+Bryce Harrington
+Daniel Stone
+Kaleb Keithley
+Paulo Cesar Pereira de Andrade
+Eamon Walsh
+Matthieu Herrb
+Owain G. Ainsworth
+Søren Sandmann Pedersen
+Brice Goglin
+Ian Romanick
+Lukáš Hejtmánek
+Matthias Hopf
+Olivier Fourdan
+Robert Noland
+Rémi Cardona
+Shuang He
+Wu Fengguang
+and many others (with 1 or 2 commits)
+
+Other authors (from before revision-control history begins):
+
+Keith Whitwell
+Jonathan Bian
+Matthew J Sottek
+Jeff Hartmann
+Mark Vojkovich
+H. J. Lu
+David Dawes
+
+If the above list is missing anyone, please accept our apologies and
+let us know.
+
+The X.Org version of this driver is maintained by Intel Corporation:
+
+ http://www.intellinuxgraphics.org
+
+The X11R6 version of this driver originally came from XFree86 4.4 rc2.
+
+The XFree86 version of this driver was donated to The XFree86 Project
+by Precision Insight, Inc.; Cedar Park, TX; USA
commit 8deb3a3709a9aaa549be404566715a01246354d9
Author: Carl Worth <cworth at cworth.org>
Date: Wed Apr 15 15:38:11 2009 -0700
README: Remove almost all time-sensitive information
This was all very stale, and is better convered in intel.man. We replace
this with a list of pointers to where to get current information, (man
page, web site, and mailing list).
diff --git a/README b/README
index c91c661..8ac6e1f 100644
--- a/README
+++ b/README
@@ -1,106 +1,51 @@
-Information for Intel graphics driver users
-Eric Anholt
-2007-07-02
+xf86-video-intel
+Open-source X.org graphics driver for Intel graphics
+http://www.intellinuxgraphics.com/
-This document provides a brief summary of the Intel graphics support provided
-by the xf86-video-intel driver. More information can also be found in the
-intel(4) manual page.
+What is xf86-video-intel
+------------------------
+The xf86-video-intel module is an open-source 2D graphics driver for
+the X Window System as implemented by X.org. It supports a variety of
+Intel graphics chipsets including:
-Supported Hardware:
- i810,
- i810-dc100,
- i810e
- i815
- i830
- i845
- i852
- i855
- 915G
- 915GM
- 945G
- 945GM/GME
- 946GZ
- G965
- GM/GME965
- G33/Q33/Q35
+ i810/i810e/i810-dc100,i815,
+ i830M,845G,852GM,855GM,865M,
+ 915G/GM,945G/GM/GME,946GZ
+ G/GM/GME965,
+ G/Q33,G/Q35,G41,G/Q43
+ G/GM/Q45
-Features
-- Full support for 8, 15, 16, and 24 bit pixel depths.
-- Hardware accelerated 2D drawing engine support for 8, 15, 16 and 24 bit
- pixel depths.
-- Hardware accelerated 3D drawing using OpenGL and the DRI.
-- Hardware cursor support to reduce sprite flicker.
-- Textured video XV implementation on i915 through i965.
-- Hardware overlay XV implementation up through i945.
-- Screen resize and rotation.
+Where to get more information about the driver
+----------------------------------------------
+The primary source of information about this and other open-source
+drivers for Intel graphics is:
-Technical Notes
-- Interlace modes cannot be supported.
-- This driver requires kernel support for AGP, which is included in Linux
- kernels 2.3.42 and higher, and FreeBSD 4.1 and higher.
-- This driver may be built against xserver 1.2.0 or newer. If built
- from git source against an older server, a copy of xserver 1.3.0 source is
- needed to complete the build, which is chosen with the --with-xserver-source
- argument to ./configure. The compatibility mode with xserver 1.2.0 will have
- limited functionality, in particular by not supporting RandR 1.2 or the
- new Damage 1.1 updated needed for 3D applications to work with display
- rotation.
+ http://intellinuxgraphics.org/
-Configuration
+Documentation specific to the xf86-video-intel driver including
+possible configuration options for the xorg.conf file can be found in
+the intel(4) manual page. After installing the driver this
+documentation can be read with the following command:
-The driver auto-detects all device information necessary to
-initialize the card. The only lines you should need in the "Device"
-section of your xorg.conf file are:
+ man intel
- Section "Device"
- Identifier "intel"
- Driver "intel"
- EndSection
+Mailing list for communication with users and developers of
+xf86-video-intel:
-Please refer to the intel(4) manual page for information on configuration
-options.
+ intel-gfx at lists.freedesktop.org.
+ Note: Subscription is required before posting, but anyone is
+ free to subscribe. See instructions (and archives) here:
-Known Limitations
-- No support for "zaphod mode" dualhead. This is the mode in which two
- Device sections are placed in the config file, and doesn't support DRI or
- many other features. Instead, only "MergedFB-style" dualhead is supported.
-- No support for X Screens larger than 2048 pixels in either direction
- before the 965. This reflects hardware limitations in the x direction on
- those older chips, and limits dualhead functionality. It may be possible to
- extend the limit vertically on these older chips.
-- i855 XV may cause hangs. This was present in the previous release, and no
- workaround is known.
-- SDVO TV-out cards not supported. This should be fixed in the next
- release.
-- Gray output with integrated TV-out and PAL TVs.
-- EXA support unstable on i845.
-- Some GM965 systems, such as the Thinkpad T61, probe the TV as being connected
- even when no output connector is available. This results in the gnome-panel
- issue noted below.
+ http://lists.freedesktop.org/mailman/listinfo/intel-gfx
-Common issues not caused by the driver
-- Font sizes (DPI) are wrong. Some displays incorrectly report their
- physical size, which is harmless on most OSes that always assume 96dpi
- displays. This can be fixed through quirks for specific monitors in the X
- Server, and the output of xrandr --prop along with a physical measurement of
- the screen size in a bug report against the server can help get that fixed.
-- gnome-panel is located in the middle of the screen. gnome-panel places
- itself within head #0's boundaries, which doesn't work well with a second
- head covering the same area as head #0 but larger.
-- Older resolution-changing applications have poor results in
- multihead systems. Previous extensions such as RandR 1.1 exposed only a
- single output to client programs, and those requests map poorly to multi-head
- systems. Currently, those requests map to just one of the outputs in the
- RandR 1.2 environment, and those applications need to be updated to RandR 1.2
- API when available for better results.
+To report bugs encountered with the driver:
-The X11R6 version of this driver originally came from XFree86 4.4 rc2.
+ http://bugs.freedesktop.org
-The XFree86 version of this driver was donated to The XFree86 Project by:
- Precision Insight, Inc.
- Cedar Park, TX
- USA
+ Product: xorg
+ Component: Driver/intel
-The X.Org version of this driver is maintained by Intel Corporation.
-<http://www.intellinuxgraphics.org>
+To see bugs that are targeted to be fixed in the next release:
+
+ https://bugs.freedesktop.org/show_bug.cgi?id=intel-2d-release
commit 9b615a52671aacf34666f90ecfff98651ce6afe2
Author: Li Peng <peng.li at intel.com>
Date: Fri Apr 10 14:39:35 2009 +0800
Turn on front buffer tiling in KMS.
This code disabled front buffer tiling in KMS. Turn it on since kernel
handles all tiling now, this improves performance of x11perf -aa10text
from 97k to 286k on my 945GME.
Should help with #20761, if not totally fix it.
Acked-by: Jesse Barnes <jbarnes at virtuousgeek.org>
Signed-off-by: Li Peng <peng.li at intel.com>
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 0f8d90d..d3138d9 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -1244,8 +1244,6 @@ i830_allocate_framebuffer(ScrnInfoPtr pScrn)
tile_format = TILE_XMAJOR;
if (pI830->accel == ACCEL_XAA && IS_I965G(pI830))
tile_format = TILE_NONE;
- if (pI830->use_drm_mode)
- tile_format = TILE_NONE;
if (!IsTileable(pScrn, pitch))
tile_format = TILE_NONE;
commit 053432991c812146f6e7c6f13c6ace55385c825f
Author: Ma Ling <ling.ma at intel.com>
Date: Mon Apr 13 14:27:35 2009 +0800
update manpage for BROADCAST_RGB property
diff --git a/man/intel.man b/man/intel.man
index 6ccacda..f85d3d1 100644
--- a/man/intel.man
+++ b/man/intel.man
@@ -321,6 +321,14 @@ First DVI SDVO output
.SS "TMDS-2"
Second DVI SDVO output
+.SS "TMDS-1", "TMDS-2", "HDMI-1", "HDMI-2"
+DVI/HDMI outputs. Avaliable common properties include:
+.PP
+.B BROADCAST_RGB
+- method used to set RGB color range(full range 0-255, not full range 16-235)
+.TP 2
+Adjusting this propertie allows you to set RGB color range on each channel in order to match HDTV requirment(default 0 for full range). Setting 1 means RGB color range is 16-235, 0 means RGB color range is 0-255 on each channel.
+
.PP
SDVO and DVO TV outputs are not supported by the driver at this time.
commit 62ba7211fe9b6aada125ebfe34cf7161e817ad6b
Author: Ma Ling <ling.ma at intel.com>
Date: Mon Apr 13 14:24:57 2009 +0800
set broadcast RGB mode for integrated HDMI output.
diff --git a/src/i830_hdmi.c b/src/i830_hdmi.c
index 05aa9ac..0abb151 100644
--- a/src/i830_hdmi.c
+++ b/src/i830_hdmi.c
@@ -33,6 +33,7 @@
#include "i830.h"
#include "xf86Modes.h"
#include "i830_display.h"
+#include "X11/Xatom.h"
struct i830_hdmi_priv {
uint32_t output_reg;
@@ -40,8 +41,12 @@ struct i830_hdmi_priv {
uint32_t save_SDVO;
Bool has_hdmi_sink;
+ /* Default 0 for full RGB range 0-255, 1 is for RGB range 16-235 */
+ uint32_t broadcast_rgb;
};
+static Atom broadcast_atom;
+
static int
i830_hdmi_mode_valid(xf86OutputPtr output, DisplayModePtr mode)
{
@@ -214,7 +219,91 @@ i830_hdmi_destroy (xf86OutputPtr output)
}
}
+static void
+i830_hdmi_create_resources(xf86OutputPtr output)
+{
+ ScrnInfoPtr pScrn = output->scrn;
+ I830Ptr pI830 = I830PTR(pScrn);
+ I830OutputPrivatePtr intel_output = output->driver_private;
+ struct i830_hdmi_priv *dev_priv = intel_output->dev_priv;
+ INT32 broadcast_range[2];
+ int err;
+
+ /* only R G B are 8bit color mode */
+ if (pScrn->depth != 24 ||
+ /* only 965G and G4X platform */
+ !(IS_I965G(pI830) || IS_G4X(pI830)))
+ return;
+
+ broadcast_atom =
+ MakeAtom("BROADCAST_RGB", sizeof("BROADCAST_RGB") - 1, TRUE);
+
+ broadcast_range[0] = 0;
+ broadcast_range[1] = 1;
+ err = RRConfigureOutputProperty(output->randr_output,
+ broadcast_atom,
+ FALSE, TRUE, FALSE, 2, broadcast_range);
+ if (err != 0) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "RRConfigureOutputProperty error, %d\n", err);
+ return;
+ }
+ /* Set the current value of the broadcast property as full range */
+ dev_priv->broadcast_rgb = 0;
+ err = RRChangeOutputProperty(output->randr_output,
+ broadcast_atom,
+ XA_INTEGER, 32, PropModeReplace,
+ 1, &dev_priv->broadcast_rgb,
+ FALSE, TRUE);
+ if (err != 0) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "RRChangeOutputProperty error, %d\n", err);
+ return;
+ }
+}
+
+static Bool
+i830_hdmi_set_property(xf86OutputPtr output, Atom property,
+ RRPropertyValuePtr value)
+{
+ ScrnInfoPtr pScrn = output->scrn;
+ I830Ptr pI830 = I830PTR(pScrn);
+ I830OutputPrivatePtr intel_output = output->driver_private;
+ struct i830_hdmi_priv *dev_priv = intel_output->dev_priv;
+ uint32_t temp;
+
+ if (property == broadcast_atom) {
+ uint32_t val;
+
+ if (value->type != XA_INTEGER || value->format != 32 ||
+ value->size != 1)
+ {
+ return FALSE;
+ }
+
+ val = *(INT32 *)value->data;
+ if (val < 0 || val > 1)
+ {
+ return FALSE;
+ }
+ if (val == dev_priv->broadcast_rgb)
+ return TRUE;
+
+ temp = INREG(dev_priv->output_reg);
+
+ if (val == 1)
+ temp |= SDVO_COLOR_NOT_FULL_RANGE;
+ else if (val == 0)
+ temp &= ~SDVO_COLOR_NOT_FULL_RANGE;
+
+ OUTREG(dev_priv->output_reg, temp);
+ dev_priv->broadcast_rgb = val;
+ }
+ return TRUE;
+}
+
static const xf86OutputFuncsRec i830_hdmi_output_funcs = {
+ .create_resources = i830_hdmi_create_resources,
.dpms = i830_hdmi_dpms,
.save = i830_hdmi_save,
.restore = i830_hdmi_restore,
@@ -225,6 +314,7 @@ static const xf86OutputFuncsRec i830_hdmi_output_funcs = {
.commit = i830_output_commit,
.detect = i830_hdmi_detect,
.get_modes = i830_ddc_get_modes,
+ .set_property = i830_hdmi_set_property,
.destroy = i830_hdmi_destroy
};
commit 69388953ce889080d5f014123d89bf3eb45f3d8d
Author: Ma Ling <ling.ma at intel.com>
Date: Mon Apr 13 14:23:06 2009 +0800
set broadcast RGB mode for HDMI and TMDS from SDVOX output
Almost all digital TVs accept broadcast RGB values from 16 to 235 for each channel,
otherwise for those uncompensated videos, when RGB values are set from 0 to 255,
they will shows black and whiter clamping, which seriously degrades picture quality.
The patch will enable the broadcast RGB mode for hdtv according to user's setting.
It fixed bug #14486
diff --git a/src/i810_reg.h b/src/i810_reg.h
index 59b6079..d5d41b3 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -1300,6 +1300,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define SDVO_ENCODING_HDMI (0x2 << 10)
/** Requird for HDMI operation */
#define SDVO_NULL_PACKETS_DURING_VSYNC (1 << 9)
+#define SDVO_COLOR_NOT_FULL_RANGE (1 << 8)
#define SDVO_BORDER_ENABLE (1 << 7)
#define SDVO_AUDIO_ENABLE (1 << 6)
/** New with 965, default is to be set */
diff --git a/src/i830_sdvo.c b/src/i830_sdvo.c
index a7b5171..29ccd4e 100644
--- a/src/i830_sdvo.c
+++ b/src/i830_sdvo.c
@@ -49,6 +49,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "i830_display.h"
#include "i810_reg.h"
#include "i830_sdvo_regs.h"
+#include "X11/Xatom.h"
/** SDVO driver private structure. */
struct i830_sdvo_priv {
@@ -110,6 +111,8 @@ struct i830_sdvo_priv {
/** DDC bus used by this SDVO output */
uint8_t ddc_bus;
+ /* Default 0 for full RGB range 0-255, 1 is for RGB range 16-235 */
+ uint32_t broadcast_rgb;
/** State for save/restore */
/** @{ */
@@ -121,6 +124,8 @@ struct i830_sdvo_priv {
/** @} */
};
+static Atom broadcast_atom;
+
/**
* Writes the SDVOB or SDVOC with the given value, but always writes both
* SDVOB and SDVOC to work around apparent hardware issues (according to
@@ -1927,7 +1932,94 @@ i830_sdvo_get_crtc(xf86OutputPtr output)
}
#endif
+static void
+i830_sdvo_create_resources(xf86OutputPtr output)
+{
+ ScrnInfoPtr pScrn = output->scrn;
+ I830Ptr pI830 = I830PTR(pScrn);
+ I830OutputPrivatePtr intel_output = output->driver_private;
+ struct i830_sdvo_priv *dev_priv = intel_output->dev_priv;
+ INT32 broadcast_range[2];
+ int err;
+
+ /* only R G B are 8bit color mode */
+ if (pScrn->depth != 24 ||
+ /* only 965G and G4X platform */
+ !(IS_I965G(pI830) || IS_G4X(pI830)) ||
+ /* only TMDS encoding */
+ !(strstr(output->name, "TMDS") || strstr(output->name, "HDMI")))
+ return;
+
+ broadcast_atom =
+ MakeAtom("BROADCAST_RGB", sizeof("BROADCAST_RGB") - 1, TRUE);
+
+ broadcast_range[0] = 0;
+ broadcast_range[1] = 1;
+ err = RRConfigureOutputProperty(output->randr_output,
+ broadcast_atom,
+ FALSE, TRUE, FALSE, 2, broadcast_range);
+ if (err != 0) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "RRConfigureOutputProperty error, %d\n", err);
+ return;
+ }
+ /* Set the current value of the broadcast property as full range */
+ dev_priv->broadcast_rgb = 0;
+ err = RRChangeOutputProperty(output->randr_output,
+ broadcast_atom,
+ XA_INTEGER, 32, PropModeReplace,
+ 1, &dev_priv->broadcast_rgb,
+ FALSE, TRUE);
+ if (err != 0) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "RRChangeOutputProperty error, %d\n", err);
+ return;
+ }
+}
+
+static Bool
+i830_sdvo_set_property(xf86OutputPtr output, Atom property,
+ RRPropertyValuePtr value)
+{
+ ScrnInfoPtr pScrn = output->scrn;
+ I830Ptr pI830 = I830PTR(pScrn);
+ I830OutputPrivatePtr intel_output = output->driver_private;
+ struct i830_sdvo_priv *dev_priv = intel_output->dev_priv;
+ uint32_t temp;
+
+ if (property == broadcast_atom) {
+ uint32_t val;
+
+ if (value->type != XA_INTEGER || value->format != 32 ||
+ value->size != 1)
+ {
+ return FALSE;
+ }
+
+ val = *(INT32 *)value->data;
+ if (val < 0 || val > 1)
+ {
+ return FALSE;
+ }
+ if (val == dev_priv->broadcast_rgb)
+ return TRUE;
+
+ temp = INREG(dev_priv->output_device);
+
+ if (val == 1)
+ temp |= SDVO_COLOR_NOT_FULL_RANGE;
+ else if (val == 0)
+ temp &= ~SDVO_COLOR_NOT_FULL_RANGE;
+
+ i830_sdvo_write_sdvox(output, temp);
+
+ dev_priv->broadcast_rgb = val;
+ }
+ return TRUE;
+}
+
static const xf86OutputFuncsRec i830_sdvo_output_funcs = {
+ .create_resources = i830_sdvo_create_resources,
.dpms = i830_sdvo_dpms,
.save = i830_sdvo_save,
.restore = i830_sdvo_restore,
@@ -1938,6 +2030,7 @@ static const xf86OutputFuncsRec i830_sdvo_output_funcs = {
.commit = i830_output_commit,
.detect = i830_sdvo_detect,
.get_modes = i830_sdvo_get_modes,
+ .set_property = i830_sdvo_set_property,
.destroy = i830_sdvo_destroy,
#ifdef RANDR_GET_CRTC_INTERFACE
.get_crtc = i830_sdvo_get_crtc,
commit 6d345c49f693cc5cffaa00b94559d2afcb3a0864
Author: Carl Worth <cworth at cworth.org>
Date: Fri Apr 10 14:07:14 2009 -0700
Add a RELEASING file documenting the release process
Thanks to Jesse Barnes for the original recipe.
diff --git a/RELEASING b/RELEASING
new file mode 100644
index 0000000..c4006c3
--- /dev/null
+++ b/RELEASING
@@ -0,0 +1,32 @@
+The process for releasing a new tarball is as follows:
+
+1. make sure you have the latest build requirements installed:
+
+ git://git.freedesktop.org/git/util/macros
+ git://git.freedesktop.org/git/util/modular
+
+2. update your module version (usually found in configure.ac)
+
+ $ vi configure.ac # bump version
+ $ git push origin # make sure you're on the release branch
+
+3. verify your module builds
+
+ $ make distcheck
+
+4. tag the release
+
+ $ git tag -m "Intel <ver> release" xf86-video-intel-<ver>
+
+5. run the release script (this should push the tag)
+
+ $ <path_to>/util/modular/release.sh driver xf86-video-intel-<last_ver> xf86-video-intel-<ver>
+
+6. edit the generated release message as needed and send it out
+
+ for major releases list added features and known limitations
+
+ for minor releases indicate which bugs were fixed and which
+ are still present
+
+7. throw a release party, you're done! :)
commit 7e516b6d24d8c0c6549a9a60fcf487e3a1615020
Author: Jesse Barnes <jbarnes at jbarnes-acer.(none)>
Date: Wed Apr 8 16:38:08 2009 -0700
Silence warning in i830_dmi_store_field
Just add a dummy ret variable to shut up gcc.
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index 78292f7..81ea3c2 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -70,12 +70,13 @@ static char *i830_dmi_data[dmi_data_max];
static void i830_dmi_store_##field(void) \
{\
FILE *f = NULL;\
+ int ret;\
f = fopen(DMIID_FILE(field), "r");\
if (f == NULL) {\
xfree(i830_dmi_data[field]); i830_dmi_data[field] = NULL;\
return;\
}\
- fread(i830_dmi_data[field], 64, 1, f);\
+ ret = fread(i830_dmi_data[field], 64, 1, f); \
fclose(f);\
}
commit 620e97bbd6a811ad69b8ac94df1fe2c9edf65549
Author: Jesse Barnes <jbarnes at virtuousgeek.org>
Date: Wed Apr 8 15:49:00 2009 -0700
Don't enable kernel execbuf fencing w/EXA
If we enable kernel execbuf fence register management, it's best if the
kernel manages all fence registers. This works fine if the accel
method is managing pixmaps or doesn't use offscreen pixmaps. However
with EXA, pixmap accesses are done relative to the framebuffer BAR
mapping (pI830->FbBase) and the Screen pixmap address. So if we try to
set the screen pixmap to point at a GTT mapped (and therefore properly
fenced) address, later calls to intel_get_pixmap_offset() will call
into EXA, which will use the pseudo-random pixmap addr and the EXA
offscreen base addr (which is really just FbBase) to calculate the
offset. This will fail. So disable kernel fence reg management in the
EXA case (this is easier than adding proper EXA pixmap management to
xf86-video-intel, and makes more sense since we'll be removing EXA soon
anyway).
Fixes FDO #21027.
Also happens to fix FDO #21029 (as tested by Carl Worth <cworth at cworth.org).
diff --git a/src/i830_memory.c b/src/i830_memory.c
index e3314c5..0f8d90d 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -533,14 +533,15 @@ i830_allocator_init(ScrnInfoPtr pScrn, unsigned long offset, unsigned long size)
struct drm_i915_gem_init init;
int ret;
- sp.param = I915_SETPARAM_NUM_USED_FENCES;
- sp.value = 0; /* kernel gets them all */
-
- ret = drmCommandWrite(pI830->drmSubFD, DRM_I915_SETPARAM, &sp,
- sizeof(sp));
- if (ret == 0)
- pI830->kernel_exec_fencing = TRUE;
-
+ if (pI830->accel == ACCEL_UXA) {
+ sp.param = I915_SETPARAM_NUM_USED_FENCES;
+ sp.value = 0; /* kernel gets them all */
+
+ ret = drmCommandWrite(pI830->drmSubFD, DRM_I915_SETPARAM,
+ &sp, sizeof(sp));
+ if (ret == 0)
+ pI830->kernel_exec_fencing = TRUE;
+ }
init.gtt_start = pI830->memory_manager->offset;
init.gtt_end = pI830->memory_manager->offset +
pI830->memory_manager->size;
commit 0a0731c11d10392cdc55ecc04e4e3575c8b3fe57
Author: Shuang He <shuang.he at intel.com>
Date: Tue Apr 7 12:31:07 2009 -0700
Fix value for MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW
Since the change to scan-line based video sync, (rather than vblank-
based), we've only been getting tear-free video on one of the two
pipes. This fixes that bug by using the correct constant for waiting
on PIPEA.
diff --git a/src/i810_reg.h b/src/i810_reg.h
index 102097c..59b6079 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -2443,7 +2443,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define MI_WAIT_FOR_PIPEB_VBLANK (1<<7)
#define MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW (1<<5)
#define MI_WAIT_FOR_PIPEA_VBLANK (1<<3)
-#define MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW (1<<2)
+#define MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW (1<<1)
/* Set the scan line for MI_WAIT_FOR_PIPE?_SCAN_LINE_WINDOW */
#define MI_LOAD_SCAN_LINES_INCL (0x12<<23)
commit 940c2aad4d174b6609bdc49f8c99a4bc37926516
Author: Carl Worth <cworth at cworth.org>
Date: Mon Apr 6 14:36:33 2009 -0700
Don't clip video to CRTC in the case of textured video
Since we're not limited by a single overlay plane on a single pipe,
we want to not clip at all, (so that the correct video appears on
both pipes).
This fixes bug #20980 which shows a video spanning two pipes
being rendered incorrectly.
diff --git a/src/i830_video.c b/src/i830_video.c
index 13f3ab1..4ed3047 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -2146,7 +2146,8 @@ i830_clip_video_helper (ScrnInfoPtr pScrn,
pPriv->desired_crtc,
&crtc_box);
- if (crtc)
+ /* For textured video, we don't actually want to clip at all. */
+ if (crtc && !pPriv->textured)
{
REGION_INIT (pScreen, &crtc_region_local, &crtc_box, 1);
crtc_region = &crtc_region_local;
commit 63b4b5efac936c674dedad8125a8dbac4f000908
Author: Zhenyu Wang <zhenyu.z.wang at intel.com>
Date: Tue Apr 7 10:53:08 2009 +0800
quirk LVDS on ibase MB890 855GM board
fix bug #19529
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index 8680baf..78292f7 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -236,6 +236,17 @@ static void quirk_msi_lvds_dmi (I830Ptr pI830)
}
}
+static void quirk_ibase_lvds (I830Ptr pI830)
+{
+ if (!i830_dmi_data[board_name]) {
+ ErrorF("Failed to load DMI info, iBase LVDS quirk not applied.\n");
+ return;
+ }
+ if (!strncmp(i830_dmi_data[board_name], "i855-W83627HF", 13)) {
+ pI830->quirk_flag |= QUIRK_IGNORE_LVDS;
+ }
+}
+
static void quirk_ivch_dvob (I830Ptr pI830)
{
pI830->quirk_flag |= QUIRK_IVCH_NEED_DVOB;
@@ -379,6 +390,9 @@ static i830_quirk i830_quirk_list[] = {
/* #19239: Mirrus Centrino laptop */
{ PCI_CHIP_I915_GM, 0x1584, 0x9800, quirk_broken_acpi_lid },
+ /* #19529: iBase MB890 board */
+ { PCI_CHIP_I855_GM, 0x8086, 0x3582, quirk_ibase_lvds },
+
{ 0, 0, 0, NULL },
};
commit 5d9d9a2e466474a0508a15b294a91507ccb3ccc1
Author: Carl Worth <cworth at cworth.org>
Date: Mon Apr 6 14:02:08 2009 -0700
Fix new video sync-to-blank code for multi-head
We need to account for a non-zero Y offset for the CRTC. Without
this, we don't sync to the correct region, so tearing becomes
visible again.
diff --git a/src/i830_video.c b/src/i830_video.c
index 3331dd3..13f3ab1 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -2517,6 +2517,7 @@ I830PutImage(ScrnInfoPtr pScrn,
if (sync) {
BoxPtr box;
+ int y1, y2;
int event, pipe;
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
@@ -2529,14 +2530,16 @@ I830PutImage(ScrnInfoPtr pScrn,
}
box = REGION_EXTENTS(unused, clipBoxes);
+ y1 = box->y1 - crtc->y;
+ y2 = box->y2 - crtc->y;
BEGIN_BATCH(5);
/* The documentation says that the LOAD_SCAN_LINES command
* always comes in pairs. Don't ask me why. */
OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | pipe);
- OUT_BATCH((box->y1 << 16) | box->y2);
+ OUT_BATCH((y1 << 16) | y2);
OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | pipe);
- OUT_BATCH((box->y1 << 16) | box->y2);
+ OUT_BATCH((y1 << 16) | y2);
OUT_BATCH(MI_WAIT_FOR_EVENT | event);
ADVANCE_BATCH();
}
commit 6e76c2ac802950b25e0de2bb34448323f5c768f5
Merge: c307a62... 3d4ee3c...
Author: Keith Packard <keithp at keithp.com>
Date: Mon Apr 6 11:40:30 2009 -0700
Merge commit 'origin/master' into display-port
commit 3d4ee3cac1d63dfdf7b54c8ba577f3b77637499f
Author: Carl Worth <cworth at cworth.org>
Date: Mon Apr 6 11:31:20 2009 -0700
Remove support for 'auto'(-1) value of XV_SYNC_TO_VBLANK
We previously had a heurstic here where we would only sync to vblank
for windows that covered more than 25% of the screen. We don't need
this anymore since the new approach to sync, (WAIT_FOR_SCANLINE_WINDOW),
is not excessively costly for small windows.
diff --git a/man/intel.man b/man/intel.man
index ffe69a1..6ccacda 100644
--- a/man/intel.man
+++ b/man/intel.man
@@ -451,10 +451,11 @@ You can use the "xvattr" tool to query/set those attributes at runtime.
.SS "XV_SYNC_TO_VBLANK"
XV_SYNC_TO_VBLANK is used to control whether textured adapter synchronizes
-the screen update to the vblank to eliminate tearing. It has three
-values 'auto'(-1), 'off'(0) and 'on(1). 'off' means never sync, 'on' means
-always sync, no matter what size, and 'auto' means sync if the Xv image is
-more than quarter of the pixels on the screen. The default is 'auto'(-1).
+the screen update to the vblank to eliminate tearing. It is a Boolean
+attribute with values of 0 (never sync) or 1 (always sync). An historic
+value of -1 (sync for large windows only) will now be interpreted as 1,
+(since the current approach for sync is not costly even with small
+video windows).
.SS "XV_BRIGHTNESS"
diff --git a/src/i830_video.c b/src/i830_video.c
index 3dde5b4..3331dd3 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -1019,7 +1019,7 @@ I830SetupImageVideoTextured(ScreenPtr pScreen)
pPriv->doubleBuffer = 0;
pPriv->rotation = RR_Rotate_0;
- pPriv->SyncToVblank = -1;
+ pPriv->SyncToVblank = 1;
/* gotta uninit this someplace, XXX: shouldn't be necessary for textured */
REGION_NULL(pScreen, &pPriv->clip);
@@ -2513,23 +2513,6 @@ I830PutImage(ScrnInfoPtr pScrn,
sync = FALSE;
} else if (pPriv->SyncToVblank == 0) {
sync = FALSE;
- } else if (pPriv->SyncToVblank == -1) {
- BoxRec crtc_box;
- BoxPtr pbox;
- int nbox, crtc_area, coverage = 0;
-
- i830_crtc_box(crtc, &crtc_box);
- crtc_area = i830_box_area(&crtc_box);
- pbox = REGION_RECTS(clipBoxes);
- nbox = REGION_NUM_RECTS(clipBoxes);
-
- while (nbox--) {
- coverage += i830_box_area(pbox);
- pbox++;
- }
-
- if ((coverage << 2) < crtc_area)
- sync = FALSE;
}
if (sync) {
commit bc3312fd7c03d09a231dfebfe390fe668ad15d1e
Author: Carl Worth <cworth at cworth.org>
Date: Mon Apr 6 11:16:40 2009 -0700
Use WAIT_FOR_SCAN_LINE instead of WAIT_FOR_VBLANK
Either way, the goal is tear-free video playing. But waiting for
a scan-line window not only has the advantage of being cheaper
for small windows, but also avoids hanging the GPU in the case
of the pipe getting turned off, (by screensaver, for example),
while a batch is waiting for a VBLANK that will never occur.
This fixes that GPU hang.
diff --git a/src/i810_reg.h b/src/i810_reg.h
index bc462fa..102097c 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -2436,12 +2436,19 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define MI_OVERLAY_FLIP_OFF (2<<21)
/* Wait for Events */
-#define MI_WAIT_FOR_EVENT (0x03<<23)
-#define MI_WAIT_FOR_PIPEB_SVBLANK (1<<18)
-#define MI_WAIT_FOR_PIPEA_SVBLANK (1<<17)
-#define MI_WAIT_FOR_OVERLAY_FLIP (1<<16)
-#define MI_WAIT_FOR_PIPEB_VBLANK (1<<7)
-#define MI_WAIT_FOR_PIPEA_VBLANK (1<<3)
+#define MI_WAIT_FOR_EVENT (0x03<<23)
+#define MI_WAIT_FOR_PIPEB_SVBLANK (1<<18)
+#define MI_WAIT_FOR_PIPEA_SVBLANK (1<<17)
+#define MI_WAIT_FOR_OVERLAY_FLIP (1<<16)
+#define MI_WAIT_FOR_PIPEB_VBLANK (1<<7)
+#define MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW (1<<5)
+#define MI_WAIT_FOR_PIPEA_VBLANK (1<<3)
+#define MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW (1<<2)
+
+/* Set the scan line for MI_WAIT_FOR_PIPE?_SCAN_LINE_WINDOW */
+#define MI_LOAD_SCAN_LINES_INCL (0x12<<23)
+#define MI_LOAD_SCAN_LINES_DISPLAY_PIPEA (0)
+#define MI_LOAD_SCAN_LINES_DISPLAY_PIPEB (0x1<<20)
/* Flush */
#define MI_FLUSH (0x04<<23)
diff --git a/src/i830_video.c b/src/i830_video.c
index 3f3aaac..3dde5b4 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -2533,24 +2533,28 @@ I830PutImage(ScrnInfoPtr pScrn,
}
if (sync) {
- I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
- int event;
-
- if (IS_I965G(pI830)) {
- if (intel_crtc->pipe == 0)
- event = MI_WAIT_FOR_PIPEA_SVBLANK;
- else
- event = MI_WAIT_FOR_PIPEB_SVBLANK;
- } else {
- if (intel_crtc->pipe == 0)
- event = MI_WAIT_FOR_PIPEA_VBLANK;
- else
- event = MI_WAIT_FOR_PIPEB_VBLANK;
- }
+ BoxPtr box;
+ int event, pipe;
+ I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
+
+ if (intel_crtc->pipe == 0) {
+ event = MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW;
+ pipe = MI_LOAD_SCAN_LINES_DISPLAY_PIPEA;
+ } else {
+ event = MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW;
+ pipe = MI_LOAD_SCAN_LINES_DISPLAY_PIPEB;
+ }
+
+ box = REGION_EXTENTS(unused, clipBoxes);
- BEGIN_BATCH(2);
+ BEGIN_BATCH(5);
+ /* The documentation says that the LOAD_SCAN_LINES command
+ * always comes in pairs. Don't ask me why. */
+ OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | pipe);
+ OUT_BATCH((box->y1 << 16) | box->y2);
+ OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | pipe);
+ OUT_BATCH((box->y1 << 16) | box->y2);
OUT_BATCH(MI_WAIT_FOR_EVENT | event);
- OUT_BATCH(MI_NOOP);
ADVANCE_BATCH();
}
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