xf86-video-ati: Branch 'r6xx-r7xx-support'

[Alex Deucher]

 src/r600_textured_videofuncs.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

New commits:
commit 8ce6c024e31f6a3f5ae6c882738b1e64ae2944a1
Author: Alex Deucher <alexdeucher at gmail.com>
Date:   Sat Feb 7 10:32:01 2009 -0500

    R6xx/R7xx Xv: fix typos in cache flushing commands

diff --git a/src/r600_textured_videofuncs.c b/src/r600_textured_videofuncs.c
index b1cd4f1..5941899 100644
--- a/src/r600_textured_videofuncs.c
+++ b/src/r600_textured_videofuncs.c
@@ -145,7 +145,7 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
     accel_state->src_size[0] = exaGetPixmapPitch(pPixmap) * pPriv->w;
 
     /* flush texture cache */
-    cp_set_surface_sync(pScrn, accel_state->ib, TC_ACTION_ENA_bit, 512,
+    cp_set_surface_sync(pScrn, accel_state->ib, TC_ACTION_ENA_bit, accel_state->src_size[0],
 			accel_state->src_mc_addr[0]);
 
     // Y texture
@@ -365,7 +365,7 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
     wait_3d_idle_clean(pScrn, accel_state->ib);
 
     /* sync destination surface */
-    cp_set_surface_sync(pScrn, accel_state->ib, (CB_ACTION_ENA_bit, CB0_DEST_BASE_ENA_bit),
+    cp_set_surface_sync(pScrn, accel_state->ib, (CB_ACTION_ENA_bit | CB0_DEST_BASE_ENA_bit),
 			accel_state->dst_size, accel_state->dst_mc_addr);
 
     R600CPFlushIndirect(pScrn, accel_state->ib);