xf86-video-ati: Branch 'r6xx-r7xx-support'
Alex Deucher
agd5f at kemper.freedesktop.org
Wed Feb 11 14:41:22 PST 2009
src/r600_exa.c | 22 +------
src/r600_textured_videofuncs.c | 117 +++++++++++++++++++----------------------
2 files changed, 60 insertions(+), 79 deletions(-)
New commits:
commit 3e5ac32f747bef70903e9cdf41652a827eece707
Author: Alex Deucher <alexdeucher at gmail.com>
Date: Wed Feb 11 17:40:20 2009 -0500
Revert "R6xx/R7xx: handle running out of vertex buffer space"
This reverts commit 4fd7228de7ad88edf825dbc3039df877795a9479.
Causes lockups.
diff --git a/src/r600_exa.c b/src/r600_exa.c
index 542d42d..8ae5b53 100644
--- a/src/r600_exa.c
+++ b/src/r600_exa.c
@@ -41,12 +41,6 @@
extern PixmapPtr
RADEONGetDrawablePixmap(DrawablePtr pDrawable);
-static void
-R600DoneSolid(PixmapPtr pPix);
-
-static void
-R600DoneComposite(PixmapPtr pDst);
-
//#define SHOW_VERTEXES
# define RADEON_ROP3_ZERO 0x00000000
@@ -270,9 +264,7 @@ R600Solid(PixmapPtr pPix, int x1, int y1, int x2, int y2)
if (((accel_state->vb_index + 3) * 8) > (accel_state->ib->total / 2)) {
ErrorF("Solid: Ran out of VB space!\n");
- R600DoneSolid(pPix);
- accel_state->ib = RADEONCPGetBuffer(pScrn);
- accel_state->vb_index = 0;
+ return;
}
vertex[0].x = (float)x1;
@@ -615,9 +607,7 @@ R600AppendCopyVertex(ScrnInfoPtr pScrn,
if (((accel_state->vb_index + 3) * 16) > (accel_state->ib->total / 2)) {
ErrorF("Copy: Ran out of VB space!\n");
- R600DoCopy(pScrn);
- accel_state->ib = RADEONCPGetBuffer(pScrn);
- accel_state->vb_index = 0;
+ return;
}
vertex[0].x = (float)dstX;
@@ -1923,9 +1913,7 @@ static void R600Composite(PixmapPtr pDst,
if (((accel_state->vb_index + 3) * 24) > (accel_state->ib->total / 2)) {
ErrorF("Composite: Ran out of VB space!\n");
- R600DoneComposite(pDst);
- accel_state->ib = RADEONCPGetBuffer(pScrn);
- accel_state->vb_index = 0;
+ return;
}
maskTopLeft.x = IntToxFixed(maskX);
@@ -1986,9 +1974,7 @@ static void R600Composite(PixmapPtr pDst,
if (((accel_state->vb_index + 3) * 16) > (accel_state->ib->total / 2)) {
ErrorF("Composite: Ran out of VB space!\n");
- R600DoneComposite(pDst);
- accel_state->ib = RADEONCPGetBuffer(pScrn);
- accel_state->vb_index = 0;
+ return;
}
vertex[0].x = (float)dstX;
diff --git a/src/r600_textured_videofuncs.c b/src/r600_textured_videofuncs.c
index c06512a..aca6412 100644
--- a/src/r600_textured_videofuncs.c
+++ b/src/r600_textured_videofuncs.c
@@ -44,63 +44,6 @@
#include "damage.h"
-static void
-R600DoneXv(ScrnInfoPtr pScrn)
-{
- RADEONInfoPtr info = RADEONPTR(pScrn);
- struct radeon_accel_state *accel_state = info->accel_state;
- draw_config_t draw_conf;
- vtx_resource_t vtx_res;
-
- CLEAR (draw_conf);
- CLEAR (vtx_res);
-
- accel_state->vb_mc_addr = info->gartLocation + info->dri->bufStart +
- (accel_state->ib->idx * accel_state->ib->total) + (accel_state->ib->total / 2);
- accel_state->vb_size = accel_state->vb_index * 16;
-
- /* flush vertex cache */
- if ((info->ChipFamily == CHIP_FAMILY_RV610) ||
- (info->ChipFamily == CHIP_FAMILY_RV620) ||
- (info->ChipFamily == CHIP_FAMILY_RS780) ||
- (info->ChipFamily == CHIP_FAMILY_RV710))
- cp_set_surface_sync(pScrn, accel_state->ib, TC_ACTION_ENA_bit,
- accel_state->vb_size, accel_state->vb_mc_addr);
- else
- cp_set_surface_sync(pScrn, accel_state->ib, VC_ACTION_ENA_bit,
- accel_state->vb_size, accel_state->vb_mc_addr);
-
- /* Vertex buffer setup */
- vtx_res.id = SQ_VTX_RESOURCE_vs;
- vtx_res.vtx_size_dw = 16 / 4;
- vtx_res.vtx_num_entries = accel_state->vb_size / 4;
- vtx_res.mem_req_size = 1;
- vtx_res.vb_addr = accel_state->vb_mc_addr;
- set_vtx_resource (pScrn, accel_state->ib, &vtx_res);
-
- draw_conf.prim_type = DI_PT_RECTLIST;
- draw_conf.vgt_draw_initiator = DI_SRC_SEL_AUTO_INDEX;
- draw_conf.num_instances = 1;
- draw_conf.num_indices = vtx_res.vtx_num_entries / vtx_res.vtx_size_dw;
- draw_conf.index_type = DI_INDEX_SIZE_16_BIT;
-
- ereg (accel_state->ib, VGT_INSTANCE_STEP_RATE_0, 0); /* ? */
- ereg (accel_state->ib, VGT_INSTANCE_STEP_RATE_1, 0);
-
- ereg (accel_state->ib, VGT_MAX_VTX_INDX, draw_conf.num_indices);
- ereg (accel_state->ib, VGT_MIN_VTX_INDX, 0);
- ereg (accel_state->ib, VGT_INDX_OFFSET, 0);
-
- draw_auto(pScrn, accel_state->ib, &draw_conf);
-
- wait_3d_idle_clean(pScrn, accel_state->ib);
-
- /* sync destination surface */
- cp_set_surface_sync(pScrn, accel_state->ib, (CB_ACTION_ENA_bit | CB0_DEST_BASE_ENA_bit),
- accel_state->dst_size, accel_state->dst_mc_addr);
-
- R600CPFlushIndirect(pScrn, accel_state->ib);
-}
void
R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
@@ -115,6 +58,8 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
tex_resource_t tex_res;
tex_sampler_t tex_samp;
shader_config_t vs_conf, ps_conf;
+ draw_config_t draw_conf;
+ vtx_resource_t vtx_res;
int uv_offset;
static float ps_alu_consts[] = {
@@ -135,6 +80,8 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
CLEAR (tex_samp);
CLEAR (vs_conf);
CLEAR (ps_conf);
+ CLEAR (draw_conf);
+ CLEAR (vtx_res);
accel_state->dst_pitch = exaGetPixmapPitch(pPixmap) / (pPixmap->drawable.bitsPerPixel / 8);
accel_state->src_pitch[0] = pPriv->src_pitch;
@@ -469,9 +416,7 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
if (((accel_state->vb_index + 3) * 16) > (accel_state->ib->total / 2)) {
ErrorF("Xv: Ran out of VB space!\n");
- R600DoneXv(pScrn);
- accel_state->ib = RADEONCPGetBuffer(pScrn);
- accel_state->vb_index = 0;
+ break;
}
dstX = pBox->x1 + dstxoff;
@@ -516,7 +461,57 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
pBox++;
}
- R600DoneXv(pScrn);
+ if (accel_state->vb_index == 0) {
+ R600IBDiscard(pScrn, accel_state->ib);
+ DamageDamageRegion(pPriv->pDraw, &pPriv->clip);
+ return;
+ }
+
+ accel_state->vb_mc_addr = info->gartLocation + info->dri->bufStart +
+ (accel_state->ib->idx * accel_state->ib->total) + (accel_state->ib->total / 2);
+ accel_state->vb_size = accel_state->vb_index * 16;
+
+ /* flush vertex cache */
+ if ((info->ChipFamily == CHIP_FAMILY_RV610) ||
+ (info->ChipFamily == CHIP_FAMILY_RV620) ||
+ (info->ChipFamily == CHIP_FAMILY_RS780) ||
+ (info->ChipFamily == CHIP_FAMILY_RV710))
+ cp_set_surface_sync(pScrn, accel_state->ib, TC_ACTION_ENA_bit,
+ accel_state->vb_size, accel_state->vb_mc_addr);
+ else
+ cp_set_surface_sync(pScrn, accel_state->ib, VC_ACTION_ENA_bit,
+ accel_state->vb_size, accel_state->vb_mc_addr);
+
+ /* Vertex buffer setup */
+ vtx_res.id = SQ_VTX_RESOURCE_vs;
+ vtx_res.vtx_size_dw = 16 / 4;
+ vtx_res.vtx_num_entries = accel_state->vb_size / 4;
+ vtx_res.mem_req_size = 1;
+ vtx_res.vb_addr = accel_state->vb_mc_addr;
+ set_vtx_resource (pScrn, accel_state->ib, &vtx_res);
+
+ draw_conf.prim_type = DI_PT_RECTLIST;
+ draw_conf.vgt_draw_initiator = DI_SRC_SEL_AUTO_INDEX;
+ draw_conf.num_instances = 1;
+ draw_conf.num_indices = vtx_res.vtx_num_entries / vtx_res.vtx_size_dw;
+ draw_conf.index_type = DI_INDEX_SIZE_16_BIT;
+
+ ereg (accel_state->ib, VGT_INSTANCE_STEP_RATE_0, 0); /* ? */
+ ereg (accel_state->ib, VGT_INSTANCE_STEP_RATE_1, 0);
+
+ ereg (accel_state->ib, VGT_MAX_VTX_INDX, draw_conf.num_indices);
+ ereg (accel_state->ib, VGT_MIN_VTX_INDX, 0);
+ ereg (accel_state->ib, VGT_INDX_OFFSET, 0);
+
+ draw_auto(pScrn, accel_state->ib, &draw_conf);
+
+ wait_3d_idle_clean(pScrn, accel_state->ib);
+
+ /* sync destination surface */
+ cp_set_surface_sync(pScrn, accel_state->ib, (CB_ACTION_ENA_bit | CB0_DEST_BASE_ENA_bit),
+ accel_state->dst_size, accel_state->dst_mc_addr);
+
+ R600CPFlushIndirect(pScrn, accel_state->ib);
DamageDamageRegion(pPriv->pDraw, &pPriv->clip);
}
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