xf86-video-ati: Branch 'r6xx-r7xx-support' - 2 commits
Alex Deucher
agd5f at kemper.freedesktop.org
Wed Feb 18 15:16:09 PST 2009
src/r6xx_accel.c | 15 +++++----------
src/radeon.h | 44 ++++++++++++++++++--------------------------
src/radeon_dri.c | 3 ++-
src/radeon_driver.c | 14 ++++++++++----
4 files changed, 35 insertions(+), 41 deletions(-)
New commits:
commit 6545f0a2967414fa518a78440060b8b69c0146ee
Author: Alex Deucher <alexdeucher at gmail.com>
Date: Wed Feb 18 18:15:18 2009 -0500
R6xx/R7xx: fixup accel paths
diff --git a/src/radeon.h b/src/radeon.h
index bad55bf..aa9dc46 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -1312,9 +1312,8 @@ do { \
if (RADEON_VERBOSE) \
xf86DrvMsg(pScrn->scrnIndex, X_INFO, \
"FLUSH_RING in %s\n", __FUNCTION__); \
- if (info->cp->indirectBuffer) { \
+ if (info->cp->indirectBuffer) \
RADEONCPFlushIndirect(pScrn, 0); \
- } \
} while (0)
@@ -1331,16 +1330,13 @@ do { \
#define RADEON_WAIT_UNTIL_3D_IDLE() \
do { \
- BEGIN_RING(2); \
- if (info->ChipFamily >= CHIP_FAMILY_R600) { \
- OUT_RING(CP_PACKET0(R600_WAIT_UNTIL, 0)); \
- OUT_RING((RADEON_WAIT_3D_IDLECLEAN)); \
- } else { \
+ if (info->ChipFamily < CHIP_FAMILY_R600) { \
+ BEGIN_RING(2); \
OUT_RING(CP_PACKET0(RADEON_WAIT_UNTIL, 0)); \
OUT_RING((RADEON_WAIT_3D_IDLECLEAN | \
RADEON_WAIT_HOST_IDLECLEAN)); \
+ ADVANCE_RING(); \
} \
- ADVANCE_RING(); \
} while (0)
#define RADEON_WAIT_UNTIL_IDLE() \
@@ -1349,33 +1345,29 @@ do { \
xf86DrvMsg(pScrn->scrnIndex, X_INFO, \
"WAIT_UNTIL_IDLE() in %s\n", __FUNCTION__); \
} \
- BEGIN_RING(2); \
- if (info->ChipFamily >= CHIP_FAMILY_R600) { \
- OUT_RING(CP_PACKET0(R600_WAIT_UNTIL, 0)); \
- OUT_RING((RADEON_WAIT_3D_IDLECLEAN)); \
- } else { \
+ if (info->ChipFamily < CHIP_FAMILY_R600) { \
+ BEGIN_RING(2); \
OUT_RING(CP_PACKET0(RADEON_WAIT_UNTIL, 0)); \
OUT_RING((RADEON_WAIT_2D_IDLECLEAN | \
RADEON_WAIT_3D_IDLECLEAN | \
RADEON_WAIT_HOST_IDLECLEAN)); \
+ ADVANCE_RING(); \
} \
- ADVANCE_RING(); \
} while (0)
#define RADEON_PURGE_CACHE() \
do { \
- BEGIN_RING(2); \
- if (info->ChipFamily >= CHIP_FAMILY_R600) { \
- OUT_RING(CP_PACKET3(IT_EVENT_WRITE, 0)); \
- OUT_RING(CACHE_FLUSH_AND_INV_EVENT); \
- } else if (info->ChipFamily <= CHIP_FAMILY_RV280) { \
- OUT_RING(CP_PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0)); \
- OUT_RING(RADEON_RB3D_DC_FLUSH_ALL); \
- } else { \
- OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); \
- OUT_RING(R300_RB3D_DC_FLUSH_ALL); \
- } \
- ADVANCE_RING(); \
+ if (info->ChipFamily < CHIP_FAMILY_R600) { \
+ BEGIN_RING(2); \
+ if (info->ChipFamily <= CHIP_FAMILY_RV280) { \
+ OUT_RING(CP_PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0)); \
+ OUT_RING(RADEON_RB3D_DC_FLUSH_ALL); \
+ } else { \
+ OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); \
+ OUT_RING(R300_RB3D_DC_FLUSH_ALL); \
+ } \
+ ADVANCE_RING(); \
+ } \
} while (0)
#define RADEON_PURGE_ZCACHE() \
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index 4520be5..ba5fbce 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -1846,7 +1846,8 @@ void RADEONDRIResume(ScreenPtr pScreen)
/* FIXME: return? */
}
- RADEONEngineRestore(pScrn);
+ if (info->ChipFamily < CHIP_FAMILY_R600)
+ RADEONEngineRestore(pScrn);
RADEONDRICPInit(pScrn);
}
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 919a9fb..b4df090 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -3771,9 +3771,10 @@ void RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn,
} else {
OUTREG(R600_HDP_NONSURFACE_BASE, (restore->mc_fb_location << 16) & 0xff0000);
}
-
+
/* Reset the engine and HDP */
- RADEONEngineReset(pScrn);
+ if (info->ChipFamily < CHIP_FAMILY_R600)
+ RADEONEngineReset(pScrn);
}
} else {
@@ -5220,7 +5221,8 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
if (info->accelOn) {
RADEON_SYNC(info, pScrn);
- RADEONEngineRestore(pScrn);
+ if (info->ChipFamily < CHIP_FAMILY_R600)
+ RADEONEngineRestore(pScrn);
}
#ifdef XF86DRI
@@ -5424,6 +5426,10 @@ void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags)
xf86OutputPtr output = config->output[config->compat_output];
xf86CrtcPtr crtc = output->crtc;
+ /* not handled */
+ if (IS_AVIVO_VARIANT)
+ return;
+
#ifdef XF86DRI
if (info->cp->CPStarted && pScrn->pScreen) DRILock(pScrn->pScreen, 0);
#endif
@@ -5527,7 +5533,7 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
if (info->adaptor)
RADEONResetVideo(pScrn);
- if (info->accelOn)
+ if (info->accelOn && (info->ChipFamily < CHIP_FAMILY_R600))
RADEONEngineRestore(pScrn);
#ifdef XF86DRI
commit 3dff20e276615e8b77177689a4a5f8d91b3e8eac
Author: Alex Deucher <alexdeucher at gmail.com>
Date: Tue Feb 17 13:14:38 2009 -0500
R6xx/R7xx EXA: switch to surface sync packet
diff --git a/src/r6xx_accel.c b/src/r6xx_accel.c
index c0e3a2b..bebab88 100644
--- a/src/r6xx_accel.c
+++ b/src/r6xx_accel.c
@@ -365,16 +365,11 @@ cp_set_surface_sync(ScrnInfoPtr pScrn, drmBufPtr ib, uint32_t sync_type, uint32_
else
cp_coher_size = ((size + 255) >> 8);
- ereg (ib, CP_COHER_CNTL, sync_type);
- ereg (ib, CP_COHER_SIZE, cp_coher_size);
- ereg (ib, CP_COHER_BASE, (mc_addr >> 8));
- pack3 (ib, IT_WAIT_REG_MEM, 6);
- e32 (ib, IT_WAIT_REG | IT_WAIT_EQ);
- e32 (ib, IT_WAIT_ADDR(CP_COHER_STATUS));
- e32 (ib, 0);
- e32 (ib, 0); // Ref value
- e32 (ib, STATUS_bit); // Ref mask
- e32 (ib, 10); // Wait interval
+ pack3 (ib, IT_SURFACE_SYNC, 4);
+ e32 (ib, sync_type);
+ e32 (ib, cp_coher_size);
+ e32 (ib, (mc_addr >> 8));
+ e32 (ib, 10); /* poll interval */
}
/* inserts a wait for vline in the command stream */
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