xf86-video-ati: Branch 'master' - 2 commits
Alex Deucher
agd5f at kemper.freedesktop.org
Tue Jan 11 13:24:21 PST 2011
src/drmmode_display.c | 31 +++++++++++++++++++++++++++----
1 file changed, 27 insertions(+), 4 deletions(-)
New commits:
commit c5b3db18d888552328e9718ea022794fc5bde352
Author: Alex Deucher <alexdeucher at gmail.com>
Date: Tue Jan 11 16:21:18 2011 -0500
kms: fix pitch aligment for scanout
Display has slightly stricter pitch alignment requirements
than other blocks. Factor that in when aligning pitch.
Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=32997
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index b7d01c4..2ab4510 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -1118,14 +1118,25 @@ int drmmode_get_pitch_align(ScrnInfoPtr scrn, int bpe, uint32_t tiling)
int pitch_align = 1;
if (info->ChipFamily >= CHIP_FAMILY_R600) {
- if (tiling & RADEON_TILING_MACRO)
+ if (tiling & RADEON_TILING_MACRO) {
+ /* general surface requirements */
pitch_align = MAX(info->num_banks,
(((info->group_bytes / 8) / bpe) * info->num_banks)) * 8;
- else if (tiling & RADEON_TILING_MICRO)
+ /* further restrictions for scanout */
+ pitch_align = MAX(info->num_banks * 8, pitch_align);
+ } else if (tiling & RADEON_TILING_MICRO) {
+ /* general surface requirements */
pitch_align = MAX(8, (info->group_bytes / (8 * bpe)));
- else
+ /* further restrictions for scanout */
+ pitch_align = MAX(info->group_bytes / bpe, pitch_align);
+ } else {
+ /* general surface requirements */
pitch_align = info->group_bytes / bpe;
+ /* further restrictions for scanout */
+ pitch_align = MAX(32, pitch_align);
+ }
} else {
+ /* general surface requirements */
if (tiling)
pitch_align = 256 / bpe;
else
commit bbd7adce889359b5eb3239b73e904b3ede283e12
Author: Alex Deucher <alexdeucher at gmail.com>
Date: Tue Jan 11 15:41:03 2011 -0500
radeon: fix yet another pitch align
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 55e76ff..b7d01c4 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -204,7 +204,8 @@ void drmmode_copy_fb(ScrnInfoPtr pScrn, drmmode_ptr drmmode)
ScreenPtr pScreen = pScrn->pScreen;
int crtc_id = 0;
int i;
- int pitch = pScrn->displayWidth * info->CurrentLayout.pixel_bytes;
+ int pitch;
+ uint32_t tiling_flags = 0;
Bool ret;
if (info->accelOn == FALSE)
@@ -223,6 +224,17 @@ void drmmode_copy_fb(ScrnInfoPtr pScrn, drmmode_ptr drmmode)
if (!src)
return;
+ if (info->allowColorTiling) {
+ if (info->ChipFamily >= CHIP_FAMILY_R600)
+ tiling_flags |= RADEON_TILING_MICRO;
+ else
+ tiling_flags |= RADEON_TILING_MACRO;
+ }
+
+ pitch = RADEON_ALIGN(pScrn->displayWidth,
+ drmmode_get_pitch_align(pScrn, info->CurrentLayout.pixel_bytes, tiling_flags)) *
+ info->CurrentLayout.pixel_bytes;
+
dst = drmmode_create_bo_pixmap(pScreen, pScrn->virtualX,
pScrn->virtualY, pScrn->depth,
pScrn->bitsPerPixel, pitch,
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