xf86-video-intel: 4 commits - src/sna/kgem.h src/sna/sna_accel.c src/sna/sna_blt.c src/sna/sna_display.c src/sna/sna_dri.c
Chris Wilson
ickle at kemper.freedesktop.org
Wed Oct 31 16:03:14 PDT 2012
src/sna/kgem.h | 5 ++++-
src/sna/sna_accel.c | 10 +++++++---
src/sna/sna_blt.c | 10 ++++++++--
src/sna/sna_display.c | 6 ++++--
src/sna/sna_dri.c | 4 +++-
5 files changed, 26 insertions(+), 9 deletions(-)
New commits:
commit 4e363906a5ef15e1eb0a387cfb6b3445ac185b9d
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Wed Oct 31 22:58:59 2012 +0000
sna: Set a valid box when checking for GPU bo for BLT composite ops
Reported-by: Jiri Slaby <jirislaby at gmail.com>
References: https://bugs.freedesktop.org/show_bug.cgi?id=47597
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/sna_blt.c b/src/sna/sna_blt.c
index fd97255..9aa636c 100644
--- a/src/sna/sna_blt.c
+++ b/src/sna/sna_blt.c
@@ -1715,8 +1715,14 @@ sna_blt_composite(struct sna *sna,
was_clear = sna_drawable_is_clear(dst->pDrawable);
tmp->dst.pixmap = get_drawable_pixmap(dst->pDrawable);
- dst_box.x1 = dst_x; dst_box.x2 = dst_x + width;
- dst_box.y1 = dst_y; dst_box.y2 = dst_y + height;
+ if (width | height) {
+ dst_box.x1 = dst_x;
+ dst_box.x2 = bound(dst_x, width);
+ dst_box.y1 = dst_y;
+ dst_box.y2 = bound(dst_y, height);
+ } else
+ sna_render_picture_extents(dst, &dst_box);
+
bo = sna_drawable_use_bo(dst->pDrawable, PREFER_GPU, &dst_box, &tmp->damage);
if (bo && !kgem_bo_can_blt(&sna->kgem, bo)) {
DBG(("%s: can not blit to dst, tiling? %d, pitch? %d\n",
commit b924831e445615b82a53b10e1849720e933eddfe
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Wed Oct 31 22:55:56 2012 +0000
sna: Preserve mode if flushing before a scanline wait
Reported-by: Jiri Slaby <jirislaby at gmail.com>
References: https://bugs.freedesktop.org/show_bug.cgi?id=47597
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/kgem.h b/src/sna/kgem.h
index 7bc920a..7e48db5 100644
--- a/src/sna/kgem.h
+++ b/src/sna/kgem.h
@@ -390,8 +390,11 @@ static inline bool kgem_check_batch_with_surfaces(struct kgem *kgem,
static inline uint32_t *kgem_get_batch(struct kgem *kgem, int num_dwords)
{
- if (!kgem_check_batch(kgem, num_dwords))
+ if (!kgem_check_batch(kgem, num_dwords)) {
+ unsigned mode = kgem->mode;
_kgem_submit(kgem);
+ _kgem_set_mode(kgem, mode);
+ }
return kgem->batch + kgem->nbatch;
}
diff --git a/src/sna/sna_display.c b/src/sna/sna_display.c
index 10a7095..87acb5d 100644
--- a/src/sna/sna_display.c
+++ b/src/sna/sna_display.c
@@ -2792,6 +2792,8 @@ static bool sna_emit_wait_for_scanline_gen4(struct sna *sna,
uint32_t event;
uint32_t *b;
+ assert(sna->kgem.mode != KGEM_NONE);
+
if (pipe == 0) {
if (full_height)
event = MI_WAIT_FOR_PIPEA_SVBLANK;
@@ -2804,7 +2806,6 @@ static bool sna_emit_wait_for_scanline_gen4(struct sna *sna,
event = MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW;
}
- kgem_set_mode(&sna->kgem, KGEM_BLT);
b = kgem_get_batch(&sna->kgem, 5);
/* The documentation says that the LOAD_SCAN_LINES command
* always comes in pairs. Don't ask me why. */
@@ -2822,6 +2823,8 @@ static bool sna_emit_wait_for_scanline_gen2(struct sna *sna,
{
uint32_t *b;
+ assert(sna->kgem.mode != KGEM_NONE);
+
/*
* Pre-965 doesn't have SVBLANK, so we need a bit
* of extra time for the blitter to start up and
@@ -2830,7 +2833,6 @@ static bool sna_emit_wait_for_scanline_gen2(struct sna *sna,
if (full_height)
y2 -= 2;
- kgem_set_mode(&sna->kgem, KGEM_BLT);
b = kgem_get_batch(&sna->kgem, 5);
/* The documentation says that the LOAD_SCAN_LINES command
* always comes in pairs. Don't ask me why. */
diff --git a/src/sna/sna_dri.c b/src/sna/sna_dri.c
index 3abcbc2..83c79c1 100644
--- a/src/sna/sna_dri.c
+++ b/src/sna/sna_dri.c
@@ -485,8 +485,10 @@ static void sna_dri_select_mode(struct sna *sna, struct kgem_bo *src, bool sync)
struct drm_i915_gem_busy busy;
int mode;
- if (sna->kgem.gen < 60)
+ if (sna->kgem.gen < 60) {
+ kgem_set_mode(&sna->kgem, KGEM_BLT);
return;
+ }
if (sync) {
DBG(("%s: sync, force RENDER ring\n", __FUNCTION__));
commit 678f9586807071bef813bb69d451f14d2fcbcc04
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Wed Oct 31 11:26:18 2012 +0000
sna: assert that the source is not the GTT mapping when uploading
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index 87d3217..447d31a 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -2445,6 +2445,7 @@ sna_pixmap_move_area_to_gpu(PixmapPtr pixmap, const BoxRec *box, unsigned int fl
pixmap->devPrivate.ptr = priv->ptr;
pixmap->devKind = priv->stride;
}
+ assert(!priv->mapped);
if (n == 1 && !priv->pinned &&
box->x1 <= 0 && box->y1 <= 0 &&
box->x2 >= pixmap->drawable.width &&
@@ -2489,6 +2490,7 @@ sna_pixmap_move_area_to_gpu(PixmapPtr pixmap, const BoxRec *box, unsigned int fl
pixmap->devPrivate.ptr = priv->ptr;
pixmap->devKind = priv->stride;
}
+ assert(!priv->mapped);
ok = sna_write_boxes(sna, pixmap,
priv->gpu_bo, 0, 0,
pixmap->devPrivate.ptr,
@@ -2524,6 +2526,7 @@ sna_pixmap_move_area_to_gpu(PixmapPtr pixmap, const BoxRec *box, unsigned int fl
pixmap->devPrivate.ptr = priv->ptr;
pixmap->devKind = priv->stride;
}
+ assert(!priv->mapped);
ok = sna_write_boxes(sna, pixmap,
priv->gpu_bo, 0, 0,
pixmap->devPrivate.ptr,
@@ -3108,6 +3111,7 @@ sna_pixmap_move_to_gpu(PixmapPtr pixmap, unsigned flags)
pixmap->devPrivate.ptr = priv->ptr;
pixmap->devKind = priv->stride;
}
+ assert(!priv->mapped);
if (n == 1 && !priv->pinned &&
(box->x2 - box->x1) >= pixmap->drawable.width &&
(box->y2 - box->y1) >= pixmap->drawable.height) {
commit 783b8048a6d1a9fd0a73ebf7768ae17dc0b21900
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Wed Oct 31 11:16:09 2012 +0000
sna: Prefer to use the GPU for uploads if continuing on the GPU
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index a6af3f1..87d3217 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -1390,6 +1390,9 @@ static inline bool use_cpu_bo_for_upload(struct sna *sna,
kgem_bo_is_busy(priv->gpu_bo),
kgem_bo_is_busy(priv->cpu_bo)));
+ if (!priv->cpu)
+ return true;
+
if (flags & (MOVE_WRITE | MOVE_ASYNC_HINT))
return true;
@@ -3091,9 +3094,6 @@ sna_pixmap_move_to_gpu(PixmapPtr pixmap, unsigned flags)
assert(pixmap_contains_damage(pixmap, priv->cpu_damage));
DBG(("%s: uploading %d damage boxes\n", __FUNCTION__, n));
- if (!priv->cpu)
- flags |= MOVE_ASYNC_HINT;
-
ok = false;
if (use_cpu_bo_for_upload(sna, priv, flags)) {
DBG(("%s: using CPU bo for upload to GPU\n", __FUNCTION__));
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