xf86-video-intel: 3 commits - src/intel_driver.h src/sna/sna_accel.c src/uxa/intel_driver.c
Chris Wilson
ickle at kemper.freedesktop.org
Sun Jul 28 09:29:07 PDT 2013
src/intel_driver.h | 21 ------------
src/sna/sna_accel.c | 84 +++++++++++++++++++++++++++++++++++++++++++++++++
src/uxa/intel_driver.c | 1
3 files changed, 85 insertions(+), 21 deletions(-)
New commits:
commit 5e9decc963e01d6e558355af97314c502e314000
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Sun Jul 28 16:42:14 2013 +0100
uxa: Add the missing include to silence the compiler warning
Silence compiler warning for no prior declaration of intel_init_scrn().
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/uxa/intel_driver.c b/src/uxa/intel_driver.c
index 726f0b8..675408d 100644
--- a/src/uxa/intel_driver.c
+++ b/src/uxa/intel_driver.c
@@ -63,6 +63,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "shadow.h"
#include "intel.h"
#include "intel_video.h"
+#include "uxa_module.h"
#ifdef INTEL_XVMC
#define _INTEL_XVMC_SERVER_
commit f97b55d283e2fc333e93c88b18d5f3412f87c67b
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Sun Jul 28 16:31:57 2013 +0100
intel: Remove the unused SDV PCI IDs
As a first step towards working out what to do with the remaining
used-once PCI IDs, delete the used-never ones.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/intel_driver.h b/src/intel_driver.h
index be43358..1e67eab 100644
--- a/src/intel_driver.h
+++ b/src/intel_driver.h
@@ -80,22 +80,6 @@
#define PCI_CHIP_HASWELL_E_GT2 0x041E
#define PCI_CHIP_HASWELL_E_GT3 0x042E
-#define PCI_CHIP_HASWELL_SDV_D_GT1 0x0C02
-#define PCI_CHIP_HASWELL_SDV_D_GT2 0x0C12
-#define PCI_CHIP_HASWELL_SDV_D_GT3 0x0C22
-#define PCI_CHIP_HASWELL_SDV_M_GT1 0x0C06
-#define PCI_CHIP_HASWELL_SDV_M_GT2 0x0C16
-#define PCI_CHIP_HASWELL_SDV_M_GT3 0x0C26
-#define PCI_CHIP_HASWELL_SDV_S_GT1 0x0C0A
-#define PCI_CHIP_HASWELL_SDV_S_GT2 0x0C1A
-#define PCI_CHIP_HASWELL_SDV_S_GT3 0x0C2A
-#define PCI_CHIP_HASWELL_SDV_B_GT1 0x0C0E
-#define PCI_CHIP_HASWELL_SDV_B_GT2 0x0C1E
-#define PCI_CHIP_HASWELL_SDV_B_GT3 0x0C2E
-#define PCI_CHIP_HASWELL_SDV_E_GT1 0x0C0E
-#define PCI_CHIP_HASWELL_SDV_E_GT2 0x0C1E
-#define PCI_CHIP_HASWELL_SDV_E_GT3 0x0C2E
-
#define PCI_CHIP_HASWELL_ULT_D_GT1 0x0A02
#define PCI_CHIP_HASWELL_ULT_D_GT2 0x0A12
#define PCI_CHIP_HASWELL_ULT_D_GT3 0x0A22
@@ -128,11 +112,6 @@
#define PCI_CHIP_HASWELL_CRW_E_GT2 0x0D1E
#define PCI_CHIP_HASWELL_CRW_E_GT3 0x0D2E
-#define PCI_CHIP_VALLEYVIEW_PO 0x0f30
-#define PCI_CHIP_VALLEYVIEW_1 0x0f31
-#define PCI_CHIP_VALLEYVIEW_2 0x0f32
-#define PCI_CHIP_VALLEYVIEW_3 0x0f33
-
struct intel_device_info {
int gen;
};
commit 679416f9a5e949e6f15a5e8712921731a1750cbd
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Sun Jul 28 15:45:29 2013 +0100
sna: Allow PutImage to utilise userptr for busy targets
Typically, PutImage is not a performance critical path since ShmPutImage
uses CopyArea and so PutImage is relegated to small one off transfers.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index 6ac93bb..8a90bb4 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -4001,6 +4001,87 @@ create_upload_tiled_x(struct kgem *kgem,
}
static bool
+try_upload_blt(PixmapPtr pixmap, RegionRec *region,
+ int x, int y, int w, int h, char *bits, int stride)
+{
+ struct sna *sna = to_sna_from_pixmap(pixmap);
+ struct sna_pixmap *priv;
+ struct kgem_bo *src_bo;
+ bool ok;
+
+ if (!sna->kgem.has_userptr || !USE_USERPTR_UPLOADS)
+ return false;
+
+ priv = sna_pixmap(pixmap);
+ if (priv == NULL)
+ return false;
+
+ if (DAMAGE_IS_ALL(priv->cpu_damage) || priv->gpu_damage == NULL)
+ return false;
+
+ assert(priv->gpu_bo);
+ assert(priv->gpu_bo->proxy == NULL);
+
+ if (priv->cow || !__kgem_bo_is_busy(&sna->kgem, priv->gpu_bo))
+ return false;
+
+ if (priv->cpu_damage &&
+ sna_damage_contains_box__no_reduce(priv->cpu_damage,
+ ®ion->extents) &&
+ !box_inplace(pixmap, ®ion->extents))
+ return false;
+
+ src_bo = kgem_create_map(&sna->kgem, bits, stride * h, true);
+ if (src_bo == NULL)
+ return false;
+
+ src_bo->flush = true;
+ src_bo->pitch = stride;
+ kgem_bo_mark_unreusable(src_bo);
+
+ DBG(("%s: upload(%d, %d, %d, %d) x %d through a temporary map\n",
+ __FUNCTION__, x, y, w, h,
+ RegionNumRects(region)));
+
+ ok = sna->render.copy_boxes(sna, GXcopy,
+ pixmap, src_bo, -x, -y,
+ pixmap, priv->gpu_bo, 0, 0,
+ RegionRects(region),
+ RegionNumRects(region),
+ COPY_LAST);
+
+ kgem_bo_sync__cpu(&sna->kgem, src_bo);
+ assert(src_bo->rq == NULL);
+ kgem_bo_destroy(&sna->kgem, src_bo);
+
+ if (!ok)
+ return false;
+
+ if (!DAMAGE_IS_ALL(priv->gpu_damage)) {
+ assert(!priv->clear);
+ if (region->data == NULL &&
+ w >= pixmap->drawable.width &&
+ h >= pixmap->drawable.height) {
+ sna_damage_all(&priv->gpu_damage,
+ pixmap->drawable.width,
+ pixmap->drawable.height);
+ } else {
+ sna_damage_add(&priv->gpu_damage, region);
+ sna_damage_reduce_all(&priv->gpu_damage,
+ pixmap->drawable.width,
+ pixmap->drawable.height);
+ }
+ if (DAMAGE_IS_ALL(priv->gpu_damage)) {
+ list_del(&priv->flush_list);
+ sna_damage_destroy(&priv->cpu_damage);
+ sna_pixmap_free_cpu(sna, priv);
+ }
+ }
+
+ return true;
+}
+
+static bool
try_upload_tiled_x(PixmapPtr pixmap, RegionRec *region,
int x, int y, int w, int h, char *bits, int stride)
{
@@ -4143,6 +4224,9 @@ sna_put_zpixmap_blt(DrawablePtr drawable, GCPtr gc, RegionPtr region,
x += dx + drawable->x;
y += dy + drawable->y;
+ if (try_upload_blt(pixmap, region, x, y, w, h, bits, stride))
+ return true;
+
if (try_upload_tiled_x(pixmap, region, x, y, w, h, bits, stride))
return true;
More information about the xorg-commit
mailing list