xf86-video-chips PPC multi-head for embedded

[Donald Kayser]

Hello All,

I am currently working to support a multi-head adapter on an embedded  
PPC with an Asiliant/C&T 69030. I have been debugging the driver and  
have a fundamental issue that either I don't understand, or is wrong  
in the code.  The driver will load just fine with only one Screen  
section in the xorg.conf file, but as soon as a second Screen section  
is added, the xf86-video-chips driver reports a timeout. This timeout  
is due to the BitBlt registers indicating that the BitBlt engine is  
busy. As I have studied and debugged the code and compared it with the  
data sheet, I have found that the driver never accesses the Pipeline B  
through the area mapped to Pipeline B. In fact, all of the access to  
both Pipelines is handled through the memory space of Pipeline A. This  
is fundamentally OK as far as I can tell, but I have not been able to  
determine how the driver differentiates between accessing Pipeline A  
and B, specifically is the timeout being experienced due to the fact  
that we didn't communicate to the proper pipeline's registers during a  
BitBlt operation?

If there is anyone out there who has the fundamental understanding of  
using these devices, your help would be greatly appreciated.

I know this is a shot in the dark, but why not.

Donald
xorg at kayser dot net