[RFC] Rework mem_barrier() definitions in compiler.h
Matt Turner
mattst88 at gmail.com
Mon Aug 3 23:14:55 PDT 2009
Attached is a patch to begin cleaning compiler.h by better organizing
the mem_barrier()/write_mem_barrier() definitions.
I've moved them to a common section, clearly showing the various
architecture implementations, as suggested more or less here [0]. I've
checked the Linux kernel for appropriate barrier instructions and made
a few changes, such as {s,m}fence on AMD64.
As noted by the numerous XXX markers, there are quite a few issues,
outlined here.
o what the heck is the stuff wrapped in 'defined(__powerpc__) &&
!defined(__OpenBSD__)'?
o why do nearly all definitions need to be wrapped in ifndef NO_INLINE ?
o any particular reason that no BSDs are allowed for the __ia64__ section?
o no Open/NetBSD for x86/64?
o {m,s}fence are better than the lock add sequence for x86, but how to
check for support?
o why no NetBSD check on SPARC?
o is the defined(sun) checking for solaris?
o what is the appropriate SPARC barrier instruction? Surely we can
write it better than ".word 0x8143e00a"
o no BSD checks on MIPS?
o my god, 8 nops, there's got to be a better way
o as with {s,m}fence, how to check for MIPS III 'sync' instruction?
o in powerpc section, is the "We deal with arch-specific eieio()
routines above..." comment bogus? I don't see any references to eieio
above.
o is there a reason we can't rename eieio() to mem_barrier() to match
other definitions?
Suggestions and comments requested. Also, if you know the appropriate
person to ask about BSD support, or MIPS, et al, please forward this
to them.
Matt Turner
[0] http://lists.x.org/archives/xorg-devel/2009-February/000170.html
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