[PATCH] Add support for RENDER BGRA formats.
mark.kettenis at xs4all.nl
Thu Oct 29 14:26:12 PDT 2009
> From: Adam Jackson <ajax at nwnk.net>
> Date: Wed, 28 Oct 2009 10:39:29 -0400
> > (--) PCI: (0:0:3:0) 105d:2339:105d:000b Number 9 Imagine-128 II rev 2,
> > Mem @ 0x02000000/8388608, 0x02800000/8388608, 0x03000000/8388608,
> > 0x03800000/8388608, 0x00160000/65536, I/O @ 0x00000600/256, BIOS @
> > 0x????????/32768
> BARs 0 and 1 are memory windows 0 and 1. We map MW0 for the
> framebuffer, but they're both just views onto the device's VRAM iirc, so
> you should be able to map either one.
> > (--) I128(0): Memory Windows Registers
> > (--) I128(0): MW0_CTRL 0x00000100
> > (--) I128(0): AMV 0 MP 0 AMD 0 SEN 0 BSY 1 MDM 0 DEN 0 PSZ 0
> Hm. Bits 18 through 16 (mask 0x00070000) define the host data format
> for the memory window. If set, bit 16 swaps bits within each byte
> (whatever that means); bit 17 swaps bytes within each word; and bit 18
> swaps words within each dword.
Excellent! After initializing MW0_CTRL to 0x00060000, it seems things
just work. I'll prepare a proper diff to do that on big-endian machines.
To make the card work properly I still have to solve two issues:
1. It seems the ACNTRL register doesn't exist on the i128v2 chip.
Writes to this register result in a PCI bus error. This was
probably never noticed, since on standard PC hardware writes to
non-existent registers silently fail. Do the docs contain some
hints suggesting this is indeed the case?
2. Does the hardware by any chance map the VGA legacy I/O ports within
one of its BARs?
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