xf86-video-siliconmotion: added support for SM501 on PPC local bus
Marc Scherer
marc.scherer at mp-ndt.de
Mon Aug 16 04:10:23 PDT 2010
I would like to contribute a patch for the xf86-video-siliconmotion driver but I am not sure if it is good enough to be included upstream. Appended
is a patch based on version
97498c048c897e5753e61d3b4ab231025974d67c.
Most of the changes deal with endianess. I reversed all of the
bit-fields, for example. I guess there must be a better way to do this,
but I didn't find anything quickly.
Also, the support for PPC local bus should be a configure option.
Since my knowledge of the autotools is rudimentary only, I didn't do it yet.
It would be very kind if someone could briefly check the patch. If the basic approach is ok, I would merge it with
the current master branch and send the resulting patch to the list. If not ok any hints are appreciated.
Cheers,
Marc Scherer
diff --git a/src/regsmi.h b/src/regsmi.h
index 5dd0320..eb49d6f 100644
--- a/src/regsmi.h
+++ b/src/regsmi.h
@@ -101,42 +101,82 @@ VGAOUT8(SMIPtr pSmi, int port, CARD8 data)
}
}
-#define WRITE_DPR(pSmi, dpr, data) \
- do { \
- MMIO_OUT32(pSmi->DPRBase, dpr, data); \
+#if SMI_TQM5200
+#define WRITE_DPR(pSmi, dpr, data) \
+ do { \
+ *((CARD32*)(pSmi->DPRBase + dpr)) = (CARD32)(data); \
DEBUG("DPR%02X = %08X\n", dpr, data); \
} while (0)
-#define READ_DPR(pSmi, dpr) MMIO_IN32(pSmi->DPRBase, dpr)
+#define READ_DPR(pSmi, dpr) *((CARD32*)(pSmi->DPRBase + dpr))
#define WRITE_VPR(pSmi, vpr, data) \
do { \
- MMIO_OUT32(pSmi->VPRBase, vpr, data); \
+ *((CARD32*)(pSmi->VPRBase + vpr)) = (CARD32)(data); \
DEBUG("VPR%02X = %08X\n", vpr, data); \
} while (0)
-#define READ_VPR(pSmi, vpr) MMIO_IN32(pSmi->VPRBase, vpr)
+#define READ_VPR(pSmi, vpr) *((CARD32*)(pSmi->VPRBase + vpr))
#define WRITE_CPR(pSmi, cpr, data) \
do { \
- MMIO_OUT32(pSmi->CPRBase, cpr, data); \
+ *((CARD32*)(pSmi->CPRBase + cpr)) = (CARD32)(data); \
DEBUG("CPR%02X = %08X\n", cpr, data); \
} while (0)
-#define READ_CPR(pSmi, cpr) MMIO_IN32(pSmi->CPRBase, cpr)
+#define READ_CPR(pSmi, cpr) *((CARD32*)(pSmi->CPRBase + cpr))
#define WRITE_FPR(pSmi, fpr, data) \
do { \
- MMIO_OUT32(pSmi->FPRBase, fpr, data); \
+ *((CARD32*)(pSmi->FPRBase + fpr)) = (CARD32)(data); \
DEBUG("FPR%02X = %08X\n", fpr, data); \
} while (0)
-#define READ_FPR(pSmi, fpr) MMIO_IN32(pSmi->FPRBase, fpr)
+#define READ_FPR(pSmi, fpr) *((CARD32*)(pSmi->FPRBase + fpr))
#define WRITE_DCR(pSmi, dcr, data) \
do { \
- MMIO_OUT32(pSmi->DCRBase, dcr, data); \
+ *((CARD32*)(pSmi->DCRBase + dcr)) = (CARD32)(data); \
DEBUG("DCR%02X = %08X\n", dcr, data); \
} while (0)
-#define READ_DCR(pSmi, dcr) MMIO_IN32(pSmi->DCRBase, dcr)
+#define READ_DCR(pSmi, dcr) *((CARD32*)(pSmi->DCRBase + dcr))
#define WRITE_SCR(pSmi, scr, data) \
do { \
- MMIO_OUT32(pSmi->SCRBase, scr, data); \
+ *((CARD32*)(pSmi->SCRBase + scr)) = (CARD32)(data); \
DEBUG("SCR%02X = %08X\n", scr, data); \
} while (0)
-#define READ_SCR(pSmi, scr) MMIO_IN32(pSmi->SCRBase, scr)
+#define READ_SCR(pSmi, scr) *((CARD32*)(pSmi->SCRBase + scr))
+#else /* no SMI_TQM2500 */
+#define WRITE_DPR(pSmi, dpr, data) \
+ do { \
+ MMIO_OUT32(pSmi->DPRBase, dpr, data); \
+ DEBUG("DPR%02X = %08X\n", dpr, data); \
+ } while (0)
+#define READ_DPR(pSmi, dpr) MMIO_IN32(pSmi->DPRBase, dpr)
+#define WRITE_VPR(pSmi, vpr, data) \
+ do { \
+ MMIO_OUT32(pSmi->VPRBase, vpr, data); \
+ DEBUG("VPR%02X = %08X\n", vpr, data); \
+ } while (0)
+#define READ_VPR(pSmi, vpr) MMIO_IN32(pSmi->VPRBase, vpr)
+#define WRITE_CPR(pSmi, cpr, data) \
+ do { \
+ MMIO_OUT32(pSmi->CPRBase, cpr, data); \
+ DEBUG("CPR%02X = %08X\n", cpr, data); \
+ } while (0)
+#define READ_CPR(pSmi, cpr) MMIO_IN32(pSmi->CPRBase, cpr)
+#define WRITE_FPR(pSmi, fpr, data) \
+ do { \
+ MMIO_OUT32(pSmi->FPRBase, fpr, data); \
+ DEBUG("FPR%02X = %08X\n", fpr, data); \
+ } while (0)
+#define READ_FPR(pSmi, fpr) MMIO_IN32(pSmi->FPRBase, fpr)
+#define WRITE_DCR(pSmi, dcr, data) \
+ do { \
+ MMIO_OUT32(pSmi->DCRBase, dcr, data); \
+ DEBUG("DCR%02X = %08X\n", dcr, data); \
+ } while (0)
+#define READ_DCR(pSmi, dcr) MMIO_IN32(pSmi->DCRBase, dcr)
+#define WRITE_SCR(pSmi, scr, data) \
+ do { \
+ MMIO_OUT32(pSmi->SCRBase, scr, data); \
+ DEBUG("SCR%02X = %08X\n", scr, data); \
+ } while (0)
+#define READ_SCR(pSmi, scr) MMIO_IN32(pSmi->SCRBase, scr)
+#endif
+
/* 2D Engine commands */
#define SMI_TRANSPARENT_SRC 0x00000100
@@ -170,6 +210,20 @@ VGAOUT8(SMIPtr pSmi, int port, CARD8 data)
#define SMI_ROTATE_CW 0x01000000
#define SMI_ROTATE_CCW 0x02000000
+#ifdef SMI_TQM5200
+/* This might be wrong inside the SM501 MMCC Databook (?)*/
+/*#define SMI_Y_STEP_POSITIVE 0x00000000
+#define SMI_Y_STEP_NEGATIVE 0x01000000*/
+#define SMI_Y_STEP_POSITIVE 0x01000000
+#define SMI_Y_STEP_NEGATIVE 0x00000000
+
+/*#define SMI_X_STEP_POSITIVE 0x00000000
+#define SMI_X_STEP_NEGATIVE 0x02000000*/
+#define SMI_X_STEP_POSITIVE 0x02000000
+#define SMI_X_STEP_NEGATIVE 0x00000000
+
+#endif /* SMI_TQM5200 */
+
#define SMI_MAJOR_X 0x00000000
#define SMI_MAJOR_Y 0x04000000
diff --git a/src/smi.h b/src/smi.h
index e682dfa..3142b46 100644
--- a/src/smi.h
+++ b/src/smi.h
@@ -68,11 +68,20 @@ authorization from the XFree86 Project and Silicon Motion.
#define SMI_DEBUG 0
#endif
-#define SMI_USE_IMAGE_WRITES 0
-#define SMI_USE_VIDEO 1
-#define SMI_USE_CAPTURE 1
+#define SMI_USE_IMAGE_WRITES 1
+#define SMI_USE_VIDEO 0
+#define SMI_USE_CAPTURE 0
#define SMI501_CLI_DEBUG 0
+/* Support for the TQM5200 board:
+ * SM501 on MPC5200 local bus.
+ */
+#define SMI_TQM5200 1
+
+/* Use Hardware acceleration for line drawing */
+#define SMI_TQM5200_LINEACC 0
+
+
/*
* Leaving attempt implementation of an argb cursor using alpha plane
* for the smi 501/502 under this ifdef for now. Maybe it will be fixed
diff --git a/src/smi501_crtc.c b/src/smi501_crtc.c
index d71d738..b16a7fd 100644
--- a/src/smi501_crtc.c
+++ b/src/smi501_crtc.c
@@ -530,9 +530,16 @@ SMI501_CrtcLoadCursorImage(xf86CrtcPtr crtc, CARD8 *image)
port = crtc == crtcConf->crtc[0] ? 0x00f0 : 0x0230;
value = pSmi->FBCursorOffset + (port == 0x00f0 ? 0 : SMI501_CURSOR_SIZE);
WRITE_DCR(pSmi, port, value);
+#if SMI_TQM5200
+ int idx;
+ for(idx = 0; idx < (SMI501_MAX_CURSOR >> 2) * SMI501_MAX_CURSOR; idx += 4) {
+ *((CARD32*)(pSmi->FBBase + value + idx)) = lswapl(*((CARD32*)(image + idx)));
+ }
+#else
memcpy(pSmi->FBBase + value, image,
/* FIXME 1024, but then, should not be using 64x64 cursors */
(SMI501_MAX_CURSOR >> 2) * SMI501_MAX_CURSOR);
+#endif
#if SMI_CURSOR_ALPHA_PLANE
smi_crtc->argb_cursor = FALSE;
#endif
diff --git a/src/smi_501.h b/src/smi_501.h
index 10bcf6c..1662ff4 100644
--- a/src/smi_501.h
+++ b/src/smi_501.h
@@ -40,6 +40,13 @@ authorization from the XFree86 Project and Silicon Motion.
#define bits(lo, hi) hi + 1 - lo
+/* TQM5200
+ * THIS SEEMS WRONG IN THE SM501 MANUAL!
+ * On my board it is reversed
+ */
+#define ENDIAN_CTL 0x5C
+#define SMI501_BIG_ENDIAN 0x0
+#define SMI501_LITTLE_ENDIAN 0xFFFFFFFF
#define DRAM_CTL 0x000010
@@ -66,10 +73,17 @@ authorization from the XFree86 Project and Silicon Motion.
*/
typedef union _MSOCCmdAddrRec {
struct {
+#if SMI_TQM5200
+ uint32_t start : bits(31, 31);
+ uint32_t idle : bits(30, 30);
+ uint32_t : bits(28, 29);
+ uint32_t address : bits( 0, 27);
+#else
int32_t address : bits( 0, 27);
int32_t u0 : bits(28, 29);
int32_t idle : bits(30, 30);
int32_t start : bits(31, 31);
+#endif
} f;
int32_t value;
} MSOCCmdAddrRec, *MSOCCmdAddrPtr;
@@ -126,6 +140,23 @@ typedef union _MSOCCmdAddrRec {
*/
typedef union _MSOCCmdStatusRec {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(21, 31);
+ uint32_t memfifo : bits(20, 20);
+ uint32_t cmdhif : bits(19, 19);
+ uint32_t csc : bits(18, 18);
+ uint32_t dma : bits(17, 17);
+ uint32_t clayer : bits(16, 16);
+ uint32_t vfield : bits(15, 15);
+ uint32_t vlayer : bits(14, 14);
+ uint32_t player : bits(13, 13);
+ uint32_t cvsync : bits(12, 12);
+ uint32_t pvsync : bits(11, 11);
+ uint32_t : bits( 3, 10);
+ uint32_t setup : bits( 2, 2);
+ uint32_t cmdfifo : bits( 1, 1);
+ uint32_t engine : bits( 0, 0);
+#else
int32_t engine : bits( 0, 0);
int32_t cmdfifo : bits( 1, 1);
int32_t setup : bits( 2, 2);
@@ -141,6 +172,7 @@ typedef union _MSOCCmdStatusRec {
int32_t cmdhif : bits(19, 19);
int32_t memfifo : bits(20, 20);
int32_t u1 : bits(21, 31);
+#endif
} f;
int32_t value;
} MSOCCmdStatusRec, *MSOCCmdStatusPtr;
@@ -227,6 +259,40 @@ typedef union _MSOCCmdStatusRec {
*/
typedef union _MSOCClockRec {
struct {
+#if SMI_TQM5200
+ /* If p2_1xclck is set, it means use 1x clock, otherwise
+ * 2x clocks must be specified in p2_{shift,divider,select}. */
+ uint32_t p2_1xclck : bits(31, 31);
+ /* If pll_select is set, an alternate clock selection, available
+ * only in the 502 (using PLL_CTL, MMIO 0x074), will be used,
+ * and p2_* values will be ignored. */
+ uint32_t pll_select : bits(30, 30);
+ /* 2X clock source for the Panel interface timing.
+ * The actual rate at which the pixels are shifted
+ * out is P2XCLK divided by two. */
+ uint32_t p2_select : bits(29, 29);
+ uint32_t p2_divider : bits(27, 28);
+ uint32_t p2_shift : bits(24, 26);
+ /* 2X clock source for the CRT interface timing.
+ * The actual rate at which the pixels are shifted
+ * out is V2XCLK divided by two. */
+ uint32_t : bits(22, 23);
+ uint32_t v2_1xclck : bits(21, 21);
+ uint32_t v2_select : bits(20, 20);
+ uint32_t v2_divider : bits(19, 19);
+ uint32_t v2_shift : bits(16, 18);
+ /* Main clock source for all functional blocks,
+ * such as the 2D engine, GPIO, Video Engine, DMA Engine. */
+ uint32_t : bits(13, 15);
+ uint32_t m_select : bits(12, 12);
+ uint32_t m_divider : bits(11, 11);
+ uint32_t m_shift : bits( 8, 10);
+ /* Clock source for the local SDRAM controller. */
+ uint32_t : bits( 5, 7);
+ uint32_t m1_select : bits( 4, 4);
+ uint32_t m1_divider : bits( 3, 3);
+ uint32_t m1_shift : bits( 0, 2);
+#else
/* Clock source for the local SDRAM controller. */
int32_t m1_shift : bits( 0, 2);
int32_t m1_divider : bits( 3, 3);
@@ -259,6 +325,7 @@ typedef union _MSOCClockRec {
/* If p2_1xclck is set, it means use 1x clock, otherwise
* 2x clocks must be specified in p2_{shift,divider,select}. */
int32_t p2_1xclck : bits(31, 31);
+#endif
} f;
int32_t value;
} MSOCClockRec, *MSOCClockPtr;
@@ -288,6 +355,16 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t dpmsv : bits(31, 31);
+ uint32_t dpmsh : bits(30, 30);
+ uint32_t burst : bits(29, 29);
+ uint32_t : bits(16, 28);
+ uint32_t burst_read : bits(15, 15);
+ uint32_t : bits( 8, 14);
+ uint32_t retry : bits( 7, 7);
+ uint32_t : bits( 0, 6);
+#else
int32_t u0 : bits( 0, 6);
int32_t retry : bits( 7, 7);
int32_t u1 : bits( 8, 14);
@@ -296,6 +373,7 @@ typedef struct _MSOCRegRec {
int32_t burst : bits(29, 29);
int32_t dpmsh : bits(30, 30);
int32_t dpmsv : bits(31, 31);
+#endif
} f;
int32_t value;
} system_ctl;
@@ -314,10 +392,18 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(25, 31);
+ uint32_t frequency : bits(24, 24);
+ uint32_t : bits(13, 23);
+ uint32_t dac : bits(12, 12);
+ uint32_t : bits( 0, 11);
+#else
int32_t u0 : bits( 0, 11);
int32_t dac : bits(12, 12);
int32_t u1 : bits(13, 23);
int32_t frequency : bits(24, 24);
+#endif
} f;
int32_t value;
} misc_ctl;
@@ -347,11 +433,20 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(7, 31);
+ uint32_t gpio : bits(6, 6);
+ uint32_t zv : bits(5, 5);
+ uint32_t csc : bits(4, 4);
+ uint32_t engine : bits(3, 3);
+ uint32_t : bits(0, 2);
+#else
int32_t u0 : bits(0, 2);
int32_t engine : bits(3, 3);
int32_t csc : bits(4, 4);
int32_t zv : bits(5, 5);
int32_t gpio : bits(6, 6);
+#endif
} f;
int32_t value;
} gate;
@@ -381,10 +476,18 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(23, 31);
+ uint32_t divider : bits(19, 22);
+ uint32_t : bits(15, 18);
+ uint32_t recovery : bits(13, 14);
+ uint32_t : bits( 0, 12);
+#else
int32_t u0 : bits( 0, 12);
int32_t recovery : bits(13, 14);
int32_t u1 : bits(15, 18);
int32_t divider : bits(19, 22);
+#endif
} f;
int32_t value;
} sleep_gate;
@@ -407,8 +510,14 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(3, 31);
+ uint32_t status : bits(2, 2);
+ uint32_t mode : bits(0, 1);
+#else
int32_t mode : bits(0, 1);
int32_t status : bits(2, 2);
+#endif
} f;
int32_t value;
} power_ctl;
@@ -424,9 +533,15 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t ident : bits(16, 31);
+ uint32_t : bits( 8, 15);
+ uint32_t revision : bits( 0, 7);
+#else
int32_t revision : bits( 0, 7);
int32_t u0 : bits( 8, 15);
int32_t ident : bits(16, 31);
+#endif
} f;
int32_t value;
} device_id;
@@ -444,8 +559,14 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(6, 31);
+ uint32_t pll : bits( 4, 5);
+ uint32_t : bits( 0, 3);
+#else
int32_t u0 : bits( 0, 3);
int32_t pll : bits( 4, 5);
+#endif
} f;
int32_t value;
} timing_ctl;
@@ -475,11 +596,20 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(18, 31);
+ uint32_t power : bits(17, 17);
+ uint32_t select : bits(16, 16);
+ uint32_t divider : bits(15, 15);
+ uint32_t n : bits( 8, 14);
+ uint32_t m : bits( 0, 7);
+#else
int32_t m : bits( 0, 7);
int32_t n : bits( 8, 14);
int32_t divider : bits(15, 15);
int32_t select : bits(16, 16);
int32_t power : bits(17, 17);
+#endif
} f;
int32_t value;
} pll_ctl;
@@ -524,6 +654,22 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(28, 31);
+ uint32_t fp : bits(27, 27);
+ uint32_t bias : bits(26, 26);
+ uint32_t signal : bits(25, 25);
+ uint32_t vdd : bits(24, 24);
+ uint32_t : bits(14, 23);
+ uint32_t vsync : bits(13, 13);
+ uint32_t hsync : bits(12, 12);
+ uint32_t : bits( 9, 11);
+ uint32_t timing : bits( 8, 8);
+ uint32_t : bits( 4, 7);
+ uint32_t gamma : bits( 3, 3);
+ uint32_t enable : bits( 2, 2);
+ uint32_t format : bits( 0, 1);
+#else
int32_t format : bits( 0, 1);
int32_t enable : bits( 2, 2);
int32_t gamma : bits( 3, 3);
@@ -537,6 +683,7 @@ typedef struct _MSOCRegRec {
int32_t signal : bits(25, 25);
int32_t bias : bits(26, 26);
int32_t fp : bits(27, 27);
+#endif
} f;
int32_t value;
} panel_display_ctl;
@@ -560,12 +707,21 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t pending : bits(31, 31);
+ uint32_t : bits(28, 30);
+ uint32_t mselect : bits(27, 27);
+ uint32_t mextern : bits(26, 26);
+ uint32_t address : bits( 4, 25);
+ uint32_t : bits( 0, 3);
+#else
int32_t u0 : bits( 0, 3);
int32_t address : bits( 4, 25);
int32_t mextern : bits(26, 26);
int32_t mselect : bits(27, 27);
int32_t u1 : bits(28, 30);
int32_t pending : bits(31, 31);
+#endif
} f;
int32_t value;
} panel_fb_address;
@@ -582,10 +738,18 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(30, 31);
+ uint32_t width : bits(20, 29);
+ uint32_t : bits(14, 19);
+ uint32_t offset : bits( 4, 13);
+ uint32_t : bits( 0, 3);
+#else
int32_t u0 : bits( 0, 3);
int32_t offset : bits( 4, 13);
int32_t u1 : bits(14, 19);
int32_t width : bits(20, 29);
+#endif
} f;
int32_t value;
} panel_fb_width;
@@ -601,9 +765,16 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(28, 31);
+ uint32_t width : bits(16, 27);
+ uint32_t : bits(12, 15);
+ uint32_t x : bits( 0, 11);
+#else
int32_t x : bits( 0, 11);
int32_t u0 : bits(12, 15);
int32_t width : bits(16, 27);
+#endif
} f;
int32_t value;
} panel_wwidth;
@@ -619,9 +790,16 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(28, 31);
+ uint32_t height : bits(16, 27);
+ uint32_t : bits(12, 15);
+ uint32_t y : bits( 0, 11);
+#else
int32_t y : bits( 0, 11);
int32_t u0 : bits(12, 15);
int32_t height : bits(16, 27);
+#endif
} f;
int32_t value;
} panel_wheight;
@@ -636,9 +814,16 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(27, 31);
+ uint32_t top : bits(16, 26);
+ uint32_t : bits(11, 15);
+ uint32_t left : bits( 0, 10);
+#else
int32_t left : bits( 0, 10);
int32_t u0 : bits(11, 15);
int32_t top : bits(16, 26);
+#endif
} f;
int32_t value;
} panel_plane_tl;
@@ -653,9 +838,16 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(27, 31);
+ uint32_t bottom : bits(16, 26);
+ uint32_t : bits(11, 15);
+ uint32_t right : bits( 0, 10);
+#else
int32_t right : bits( 0, 10);
int32_t u0 : bits(11, 15);
int32_t bottom : bits(16, 26);
+#endif
} f;
int32_t value;
} panel_plane_br;
@@ -670,9 +862,16 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(28, 31);
+ uint32_t total : bits(16, 27);
+ uint32_t : bits(12, 15);
+ uint32_t end : bits( 0, 11);
+#else
int32_t end : bits( 0, 11);
int32_t u0 : bits(12, 15);
int32_t total : bits(16, 27);
+#endif
} f;
int32_t value;
} panel_htotal;
@@ -687,9 +886,16 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(24, 31);
+ uint32_t width : bits(16, 23);
+ uint32_t : bits(12, 15);
+ uint32_t start : bits( 0, 11);
+#else
int32_t start : bits( 0, 11);
int32_t u0 : bits(12, 15);
int32_t width : bits(16, 23);
+#endif
} f;
int32_t value;
} panel_hsync;
@@ -704,9 +910,16 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(28, 31);
+ uint32_t total : bits(16, 27);
+ uint32_t : bits(12, 15);
+ uint32_t end : bits( 0, 11);
+#else
int32_t end : bits( 0, 11);
int32_t u0 : bits(12, 15);
int32_t total : bits(16, 27);
+#endif
} f;
int32_t value;
} panel_vtotal;
@@ -721,9 +934,16 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(24, 31);
+ uint32_t height : bits(16, 23);
+ uint32_t : bits(12, 15);
+ uint32_t start : bits( 0, 11);
+#else
int32_t start : bits( 0, 11);
int32_t u0 : bits(12, 15);
int32_t height : bits(16, 23);
+#endif
} f;
int32_t value;
} panel_vsync;
@@ -751,12 +971,22 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(29, 31);
+ uint32_t select : bits(28, 28);
+ uint32_t alpha : bits(24, 27);
+ uint32_t : bits( 4, 23);
+ uint32_t chromakey : bits( 3, 3);
+ uint32_t enable : bits( 2, 2);
+ uint32_t format : bits( 0, 1);
+#else
int32_t format : bits( 0, 1);
int32_t enable : bits( 2, 2);
int32_t chromakey : bits( 3, 3);
int32_t u0 : bits( 4, 23);
int32_t alpha : bits(24, 27);
int32_t select : bits(28, 28);
+#endif
} f;
int32_t value;
} alpha_display_ctl;
@@ -780,12 +1010,21 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t pending : bits(31, 31);
+ uint32_t : bits(28, 30);
+ uint32_t mselect : bits(27, 27);
+ uint32_t mextern : bits(26, 26);
+ uint32_t address : bits( 4, 25);
+ uint32_t : bits( 0, 3);
+#else
int32_t u0 : bits( 0, 3);
int32_t address : bits( 4, 25);
int32_t mextern : bits(26, 26);
int32_t mselect : bits(27, 27);
int32_t u1 : bits(28, 30);
int32_t pending : bits(31, 31);
+#endif
} f;
int32_t value;
} alpha_fb_address;
@@ -802,10 +1041,18 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(30, 31);
+ uint32_t width : bits(20, 29);
+ uint32_t : bits(14, 19);
+ uint32_t offset : bits( 4, 13);
+ uint32_t : bits( 0, 3);
+#else
int32_t u0 : bits( 0, 3);
int32_t offset : bits( 4, 13);
int32_t u1 : bits(14, 19);
int32_t width : bits(20, 29);
+#endif
} f;
int32_t value;
} alpha_fb_width;
@@ -820,9 +1067,16 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(27, 31);
+ uint32_t top : bits(16, 26);
+ uint32_t : bits(11, 15);
+ uint32_t left : bits( 0, 10);
+#else
int32_t left : bits( 0, 10);
int32_t u0 : bits(11, 15);
int32_t top : bits(16, 26);
+#endif
} f;
int32_t value;
} alpha_plane_tl;
@@ -837,9 +1091,16 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(27, 31);
+ uint32_t bottom : bits(16, 26);
+ uint32_t : bits(11, 15);
+ uint32_t right : bits( 0, 10);
+#else
int32_t right : bits( 0, 10);
int32_t u0 : bits(11, 15);
int32_t bottom : bits(16, 26);
+#endif
} f;
int32_t value;
} alpha_plane_br;
@@ -858,8 +1119,13 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t mask : bits(16, 31);
+ uint32_t value : bits( 0, 15);
+#else
int32_t value : bits( 0, 15);
int32_t mask : bits(16, 31);
+#endif
} f;
int32_t value;
} alpha_chroma_key;
@@ -903,6 +1169,19 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(14, 31);
+ uint32_t vsync : bits(13, 13);
+ uint32_t hsync : bits(12, 12);
+ uint32_t sync : bits(11, 11);
+ uint32_t blank : bits(10, 10);
+ uint32_t select : bits( 9, 9);
+ uint32_t timing : bits( 8, 8);
+ uint32_t pixel : bits( 4, 7);
+ uint32_t gamma : bits( 3, 3);
+ uint32_t enable : bits( 2, 2);
+ uint32_t format : bits( 0, 1);
+#else
int32_t format : bits( 0, 1);
int32_t enable : bits( 2, 2);
int32_t gamma : bits( 3, 3);
@@ -913,6 +1192,7 @@ typedef struct _MSOCRegRec {
int32_t sync : bits(11, 11);
int32_t hsync : bits(12, 12);
int32_t vsync : bits(13, 13);
+#endif
} f;
int32_t value;
} crt_display_ctl;
@@ -936,12 +1216,21 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t pending : bits(31, 31);
+ uint32_t : bits(28, 30);
+ uint32_t mselect : bits(27, 27);
+ uint32_t mextern : bits(26, 26);
+ uint32_t address : bits( 4, 25);
+ uint32_t : bits( 0, 3);
+#else
int32_t u0 : bits( 0, 3);
int32_t address : bits( 4, 25);
int32_t mextern : bits(26, 26);
int32_t mselect : bits(27, 27);
int32_t u1 : bits(28, 30);
int32_t pending : bits(31, 31);
+#endif
} f;
int32_t value;
} crt_fb_address;
@@ -958,10 +1247,18 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(30, 31);
+ uint32_t width : bits(20, 29);
+ uint32_t : bits(14, 19);
+ uint32_t offset : bits( 4, 13);
+ uint32_t : bits( 0, 3);
+#else
int32_t u0 : bits( 0, 3);
int32_t offset : bits( 4, 13);
int32_t u1 : bits(14, 19);
int32_t width : bits(20, 29);
+#endif
} f;
int32_t value;
} crt_fb_width;
@@ -976,9 +1273,16 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(28, 31);
+ uint32_t total : bits(16, 27);
+ uint32_t : bits(12, 15);
+ uint32_t end : bits( 0, 11);
+#else
int32_t end : bits( 0, 11);
int32_t u0 : bits(12, 15);
int32_t total : bits(16, 27);
+#endif
} f;
int32_t value;
} crt_htotal;
@@ -993,9 +1297,16 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(24, 31);
+ uint32_t width : bits(16, 23);
+ uint32_t : bits(12, 15);
+ uint32_t start : bits( 0, 11);
+#else
int32_t start : bits( 0, 11);
int32_t u0 : bits(12, 15);
int32_t width : bits(16, 23);
+#endif
} f;
int32_t value;
} crt_hsync;
@@ -1010,9 +1321,16 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(27, 31);
+ uint32_t total : bits(16, 26);
+ uint32_t : bits(11, 15);
+ uint32_t end : bits( 0, 10);
+#else
int32_t end : bits( 0, 10);
int32_t u0 : bits(11, 15);
int32_t total : bits(16, 26);
+#endif
} f;
int32_t value;
} crt_vtotal;
@@ -1027,9 +1345,16 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(22, 31);
+ uint32_t height : bits(16, 21);
+ uint32_t : bits(12, 15);
+ uint32_t start : bits( 0, 11);
+#else
int32_t start : bits( 0, 11);
int32_t u0 : bits(12, 15);
int32_t height : bits(16, 21);
+#endif
} f;
int32_t value;
} crt_vsync;
@@ -1049,9 +1374,16 @@ typedef struct _MSOCRegRec {
*/
union {
struct {
+#if SMI_TQM5200
+ uint32_t : bits(26, 31);
+ uint32_t voltage : bits(25, 25);
+ uint32_t enable : bits(24, 24);
+ uint32_t data : bits( 0, 23);
+#else
int32_t data : bits( 0, 23);
int32_t enable : bits(24, 24);
int32_t voltage : bits(25, 25);
+#endif
} f;
int32_t value;
} crt_detect;
@@ -1325,9 +1657,15 @@ typedef enum smi_cli_cmd_code {
/* Generic command list entry that matches most commands patterns */
typedef union smi_cli_entry {
struct {
+#if SMI_TQM5200
+ uint64_t data : bits(32, 63);
+ uint64_t cmd : bits(28, 31);
+ uint64_t base : bits( 0, 27);
+#else
int64_t base : bits( 0, 27);
int64_t cmd : bits(28, 31);
int64_t data : bits(32, 63);
+#endif
} f;
int64_t value;
} smi_cli_entry_t;
diff --git a/src/smi_accel.c b/src/smi_accel.c
index b6a3b35..daa76ba 100644
--- a/src/smi_accel.c
+++ b/src/smi_accel.c
@@ -201,7 +201,8 @@ SMI_DEDataFormat(int bpp) {
DEDataFormat = 0x00100000;
break;
case 24:
- DEDataFormat = 0x00300000;
+ //DEDataFormat = 0x00300000;
+ DEDataFormat = 0x00200000;
break;
case 32:
DEDataFormat = 0x00200000;
diff --git a/src/smi_driver.c b/src/smi_driver.c
index b47f774..92f4106 100644
--- a/src/smi_driver.c
+++ b/src/smi_driver.c
@@ -319,6 +319,34 @@ SMI_Probe(DriverPtr drv, int flags)
/* There's no matching device section in the config file, so quit now. */
LEAVE(FALSE);
+#if SMI_TQM5200
+ if (flags & PROBE_DETECT)
+ foundScreen = TRUE;
+ else {
+ ScrnInfoPtr pScrn = NULL;
+ int entity;
+
+ entity = xf86ClaimNoSlot(drv, 0, devSections[0], TRUE); /* only use the first section */
+ pScrn = xf86AllocateScreen(drv, 0);
+ xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, VERBLEV, SILICONMOTION_NAME ": allocated screen\n");
+ xf86AddEntityToScreen(pScrn, entity);
+ xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, VERBLEV, SILICONMOTION_NAME ": added entity to screen\n");
+ pScrn->driverVersion = SILICONMOTION_DRIVER_VERSION;
+ pScrn->driverName = SILICONMOTION_DRIVER_NAME;
+ pScrn->name = SILICONMOTION_NAME;
+ pScrn->Probe = SMI_Probe;
+ pScrn->PreInit = SMI_PreInit;
+ pScrn->ScreenInit = SMI_ScreenInit;
+ pScrn->SwitchMode = SMI_SwitchMode;
+ pScrn->AdjustFrame = SMI_AdjustFrame;
+ pScrn->EnterVT = SMI_EnterVT;
+ pScrn->LeaveVT = SMI_LeaveVT;
+ pScrn->FreeScreen = SMI_FreeScreen;
+
+ foundScreen = TRUE;
+ }
+#else /* SMI_TQM5200 not defined */
+
#ifndef XSERVER_LIBPCIACCESS
if (xf86GetPciVideoInfo() == NULL)
LEAVE(FALSE);
@@ -328,8 +356,6 @@ SMI_Probe(DriverPtr drv, int flags)
SMIChipsets, SMIPciChipsets, devSections,
numDevSections, drv, &usedChips);
- /* Free it since we don't need that list after this */
- xfree(devSections);
if (numUsed <= 0)
LEAVE(FALSE);
@@ -363,7 +389,9 @@ SMI_Probe(DriverPtr drv, int flags)
}
}
xfree(usedChips);
+#endif /* SMI_TQM5200 */
+ xfree(devSections);
LEAVE(foundScreen);
}
@@ -391,8 +419,13 @@ SMI_PreInit(ScrnInfoPtr pScrn, int flags)
/* Find the PCI slot for this screen */
pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
+#if SMI_TQM5200
+ pSmi->PciInfo = NULL;
+ pSmi->Chipset = PCI_CHIP_SMI501;
+#else
pSmi->PciInfo = xf86GetPciInfoForEntity(pEnt->index);
pSmi->Chipset = PCI_DEV_DEVICE_ID(pSmi->PciInfo);
+#endif
if (IS_MSOC(pSmi)) {
pSmi->Save = SMI501_Save;
@@ -411,12 +444,14 @@ SMI_PreInit(ScrnInfoPtr pScrn, int flags)
LEAVE(TRUE);
}
+#if !SMI_TQM5200
if (pEnt->location.type != BUS_PCI || pEnt->resources) {
xfree(pEnt);
SMI_FreeRec(pScrn);
LEAVE(FALSE);
}
pSmi->PciInfo = xf86GetPciInfoForEntity(pEnt->index);
+#endif
/* Set pScrn->monitor */
pScrn->monitor = pScrn->confScreen->monitor;
@@ -474,7 +509,7 @@ SMI_PreInit(ScrnInfoPtr pScrn, int flags)
if (pScrn->depth > 8) {
/* The defaults are OK for us */
rgb zeros = {0, 0, 0};
-#if __BYTE_ORDER == __BIG_ENDIAN
+#if (__BYTE_ORDER == __BIG_ENDIAN && !SMI_TQM5200)
rgb masks = {0xff00,0xff0000,0xff000000};
#else
rgb masks = {0, 0, 0};
@@ -643,7 +678,11 @@ SMI_PreInit(ScrnInfoPtr pScrn, int flags)
}
else {
from = X_PROBED;
+#if SMI_TQM5200
+ pSmi->Chipset = SMI_MSOC;
+#else
pSmi->Chipset = PCI_DEV_DEVICE_ID(pSmi->PciInfo);
+#endif
pScrn->chipset = (char *) xf86TokenToString(SMIChipsets, pSmi->Chipset);
}
@@ -653,7 +692,11 @@ SMI_PreInit(ScrnInfoPtr pScrn, int flags)
pSmi->ChipRev);
}
else
+#if SMI_TQM5200
+ pSmi->ChipRev = 0xA0;
+#else
pSmi->ChipRev = PCI_DEV_REVISION(pSmi->PciInfo);
+#endif
xfree(pEnt);
/*
@@ -674,10 +717,15 @@ SMI_PreInit(ScrnInfoPtr pScrn, int flags)
xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n", pScrn->chipset);
+
#ifndef XSERVER_LIBPCIACCESS
+#if SMI_TQM5200
+ pSmi->PciTag = NULL;
+#else
pSmi->PciTag = pciTag(pSmi->PciInfo->bus, pSmi->PciInfo->device,
pSmi->PciInfo->func);
#endif
+#endif
from = X_DEFAULT;
if(pSmi->Chipset == SMI_LYNX3DM &&
@@ -1209,8 +1257,15 @@ SMI_MapMmio(ScrnInfoPtr pScrn)
SMIPtr pSmi = SMIPTR(pScrn);
CARD32 memBase;
+ ENTER();
+
SMI_EnableMmio(pScrn);
+#if SMI_TQM5200
+ memBase = 0xE3E00000; /* fixed MMIO-Base on TQM5200 */
+ pSmi->MapSize = 0x200000; /* in Bytes */
+ pSmi->MapBase = xf86MapVidMem(pScrn->scrnIndex, VIDMEM_MMIO, memBase, pSmi->MapSize);
+#else
switch (pSmi->Chipset) {
case SMI_COUGAR3DR:
memBase = PCI_REGION_BASE(pSmi->PciInfo, 1, REGION_MEM);
@@ -1255,6 +1310,7 @@ SMI_MapMmio(ScrnInfoPtr pScrn)
return (FALSE);
}
#endif
+#endif /*SMI_TQM5200 */
if (pSmi->MapBase == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Internal error: could not map "
@@ -1298,13 +1354,13 @@ SMI_MapMmio(ScrnInfoPtr pScrn)
pSmi->DataPortSize = 0x100000;
break;
case SMI_MSOC:
- pSmi->DPRBase = pSmi->MapBase + 0x100000;
- pSmi->VPRBase = pSmi->MapBase + 0x000000;
- pSmi->CPRBase = pSmi->MapBase + 0x090000;
- pSmi->DCRBase = pSmi->MapBase + 0x080000;
- pSmi->SCRBase = pSmi->MapBase + 0x000000;
+ pSmi->DPRBase = pSmi->MapBase + 0x100000; /* 2D drawing engine */
+ pSmi->VPRBase = pSmi->MapBase + 0x000000; /* ??? */
+ pSmi->CPRBase = pSmi->MapBase + 0x090000; /* ZV port */
+ pSmi->DCRBase = pSmi->MapBase + 0x080000; /* Display controller */
+ pSmi->SCRBase = pSmi->MapBase + 0x000000; /* System config */
pSmi->IOBase = 0;
- pSmi->DataPortBase = pSmi->MapBase + 0x110000;
+ pSmi->DataPortBase = pSmi->MapBase + 0x110000; /* 2D drawing engine data port */
pSmi->DataPortSize = 0x10000;
break;
default:
@@ -1329,7 +1385,35 @@ SMI_MapMmio(ScrnInfoPtr pScrn)
"DataPort=%p - %p\n", pSmi->DataPortBase,
pSmi->DataPortBase + pSmi->DataPortSize - 1);
- return (TRUE);
+#if SMI_TQM5200
+ /* Adjust endianess immediately after mapping */
+ WRITE_SCR(pSmi, ENDIAN_CTL, SMI501_BIG_ENDIAN);
+ DEBUG("SM501 endianess = %08X\n", READ_SCR(pSmi, ENDIAN_CTL));
+ DEBUG("Device_ID = %08X\n", READ_SCR(pSmi, DEVICE_ID));
+ DEBUG("Low -> High Address = %02X %02X %02X %02X\n",
+ *((unsigned char*)(pSmi->SCRBase + DEVICE_ID)),
+ *((unsigned char*)(pSmi->SCRBase + DEVICE_ID + 1)),
+ *((unsigned char*)(pSmi->SCRBase + DEVICE_ID + 2)),
+ *((unsigned char*)(pSmi->SCRBase + DEVICE_ID + 3)));
+ union {
+ struct {
+#if 1
+ uint32_t ident : bits(16, 31);
+ uint32_t : bits( 8, 15);
+ uint32_t revision : bits( 0, 7);
+#else
+ uint32_t revision : bits( 0, 7);
+ uint32_t : bits( 8, 15);
+ uint32_t ident : bits(16, 31);
+#endif
+ } f;
+ uint32_t value;
+ } device_id;
+ device_id.value = READ_SCR(pSmi, DEVICE_ID);
+ DEBUG("Bitfield ident = %04X, rev = %02X\n", device_id.f.ident, device_id.f.revision);
+#endif
+
+ LEAVE(TRUE);
}
/* HACK - In some cases the BIOS hasn't filled in the "scratchpad
@@ -1387,6 +1471,8 @@ SMI_DetectMem(ScrnInfoPtr pScrn)
SMIPtr pSmi = SMIPTR(pScrn);
MessageType from;
+ ENTER();
+
if ((pScrn->videoRam = pScrn->confScreen->device->videoRam)){
pSmi->videoRAMKBytes = pScrn->videoRam;
from = X_CONFIG;
@@ -1395,13 +1481,19 @@ SMI_DetectMem(ScrnInfoPtr pScrn)
unsigned char config;
static int lynx3d_table[4] = { 0, 2, 4, 6 };
static int lynx3dm_table[4] = { 16, 2, 4, 8 };
- static int msoc_table[8] = { 4, 8, 16, 32, 64, 2, 0, 0 };
+ static int msoc_table[8] = { 4, 8, 16, 32, 64, 2};
static int default_table[4] = { 1, 2, 4, 0 };
if (IS_MSOC(pSmi)) {
config = (READ_SCR(pSmi, DRAM_CTL) >> 13) & 7;
+ DEBUG("Video RAM config = %d\n", config);
+ if (config < 6)
pSmi->videoRAMKBytes = msoc_table[config] * 1024 -
SHARED_USB_DMA_BUFFER_SIZE;
+ else {
+ xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, VERBLEV, "Could not determine video memory size\n");
+ pSmi->videoRAMKBytes = 8 * 1024 - SHARED_USB_DMA_BUFFER_SIZE;
+ }
}
else {
config = VGAIN8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x71);
@@ -1434,7 +1526,7 @@ SMI_DetectMem(ScrnInfoPtr pScrn)
xf86DrvMsg(pScrn->scrnIndex, from,
"videoram: %dkB\n", pSmi->videoRAMKBytes);
- return (TRUE);
+ LEAVE(TRUE);
}
Bool
@@ -1448,13 +1540,21 @@ SMI_MapMem(ScrnInfoPtr pScrn)
if (pSmi->MapBase == NULL && SMI_MapMmio(pScrn) == FALSE)
LEAVE(FALSE);
+#if SMI_TQM5200
+ pScrn->memPhysBase = 0xE0000000; /* fixed FB-Base on TQM5200 */
+#else
pScrn->memPhysBase = PCI_REGION_BASE(pSmi->PciInfo, 0, REGION_MEM);
+#endif
if (pSmi->Chipset == SMI_LYNX3DM)
pSmi->fbMapOffset = 0x200000;
else
pSmi->fbMapOffset = 0x0;
+
+#if SMI_TQM5200
+ pSmi->FBBase = xf86MapVidMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER, pScrn->memPhysBase, pSmi->videoRAMBytes);
+#else
#ifndef XSERVER_LIBPCIACCESS
pSmi->FBBase = xf86MapPciMem(pScrn->scrnIndex,
VIDMEM_FRAMEBUFFER,
@@ -1476,6 +1576,7 @@ SMI_MapMem(ScrnInfoPtr pScrn)
LEAVE(FALSE);
}
#endif
+#endif /* SMI_TQM5200 */
if (pSmi->FBBase == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -1577,6 +1678,16 @@ SMI_UnmapMem(ScrnInfoPtr pScrn)
SMI_DisableMmio(pScrn);
+#if SMI_TQM5200
+ if (pSmi->MapBase) {
+ xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pSmi->MapBase, pSmi->MapSize);
+ pSmi->MapBase = NULL;
+ }
+ if (pSmi->FBBase) {
+ xf86UnMapVidMem(pScrn->scrnIndex, (pointer) pSmi->FBBase, pSmi->videoRAMBytes);
+ pSmi->FBBase = NULL;
+ }
+#else /* no SMI_TQM5200 */
if (pSmi->MapBase) {
#ifndef XSERVER_LIBPCIACCESS
xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pSmi->MapBase,
@@ -1598,6 +1709,7 @@ SMI_UnmapMem(ScrnInfoPtr pScrn)
#endif
pSmi->FBBase = NULL;
}
+#endif /* SMI_TQM5200 */
LEAVE();
}
@@ -1640,8 +1752,23 @@ SMI_ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
pScrn->fbOffset = pSmi->FBOffset + pSmi->fbMapOffset;
/* Clear frame buffer */
- memset(pSmi->FBBase, 0, pSmi->videoRAMBytes);
-
+ memset(pSmi->FBBase, 0x0, pSmi->videoRAMBytes);
+
+ /* This used to paint the screen red at startup (though the first 0xFF doesn't seem to do anything) */
+/* int i;
+ for(i = 0; i < pSmi->videoRAMBytes / 4; i += 4)
+ {
+ *(pSmi->FBBase + i) = 0xFF;
+ *(pSmi->FBBase + i + 1) = 0xFF;
+ *(pSmi->FBBase + i + 2) = 0x00;
+ *(pSmi->FBBase + i + 3) = 0x00;
+ } */
+
+// for(i = 0; i < pSmi->videoRAMBytes / 4; i += 4)
+// {
+// *((int *)(pSmi->FBBase + i)) = 0x0000FFFF; /* red */
+// }
+
/*
* The next step is to setup the screen's visuals, and initialise the
* framebuffer code. In cases where the framebuffer's default choises for
@@ -1753,8 +1880,17 @@ SMI_ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
if (IS_MSOC(pSmi)) {
size = SMI501_MAX_CURSOR;
- flags = (HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_1 |
- HARDWARE_CURSOR_SWAP_SOURCE_AND_MASK);
+ flags = (
+#if SMI_TQM5200
+ /* HARDWARE_CURSOR_NIBBLE_SWAPPED // fÃŒr sm501=LE */
+ HARDWARE_CURSOR_BIT_ORDER_MSBFIRST // fÃŒr sm501 = BE
+ | HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_1
+ | HARDWARE_CURSOR_SWAP_SOURCE_AND_MASK
+#else
+ HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_1
+ | HARDWARE_CURSOR_SWAP_SOURCE_AND_MASK
+#endif
+ );
#if SMI_CURSOR_ALPHA_PLANE
if (!pSmi->Dualhead)
flags |= HARDWARE_CURSOR_ARGB;
@@ -1805,7 +1941,7 @@ SMI_ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
if (serverGeneration == 1) {
xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options);
}
-
+
LEAVE(TRUE);
}
diff --git a/src/smi_exa.c b/src/smi_exa.c
index 1b6d42f..36c8124 100644
--- a/src/smi_exa.c
+++ b/src/smi_exa.c
@@ -63,10 +63,10 @@ SMI_Solid(PixmapPtr pPixmap, int x1, int y1, int x2, int y2);
static void
SMI_DoneSolid(PixmapPtr pPixmap);
-Bool
+static Bool
SMI_UploadToScreen(PixmapPtr pDst, int x, int y, int w, int h, char *src, int src_pitch);
-Bool
+static Bool
SMI_DownloadFromScreen(PixmapPtr pSrc, int x, int y, int w, int h, char *dst, int dst_pitch);
static Bool
@@ -86,6 +86,9 @@ SMI730_Composite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
static void
SMI_DoneComposite(PixmapPtr pDst);
+static void
+SMI_FinishAccess(PixmapPtr pPix, int index);
+
#define PIXMAP_FORMAT(pixmap) SMI_DEDataFormat(pixmap->drawable.bitsPerPixel)
#define PIXMAP_OFFSET(pixmap) IS_MSOC(pSmi) ? \
@@ -165,6 +168,7 @@ SMI_EXAInit(ScreenPtr pScreen)
pSmi->EXADriverPtr->DownloadFromScreen = SMI_DownloadFromScreen;
#endif
+#if !SMI_TQM5200
/* Composite */
pSmi->EXADriverPtr->CheckComposite = SMI_CheckComposite;
pSmi->EXADriverPtr->PrepareComposite = SMI_PrepareComposite;
@@ -176,7 +180,12 @@ SMI_EXAInit(ScreenPtr pScreen)
else
pSmi->EXADriverPtr->Composite = SMI_Composite;
pSmi->EXADriverPtr->DoneComposite = SMI_DoneComposite;
+#endif
+#if 0
+ pSmi->EXADriverPtr->FinishAccess = SMI_FinishAccess;
+#endif
+
if(!exaDriverInit(pScreen, pSmi->EXADriverPtr)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "exaDriverInit failed.\n");
LEAVE(FALSE);
@@ -501,7 +510,13 @@ SMI_DownloadFromScreen(PixmapPtr pSrc, int x, int y, int w, int h,
w *= pSrc->drawable.bitsPerPixel/8;
while (h--) {
+#if 0
+ int idx;
+ for(idx = 0; idx < w; idx += 4)
+ *((CARD32*)(dst + idx)) = lswapl(*((CARD32*)(src + idx)));
+#else
memcpy(dst, src, w);
+#endif
src += src_pitch;
dst += dst_pitch;
}
@@ -577,7 +592,13 @@ SMI_UploadToScreen(PixmapPtr pDst, int x, int y, int w, int h,
#endif
while (h--) {
+#if 0
+ int idx;
+ for(idx = 0; idx < aligned_pitch; idx += 4)
+ *((CARD32*)(pSmi->DataPortBase + idx)) = lswapl(*((CARD32*)(src + idx)));
+#else
memcpy(pSmi->DataPortBase, src, aligned_pitch);
+#endif
src += src_pitch;
}
@@ -606,7 +627,7 @@ static Bool
SMI_CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture, PicturePtr pDstPicture)
{
ENTER();
-
+
if(op!=PictOpSrc || pMaskPicture ||
pSrcPicture->repeatType || !pSrcPicture->transform)
LEAVE(FALSE);
@@ -761,3 +782,10 @@ SMI_DoneComposite(PixmapPtr pDst)
ENTER();
LEAVE();
}
+
+static void
+SMI_FinishAccess(PixmapPtr pPix, int index)
+{
+ ENTER();
+ LEAVE();
+}
diff --git a/src/smi_xaa.c b/src/smi_xaa.c
index f2c1cc6..c59ea91 100644
--- a/src/smi_xaa.c
+++ b/src/smi_xaa.c
@@ -44,6 +44,10 @@ static void SMI_SubsequentScreenToScreenCopy(ScrnInfoPtr, int, int, int, int,
static void SMI_SetupForSolidFill(ScrnInfoPtr, int, int, unsigned);
static void SMI_SubsequentSolidFillRect(ScrnInfoPtr, int, int, int, int);
static void SMI_SubsequentSolidHorVertLine(ScrnInfoPtr, int, int, int, int);
+#if SMI_TQM5200_LINEACC
+static void SMI_SetupForSolidLine(ScrnInfoPtr, int, int, unsigned int);
+static void SMI_SubsequentSolidBresenhamLine(ScrnInfoPtr, int, int, int, int, int, int, int);
+#endif
static void SMI_SetupForCPUToScreenColorExpandFill(ScrnInfoPtr, int, int, int,
unsigned int);
static void SMI_SubsequentCPUToScreenColorExpandFill(ScrnInfoPtr, int, int, int,
@@ -89,6 +93,9 @@ SMI_XAAInit(ScreenPtr pScreen)
/* Screen to screen copies */
infoPtr->ScreenToScreenCopyFlags = NO_PLANEMASK
+#if SMI_TQM5200
+ | BIT_ORDER_IN_BYTE_LSBFIRST
+#endif
| ONLY_TWO_BITBLT_DIRECTIONS;
infoPtr->SetupForScreenToScreenCopy = SMI_SetupForScreenToScreenCopy;
infoPtr->SubsequentScreenToScreenCopy = SMI_SubsequentScreenToScreenCopy;
@@ -100,34 +107,69 @@ SMI_XAAInit(ScreenPtr pScreen)
}
/* Solid Fills */
- infoPtr->SolidFillFlags = NO_PLANEMASK;
+ infoPtr->SolidFillFlags = NO_PLANEMASK
+#if SMI_TQM5200
+ | BIT_ORDER_IN_BYTE_LSBFIRST
+#endif
+ ;
infoPtr->SetupForSolidFill = SMI_SetupForSolidFill;
infoPtr->SubsequentSolidFillRect = SMI_SubsequentSolidFillRect;
/* Solid Lines */
- infoPtr->SolidLineFlags = NO_PLANEMASK;
+ infoPtr->SolidLineFlags = NO_PLANEMASK
+#if SMI_TQM5200
+ | BIT_ORDER_IN_BYTE_LSBFIRST
+#endif
+ ;
+
+#if SMI_TQM5200_LINEACC
+ infoPtr->SetupForSolidLine = SMI_SetupForSolidLine;
+ infoPtr->SubsequentSolidBresenhamLine = SMI_SubsequentSolidBresenhamLine;
+ /* The "error" term to be put into MMIO_base+0x100008, Bits 15:0 is 16 bits wide.
+ However, the "minor" term is added to the "error" term that comes from the xserver
+ before it is written to the register (see below). The K1 and K2 constants are
+ only 14 bits wide. The default value for "SolidBresenhamLineErrorTermBits" is 16.
+ This seems to work fine. If there are problems this might have to be changed to 14: */
+ /*infoPtr->SolidBresenhamLineErrorTermBits = 14;*/
+#else
infoPtr->SetupForSolidLine = SMI_SetupForSolidFill;
infoPtr->SubsequentSolidHorVertLine = SMI_SubsequentSolidHorVertLine;
+#endif
/* Color Expansion Fills */
- infoPtr->CPUToScreenColorExpandFillFlags = ROP_NEEDS_SOURCE
- | NO_PLANEMASK
+ // This caused a problem related to displaying fonts (run xfontsel).
+ /* infoPtr->CPUToScreenColorExpandFillFlags = ROP_NEEDS_SOURCE
+#if SMI_TQM5200
+ | BIT_ORDER_IN_BYTE_LSBFIRST
+#else
| BIT_ORDER_IN_BYTE_MSBFIRST
- | LEFT_EDGE_CLIPPING
- | CPU_TRANSFER_PAD_DWORD
- | SCANLINE_PAD_DWORD;
+ | LEFT_EDGE_CLIPPING
+ | CPU_TRANSFER_PAD_DWORD
+ | SCANLINE_PAD_DWORD
+ | NO_PLANEMASK
+#endif
+ ;
infoPtr->ColorExpandBase = pSmi->DataPortBase;
infoPtr->ColorExpandRange = pSmi->DataPortSize;
infoPtr->SetupForCPUToScreenColorExpandFill =
SMI_SetupForCPUToScreenColorExpandFill;
infoPtr->SubsequentCPUToScreenColorExpandFill =
- SMI_SubsequentCPUToScreenColorExpandFill;
+ SMI_SubsequentCPUToScreenColorExpandFill; */
/* 8x8 Mono Pattern Fills */
- infoPtr->Mono8x8PatternFillFlags = NO_PLANEMASK
- | HARDWARE_PATTERN_PROGRAMMED_BITS
- | HARDWARE_PATTERN_SCREEN_ORIGIN
- | BIT_ORDER_IN_BYTE_MSBFIRST;
+ infoPtr->Mono8x8PatternFillFlags =
+ /* This caused a problem related to drawing dashed lines (around fltk buttons).
+ Therefore SMI_TQM5200 switch is disabled here. */
+
+#if SMI_TQM5200 && 0
+ BIT_ORDER_IN_BYTE_LSBFIRST
+#else
+ BIT_ORDER_IN_BYTE_MSBFIRST
+ | HARDWARE_PATTERN_PROGRAMMED_BITS
+ | HARDWARE_PATTERN_SCREEN_ORIGIN
+ | NO_PLANEMASK
+#endif
+ ;
infoPtr->SetupForMono8x8PatternFill = SMI_SetupForMono8x8PatternFill;
infoPtr->SubsequentMono8x8PatternFillRect =
SMI_SubsequentMono8x8PatternFillRect;
@@ -135,6 +177,9 @@ SMI_XAAInit(ScreenPtr pScreen)
/* 8x8 Color Pattern Fills */
if (!SMI_LYNX3D_SERIES(pSmi->Chipset) || (pScrn->bitsPerPixel != 24)) {
infoPtr->Color8x8PatternFillFlags = NO_PLANEMASK
+#if SMI_TQM5200
+ | BIT_ORDER_IN_BYTE_LSBFIRST
+#endif
| HARDWARE_PATTERN_SCREEN_ORIGIN;
infoPtr->SetupForColor8x8PatternFill =
SMI_SetupForColor8x8PatternFill;
@@ -145,6 +190,9 @@ SMI_XAAInit(ScreenPtr pScreen)
#if SMI_USE_IMAGE_WRITES
/* Image Writes */
infoPtr->ImageWriteFlags = ROP_NEEDS_SOURCE
+#if SMI_TQM5200
+ | BIT_ORDER_IN_BYTE_LSBFIRST
+#endif
| NO_PLANEMASK
| CPU_TRANSFER_PAD_DWORD
| SCANLINE_PAD_DWORD;
@@ -156,6 +204,9 @@ SMI_XAAInit(ScreenPtr pScreen)
/* Clipping */
infoPtr->ClippingFlags = HARDWARE_CLIP_SCREEN_TO_SCREEN_COPY
+#if SMI_TQM5200
+ | BIT_ORDER_IN_BYTE_LSBFIRST
+#endif
| HARDWARE_CLIP_MONO_8x8_FILL
| HARDWARE_CLIP_COLOR_8x8_FILL
| HARDWARE_CLIP_SOLID_FILL
@@ -182,6 +233,14 @@ SMI_XAAInit(ScreenPtr pScreen)
}
}
+#if SMI_TQM5200
+/* Added so Pixmaps will be created in offscreen memory. This works around an issue in
+xaainit.c: XAACreatePixmap() doesn't create pixmaps in offscreen area because XAAInitializeOffsreenDepths() doesn't seem to detect usable depths of offscreen pixmaps correctly. */
+ infoPtr->offscreenDepths = (1 << (24 - 1)); // depth is usually 24
+ infoPtr->offscreenDepthsInitialized = 1;
+#endif
+
+
SMI_EngineReset(pScrn);
ret = XAAInit(pScreen, infoPtr);
@@ -202,7 +261,7 @@ SMI_SetupForScreenToScreenCopy(ScrnInfoPtr pScrn, int xdir, int ydir, int rop,
ENTER();
DEBUG("xdir=%d ydir=%d rop=%02X trans=%08X\n", xdir, ydir, rop, trans);
-#if __BYTE_ORDER == __BIG_ENDIAN
+#if (__BYTE_ORDER == __BIG_ENDIAN && !SMI_TQM5200)
if (pScrn->depth >= 24)
trans = lswapl(trans);
#endif
@@ -287,7 +346,7 @@ SMI_SetupForSolidFill(ScrnInfoPtr pScrn, int color, int rop,
| SMI_BITBLT
| SMI_START_ENGINE;
-#if __BYTE_ORDER == __BIG_ENDIAN
+#if (__BYTE_ORDER == __BIG_ENDIAN && !SMI_TQM5200)
if (pScrn->depth >= 24) {
/* because of the BGR values are in the MSB bytes,
* 'white' is not possible and -1 has a different meaning.
@@ -386,6 +445,126 @@ SMI_SubsequentSolidHorVertLine(ScrnInfoPtr pScrn, int x, int y, int len,
LEAVE();
}
+#if SMI_TQM5200_LINEACC
+static void
+SMI_SetupForSolidLine(ScrnInfoPtr pScrn, int color, int rop, unsigned int planemask)
+{
+ SMIPtr pSmi = SMIPTR(pScrn);
+
+ ENTER();
+ DEBUG("color=%08X rop=%02X\n", color, rop);
+
+ pSmi->AccelCmd =
+ /* Bresenham line drawing seems to use ROP2 by default.
+ Is there a way to use a pattern, to draw dashed lines?
+ Do we need a different ROP for transparency effects (OR)? */
+ /*0x0000000C*/
+ /*XAAGetPatternROP(rop)*/
+ 0x000000CC /* ROP3 Source */
+ /*0x0000000C*/ /* Source */
+ /*0x00000006*/ /* Dest XOR Source */
+ /*0x00000008*/ /* Dest * Source (AND) */
+ /*0x0000000E*/ /* Dest + Source (OR) */
+ /*| 1 << 14*/ /* Source is Pattern */
+ /*| 1 << 30*/ /* Color Pattern */
+ | SMI_BRESENHAM_LINE
+ | SMI_START_ENGINE
+ | 1 << 21; /* Draw last pixel */
+
+#if (__BYTE_ORDER == __BIG_ENDIAN && !SMI_TQM5200)
+/* This part has been taken from SMI_SetupForSolidFill, not tested */
+ if (pScrn->depth >= 24) {
+ /* because of the BGR values are in the MSB bytes,
+ * 'white' is not possible and -1 has a different meaning.
+ * As a work around (assuming white is more used as
+ * light yellow (#FFFF7F), we handle this as beining white.
+ * Thanks to the SM501 not being able to work in MSB on PCI
+ * on the PowerPC */
+ if (color == 0x7FFFFFFF)
+ color = -1;
+ color = lswapl(color);
+ }
+#endif
+/* This part has been taken from SMI_SetupForSolidFill, not tested */
+ /*if (pSmi->ClipTurnedOn) {
+ WaitQueue();
+ WRITE_DPR(pSmi, 0x2C, pSmi->ScissorsLeft);
+ pSmi->ClipTurnedOn = FALSE;
+ } else {
+ WaitQueue();
+ }*/
+
+ WRITE_DPR(pSmi, 0x14, color); /* 2D Foreground */
+ /*WRITE_DPR(pSmi, 0x18, ~color);
+ WRITE_DPR(pSmi, 0x34, 0xCCCCCCCC);
+ WRITE_DPR(pSmi, 0x38, 0xCCCCCCCC);*/
+
+ /*WRITE_DPR(pSmi, 0x1C, 0x40200000 );*/
+
+ LEAVE();
+}
+
+static void
+SMI_SubsequentSolidBresenhamLine(ScrnInfoPtr pScrn, int x, int y, int major, int minor, int err, int len, int octant)
+{
+ unsigned int control;
+
+ SMIPtr pSmi = SMIPTR(pScrn);
+
+ ENTER();
+ DEBUG("x=%d y=%d major=%d minor=%d err=%d, len=%d octant=%d\n", x, y, major, minor, err, len, octant);
+
+/* This part has been taken from SMI_SubsequentSolidFillRect, not tested */
+ /* if (pScrn->bitsPerPixel == 24) {
+ x *= 3;
+ w *= 3;
+
+ if (pSmi->Chipset == SMI_LYNX) {
+ y *= 3;
+ }
+ } */
+
+/* This part has been taken from SMI_SubsequentSolidFillRect, not tested */
+ /* if (IS_MSOC(pSmi)) { */
+ /* Clip to prevent negative screen coordinates */
+ /*if (x < 0)
+ x = 0;
+ if (y < 0)
+ y = 0;
+ } */
+
+ control = pSmi->AccelCmd
+ | (octant & YMAJOR ? SMI_MAJOR_Y : SMI_MAJOR_X )
+ | (octant & XDECREASING ? SMI_X_STEP_NEGATIVE : SMI_X_STEP_POSITIVE )
+ | (octant & YDECREASING ? SMI_Y_STEP_NEGATIVE : SMI_Y_STEP_POSITIVE );
+
+ WaitQueue();
+
+ /* 14-Bit constant K1 and 14-Bit constant K2. Excerpt from the "XAA.HOWTO":
+ "IBM 8514 style Bresenham line interfaces require their parameters
+ modified in the following way:
+
+ Axial = minor;
+ Diagonal = minor - major;
+ Error = minor + err;"
+
+ xaaLine.c:
+ minor = 2 * min( |dx|, |dy ), major = 2 * max( |dx|, |dy| ) */
+
+ WRITE_DPR(pSmi, 0x00, (minor << 16) | ( (minor - major) & 0xFFFF ) );
+ /* 12-Bit vector starting coordinates X and Y */
+ WRITE_DPR(pSmi, 0x04, (x << 16) | (y & 0xFFFF) );
+ /* 13-Bit vector length and 16-Bit error term */
+ /*WRITE_DPR(pSmi, 0x08, (len << 16) | (minor - (major >> 1) - (octant & XDECREASING ? 0 : 1)) & 0xFFFF );*/
+ WRITE_DPR(pSmi, 0x08, (len << 16) | ( (minor + err) & 0xFFFF ) );
+
+ WRITE_DPR(pSmi, 0x0C, control);
+
+ LEAVE();
+}
+#endif /* if SMI_TQM5200_LINEACC */
+
+
/******************************************************************************/
/* Color Expansion Fills */
/******************************************************************************/
@@ -397,9 +576,10 @@ SMI_SetupForCPUToScreenColorExpandFill(ScrnInfoPtr pScrn, int fg, int bg,
SMIPtr pSmi = SMIPTR(pScrn);
ENTER();
+ DEBUG("X_BYTE_ORDER = %d\n", X_BYTE_ORDER);
DEBUG("fg=%08X bg=%08X rop=%02X\n", fg, bg, rop);
-#if __BYTE_ORDER == __BIG_ENDIAN
+#if (__BYTE_ORDER == __BIG_ENDIAN && !SMI_TQM5200 )
if (pScrn->depth >= 24) {
/* see remark elswere */
if (fg == 0x7FFFFFFF)
@@ -422,7 +602,7 @@ SMI_SetupForCPUToScreenColorExpandFill(ScrnInfoPtr pScrn, int fg, int bg,
WRITE_DPR(pSmi, 0x18, ~fg);
WRITE_DPR(pSmi, 0x20, fg);
} else {
-#if __BYTE_ORDER == __BIG_ENDIAN
+#if (__BYTE_ORDER == __BIG_ENDIAN && !SMI_TQM5200)
if (bg == 0xFFFFFF7F)
bg = -1;
#endif
@@ -489,7 +669,9 @@ SMI_SetupForMono8x8PatternFill(ScrnInfoPtr pScrn, int patx, int paty, int fg,
DEBUG("patx=%08X paty=%08X fg=%08X bg=%08X rop=%02X\n",
patx, paty, fg, bg, rop);
-#if __BYTE_ORDER == __BIG_ENDIAN
+ /* This caused a problem related to drawing dashed lines (around fltk buttons).
+ Therefore SMI_TQM5200 switch is disabled here. */
+#if (__BYTE_ORDER == __BIG_ENDIAN && !(SMI_TQM5200 && 0) )
if (pScrn->depth >= 24) {
if (fg == 0x7FFFFFFF)
fg = -1;
@@ -515,7 +697,9 @@ SMI_SetupForMono8x8PatternFill(ScrnInfoPtr pScrn, int patx, int paty, int fg,
WRITE_DPR(pSmi, 0x34, patx);
WRITE_DPR(pSmi, 0x38, paty);
} else {
-#if __BYTE_ORDER == __BIG_ENDIAN
+ /* This caused a problem related to drawing dashed lines (around fltk buttons).
+ Therefore SMI_TQM5200 switch is disabled here. */
+#if (__BYTE_ORDER == __BIG_ENDIAN && !(SMI_TQM5200 && 0) )
if (bg == 0xFFFFFF7F)
bg = -1;
#endif
@@ -573,7 +757,7 @@ SMI_SetupForColor8x8PatternFill(ScrnInfoPtr pScrn, int patx, int paty, int rop,
| SMI_COLOR_PATTERN
| SMI_START_ENGINE;
-#if __BYTE_ORDER == __BIG_ENDIAN
+#if (__BYTE_ORDER == __BIG_ENDIAN && !SMI_TQM5200)
if (pScrn->depth >= 24)
trans_color = lswapl(trans_color);
#endif
@@ -584,7 +768,14 @@ SMI_SetupForColor8x8PatternFill(ScrnInfoPtr pScrn, int patx, int paty, int rop,
WaitIdle();
WRITE_DPR(pSmi, 0x0C, SMI_BITBLT | SMI_COLOR_PATTERN);
+#if SMI_TQM5200
+ int idx;
+ for(idx = 0; idx < 8 * pSmi->Bpp * 8; idx += 4) {
+ *((CARD32*)(pSmi->DataPortBase + idx)) = lswapl(*((CARD32*)(pattern + idx)));
+ }
+#else
memcpy(pSmi->DataPortBase, pattern, 8 * pSmi->Bpp * 8);
+#endif
} else {
if (pScrn->bitsPerPixel == 24) {
patx *= 3;
@@ -657,7 +848,7 @@ SMI_SetupForImageWrite(ScrnInfoPtr pScrn, int rop, unsigned int planemask,
DEBUG("rop=%02X trans_color=%08X bpp=%d depth=%d\n",
rop, trans_color, bpp, depth);
-#if __BYTE_ORDER == __BIG_ENDIAN
+#if (__BYTE_ORDER == __BIG_ENDIAN && !SMI_TQM5200)
if (pScrn->depth >= 24)
trans_color = lswapl(trans_color);
#endif
@@ -666,7 +857,7 @@ SMI_SetupForImageWrite(ScrnInfoPtr pScrn, int rop, unsigned int planemask,
| SMI_START_ENGINE;
if (trans_color != -1) {
-#if __BYTE_ORDER == __BIG_ENDIAN
+#if (__BYTE_ORDER == __BIG_ENDIAN && !SMI_TQM5200)
if (trans_color == 0xFFFFFF7F)
trans_color = -1;
#endif
diff --git a/xlog.txt b/xlog.txt
new file mode 100644
index 0000000..bd41d30
--- /dev/null
+++ b/xlog.txt
@@ -0,0 +1,28 @@
+
+This is a pre-release version of the X server from The X.Org Foundation.
+It is not supported in any way.
+Bugs may be filed in the bugzilla at http://bugs.freedesktop.org/.
+Select the "xorg" product for bugs you find in this release.
+Before reporting bugs in pre-release versions please check the
+latest version in the X.Org Foundation git repository.
+See http://wiki.x.org/wiki/GitPage for git access instructions.
+
+X.Org X Server 1.6.99.1
+Release Date: (unreleased)
+X Protocol Version 11, Revision 0
+Build Operating System: Linux 2.6.24.7-gae736e4c-dirty ppc
+Current Operating System: Linux defectoscop 2.6.24.7-gae736e4c-dirty #0 Fri May 8 15:20:08 CEST 2009 ppc
+Build Date: 23 June 2009 05:11:17PM
+
+Current version of pixman: 0.15.13
+ Before reporting problems, check http://wiki.x.org
+ to make sure that you have the latest version.
+Markers: (--) probed, (**) from config file, (==) default setting,
+ (++) from command line, (!!) notice, (II) informational,
+ (WW) warning, (EE) error, (NI) not implemented, (??) unknown.
+(==) Log file: "/usr/local/var/log/Xorg.0.log", Time: Wed Jun 24 10:50:40 2009
+(++) Using config file: "/root/xorg.conf"
+The XKEYBOARD keymap compiler (xkbcomp) reports:
+> Warning: Type "ONE_LEVEL" has 1 levels, but <RALT> has 2 symbols
+> Ignoring extra symbols
+Errors from xkbcomp are not fatal to the X server
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