[PATCH] DRI2: By default, throttle after two pending swaps.

Chris Wilson chris at chris-wilson.co.uk
Wed May 14 05:31:14 PDT 2014

On Tue, May 13, 2014 at 09:20:45AM -0700, Jamey Sharp wrote:
>    On May 13, 2014 12:57 AM, "Chris Wilson" <[1]chris at chris-wilson.co.uk>
>    wrote:
>    > =0 ickle:/usr/src/piglit$ ./bin/glx-oml-sync-control-getmscrate
>    > PIGLIT: {'result': 'pass' }
>    > =0 ickle:/usr/src/piglit$ ./bin/glx-oml-sync-control-waitformsc
>    > PIGLIT: {'result': 'pass' }
>    > =0 ickle:/usr/src/piglit$
>    ./bin/glx-oml-sync-control-swapbuffersmsc-divisor-zero
>    > PIGLIT: {'result': 'pass' }
>    > =0 ickle:/usr/src/piglit$
>    ./bin/glx-oml-sync-control-swapbuffersmsc-return
>    > Testing with default swap interval
>    > PIGLIT: {'result': 'pass' }
>    >
>    > Am I missing something?
>    Yeah, we have new tests that haven't quite been merged yet as we're
>    addressing Eric's review comments. Our current version, revised yesterday,
>    is available here:
>    [2]https://github.com/ThirteenFish/piglit
>    Make sure you do a full 'piglit-run.py -t OML_sync_control ...' as we run
>    the new tests in a variety of configurations, and the full-screen ones are
>    particularly interesting here. Though IIRC, SNA fails some of the others
>    as well.

Looks like there are quite a few bugs remaining in the test cases.

glXGetSyncValuesOML returns the current hardware frame counter and time
of last frame update, not the last client swap frame or swap time. You
make an assumption in the timing loop that the calls to SwapBuffers
and GetSyncValues are instantaneous and do not account for a vblank
interrupt that can happen in between updating the hardware counters.

The computation of interframe jitter is wonky, thanks to using
(new_timestamp - -1) on the first pass.

"glXSwapBuffersMscOML: If <divisor> = 0,
the swap will occur when MSC becomes greater than or equal to

The minimum expected_msc is therefore the target_msc in many cases and
no time may pass at all during the timing loop if msc-delta=0.

In repeat-swapbuffers.c, you query the current hw counters before the
swap may have completed, and runs afoul of the divisor==0 logic above.

Chris Wilson, Intel Open Source Technology Centre

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