new radeon tiling patch

[Michel Dänzer]

On Wed, 2005-01-19 at 17:30 +0100, Roland Scheidegger wrote:
> Michel Dänzer wrote:
> > 
> >>>> Also, if doing that in the drm, we'd need to mess with
> >>>> OFFSET_CNTL there too (i.e. messy calculation or another field
> >>>> in the sarea).
> >>> 
> >>> 
> >>> You mean CRTC_OFFSET? I'm not sure the calculation is that big an
> >>>  issue... it'll never happen more than a couple thousand times
> >>> per second anyway. ;)
> >> 
> >> Well, both CRTC_OFFSET and CRTC_OFFSET_CNTL.
> > 
> > 
> > The latter shouldn't matter if the writes are synchronized to the 
> > refresh anyway? Unless the update triggers at the same time the 
> > interrupt is generated without FLIP_CNTL...
> I'm not 100% sure this will work. If you update the offset_cntl in the 
> ddx, the crtc might take the new value before drm had a chance to update 
> the offset register (if the vblank would just happen when you write the 
> offset_cntl, and thus the drm might need to wait for a full frame).

I see, I guess OFFSET_CNTL would have to be written by the DRM as
well...


> I was able to get rid of the new setparam + sarea variable for pageflip 
> + mergedfb/tiling.

Cool.

> Instead of double wrapping, I just got rid of DRIAdjustFrame altogether 
> (you can simply override the default wrap.AdjustFrame with 0). This will 
> probably break the fullscreen stuff, so I'm wondering should I care 
> about that or is this fullscreen stuff (deprecated for ages afaik) just 
> never used anyway and could be removed?

I don't think we have to worry about that.


-- 
Earthling Michel Dänzer      |     Debian (powerpc), X and DRI developer
Libre software enthusiast    |   http://svcs.affero.net/rm.php?r=daenzer